JPH08126035A - Detector for defect of image pickup element - Google Patents

Abstract

PURPOSE: To surely and easily check the state of a defective picture element in an image pickup pattern forming section in the case that a solid-state image pickup element whose image pickup face forming section may possibly include a defective picture element is actually shipped as a product or the like. CONSTITUTION: The detector is provided with an element mount section 2 on which a solid-state image pickup element 11 is mounted, a drive signal generating section 25 driving the solid-state image pickup element 11, a defect detection section 33 detecting a defect included in an output signal from the solid-state image pickup element 11 and providing a defect detection output corresponding to the detected defect, a display signal generating section 36 generating a display signal based on the received defect detection output from the defect detection section 33 and a display section 37 displaying the defect picture element as to the mounted solid-state image pickup element 11 onto the element mount section 2 corresponding to the display signal obtained from the display signal generating section 36.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup device defect detection apparatus for detecting defective pixels in an image pickup device having an image pickup surface forming unit having a plurality of pixels arranged in an array.

[0002]

2. Description of the Related Art In a solid-state image pickup device used to form a video camera or the like for forming a video signal, a large number of pixels for photoelectric conversion are formed in a parallel array on a semiconductor substrate. The image pickup surface forming unit is provided with a charge transfer region formed of a charge coupled device (CCD) or the like for transferring the signal charge obtained in each pixel. The imaging surface forming unit in such a solid-state imaging device is
In the manufacturing process, it is not easy for all of a large number of pixels to function properly.
For example, defective pixels are likely to be included that cause abnormal operation due to local crystal defects in the semiconductor.

When a solid-state image pickup device having an image pickup surface forming portion including defective pixels is used,
The output signal from each of the pixels in the imaging surface forming section is sampled and read according to the selected read column of the multiple parallel columns formed by the pixel, and is sequentially obtained. Since the output signal from the defective pixel is mixed in the image pickup signal as a noise component to form a defective portion of the image pickup signal, the image pickup signal is supplied from the solid-state image pickup element to form an image pickup output signal based on it. In the signal processing circuit section, it is required that the defective portion of the image pickup signal caused by the defective pixel be treated, that is, the defect should be corrected.

Therefore, in the image pickup surface forming portion provided in the solid-state image pickup device, a defective pixel included in the image pickup surface forming portion is detected at a stage in which each pixel is in a state in which it should properly operate during the manufacturing process. A test for identifying the position is performed, and the position of the defective pixel found in the test in the imaging surface forming unit, for example, each of the parallel rows formed by a large number of pixels on the imaging surface forming unit is specified. A read-only memory (ROM) that stores defective pixel data that has a vertical address and a horizontal address that identifies each pixel in each of the parallel columns is prepared, and the ROM that stores the defective pixel data is stored in the ROM. It has been proposed to do so. As described above, the RO in which the defective pixel data is stored
When the image pickup surface forming unit is assumed to be accompanied by M, the image pickup signal including the defective portion due to the defective pixel, which is obtained based on the output signal from each of the pixels in the actual use, is provided. On the other hand, the defect correction is performed according to the defect correction instruction signal obtained based on the defective pixel data read from the ROM, whereby the defective portion in the image pickup signal can be removed or reduced. It will be.

[0005]

However, in the solid-state image pickup device as described above, it is considered that the image pickup surface forming portion partially includes defective pixels due to the stress received after the manufacturing process. There is a risk that it will end up. Therefore, for example, even in a solid-state image sensor including a ROM in which a defective pixel in the imaging surface forming unit is detected by a test performed during the manufacturing process and defective pixel data based on the detection result is stored. , When it is actually shipped as a product, or when it is accepted by the user, it may occur that it is different from the state at the time of the test performed during the manufacturing process. .

Therefore, with respect to the solid-state image pickup device, for example, when the product is actually shipped as a product or is accepted by the user, the situation of defective pixels in the image pickup surface forming portion is accurately inspected. A device that can do is desired, but in the past,
No such device is found.

In view of the above point, the present invention has an image pickup plane forming section in which a plurality of pixels are arranged and arranged, and the image pickup plane forming section may include defective pixels. With regard to the above, when it is actually shipped as a product, or when it is accepted by the user, it is possible to accurately and easily inspect the status of defective pixels in the imaging surface forming unit. An object is to provide an image sensor defect detection device.

[0008]

In order to achieve the above object, an image pickup device defect detecting apparatus according to the present invention drives an image pickup device mounted on the device mounting portion to which the image pickup device is mounted. Detecting a defective portion due to a defective pixel in the image pickup surface forming portion of the image pickup element included in the output signal from the element drive portion and the image pickup element driven by the element drive portion, and depending on the detected defective portion A defect detection section for transmitting a defect detection output, a display signal forming section for forming a display signal based on the defect detection output transmitted from the defect detection section, and a display signal obtained from the display signal forming section. Accordingly, it is configured to include a display unit that performs a display regarding a defective pixel of the image pickup device mounted in the device mounting unit.

[0009]

In the image pickup device defect detection apparatus according to the present invention having the above-described structure, the image pickup device is mounted on the device mounting portion and is driven by the device driving portion. , When a defective portion included in an output signal from the image pickup device is detected, for example, defective data indicating that the defective portion is detected, defective pixel in the image pickup plane forming portion that causes the detected defective portion Defect address data for identifying the defect level, defect level data indicating the level of the detected defect portion, and the like are transmitted as defect detection outputs. Then, the display unit, for example, the image pickup surface forming unit for the image pickup device mounted in the device mounting unit according to the display signal formed based on the defect detection output from the defect detection unit by the display signal formation unit. The number of defective pixels, the position of the defective pixel in the imaging surface forming portion, the level of the defective portion detected by the defect detecting portion, and the like are displayed.

Therefore, when the image pickup device is actually shipped as a product, or when it is received by the user, the image pickup device is mounted on the device mounting portion and driven by the device driving portion. The situation of defective pixels in the image pickup surface forming portion of the image pickup device can be accurately checked based on the display by the display portion by a very easy procedure.

[0011]

FIG. 2 shows the appearance of an example of an image sensor defect detection apparatus according to the present invention. In the example shown in FIG. 2, a large number of pixels that perform photoelectric conversion are formed in an array by forming a large number of parallel columns, and a charge transfer region formed by a CCD that transfers the signal charges obtained in each pixel. A solid-state image sensor including an image pickup surface forming section, which is provided with a defect detection for detecting a defective pixel in the image pickup surface forming section, and a display regarding the defective pixel based on the result of the defect detection. It is said that.

In the example shown in FIG. 2, the casing 1 containing the circuit components for forming the defect detecting portion, the display signal forming portion, etc. is provided, and the upper surface of the casing 1 is covered with the casing 1. ,
An element mounting section 2 on which a solid-state image sensor is mounted, an operation section 3, and first, second and third display sections 4, 5 and 6 are provided. Furthermore, the element mounting portion 2 is provided on the upper surface of the box 1.
The movable lid body 8 that selectively takes the state of covering
It is attached via the hinge portion 7.

The element mounting portion 2 desirably functions as a thermostatic device that operates to maintain the solid-state image pickup element at a substantially constant temperature regardless of the ambient temperature when the solid-state image pickup element is attached thereto. Will also be fulfilled. Further, the movable lid 8 has the solid-state image pickup device mounted on the device mounting portion 2 and detects a defect, the whole of the device mounting portion 2 and the solid-state image pickup device held by the device mounting portion 2 are arranged above them. To keep the solid-state image sensor in a light-shielded state.

Further, the first, second and third display portions 4,
Reference numerals 5 and 6 relate to the solid-state image pickup device mounted on the device mounting portion 2 in accordance with a signal from a circuit configuration portion built in the casing 1, and the first display portion 4 is a defective pixel in the image pickup surface forming portion. , The second display unit 5 displays the position of the defective pixel in the imaging surface forming unit with a defective address that identifies the defective pixel, and the third display unit 6 displays the imaging surface forming unit. The level of the defective portion in the output signal from the solid-state image pickup device due to the defective pixel in the area is displayed.

FIG. 1 shows an example of a circuit component portion built in the box 1, an element mounting portion 2 on which a solid-state image sensor 11 is mounted, a first display portion 4, a second display portion 5 and It is shown with a display unit 37 comprising a third display unit 6.

Solid-state image pickup device 1 mounted on the device mounting portion 2
1 is of an interline transfer type having an image pickup surface forming portion as shown in FIG. 3, for example. In the image pickup surface forming unit shown in FIG. 3, a large number of photoelectric conversion element units 15 each of which constitutes an individual pixel are arranged in parallel rows (horizontal rows (direction of arrow h)) on the semiconductor substrate 13. Pixel horizontal columns) are arranged and arranged. The photoelectric conversion element portion 15 forming each of a large number of pixel horizontal columns also forms a large number of parallel columns (pixel vertical columns) extending in the vertical direction (direction of arrow v). A vertical charge transfer unit 16 formed of a CCD group is arranged along each pixel vertical column formed by the element unit 15. Each vertical charge transfer unit 16 is driven by, for example, two-phase vertical transfer drive signals φV1 and φV2 to perform a charge transfer operation.

A charge read gate section 17 is provided between each of the plurality of photoelectric conversion element sections 15 forming a vertical column of each pixel and the vertical charge transfer section 16 corresponding to the vertical column. In the charge read gate section 17, the read gate drive signal φ is associated with the photoelectric conversion element section 15 forming an odd-numbered pixel horizontal row (an odd pixel horizontal row).
The charge read state is set by GO, and the charge conversion is performed by the read gate drive signal φGE for the photoelectric conversion element portion 15 forming an even-numbered pixel horizontal column (even pixel horizontal column). It is assumed to be in a state.

One end side of each of the plurality of vertical charge transfer units 16 is connected to a horizontal charge transfer unit 18 which is formed of a CCD group and extends in the horizontal direction at the edge of the semiconductor substrate 13. There is. The horizontal charge transfer unit 18 is driven by, for example, two-phase horizontal transfer drive signals φH1 and φH2 to perform a charge transfer operation. Further, the horizontal charge transfer section 18 is provided with a charge output section 19, and an output terminal 20 is derived from the charge output section 19.

In the solid-state image pickup device 11 having the image pickup surface forming portion shown in FIG. 3, when an image pickup operation is actually performed, first, a predetermined light receiving period is set, and during the light receiving period, Each of the plurality of photoelectric conversion element units 15 each forming a pixel performs photoelectric conversion according to the image to be captured and accumulates charges. After that, in the first charge read period, the charge read gate drive signal φGO causes each of the charge read gate sections 17 related to the photoelectric conversion element section 15 forming the odd pixel horizontal column to be in the charge read state,
Through each of the charge read gate sections 17 in the charge read state, the charges accumulated in the corresponding photoelectric conversion element section 15 are read out to the corresponding vertical charge transfer section 16. Then, in the first charge transfer period subsequent to the first charge read period, the charges read out to each vertical charge transfer unit 16 become 2
By the charge transfer operation of each vertical charge transfer unit 16 driven by the phase vertical transfer drive signals φV1 and φV2, the portions obtained by the plurality of photoelectric conversion element units 15 forming each odd pixel horizontal column are sequentially and horizontally output. The charge is transferred toward the charge transfer unit 18.

In the horizontal charge transfer section 18,
A plurality of photoelectric conversion element units forming one of odd pixel horizontal columns are sequentially transferred to the horizontal charge transfer unit 18 by the charge transfer operation performed by being driven by the two-phase horizontal transfer drive signals φH1 and φH2. The charge obtained in 15 is transferred to the charge output unit 19. Charge output unit 19
In, the charges transferred by the horizontal charge transfer unit 18 are sequentially converted into a signal and led to the output terminal 20.

Next, in the second charge read period subsequent to the first charge transfer period, the charge read gate unit 17 related to the photoelectric conversion element unit 15 forming the even pixel horizontal column is generated by the read gate drive signal φGE. Is in the charge read state, and the charge read gate section 17 is in the charge read state.
Through each of the above, the electric charge accumulated in the photoelectric conversion element unit 15 corresponding to the above is read out to the corresponding vertical charge transfer unit 16. Subsequently, in the second charge transfer period subsequent to the second charge read period, the charges read to the vertical charge transfer units 16 are the vertical charges driven by the two-phase vertical transfer drive signals φV1 and φV2. By the charge transfer operation of the transfer unit 16, the horizontal charge transfer unit 1 is sequentially delivered to the portions obtained by the plurality of photoelectric conversion element units 15 forming each even pixel horizontal column.
Transferred to 8.

Then, in the horizontal charge transfer section 18,
A plurality of photoelectric conversion element units forming one of even pixel horizontal columns, which are sequentially transferred to the horizontal charge transfer unit 18 by the charge transfer operation performed by being driven by the two-phase horizontal transfer drive signals φH1 and φH2. The charge obtained in 15 is transferred to the charge output unit 19. Charge output unit 19
In, the charges transferred by the horizontal charge transfer unit 18 are sequentially converted into a signal and led to the output terminal 20.

Hereinafter, the charge reading in the first charge reading period, the charge transfer in the first charge transfer period, the charge reading in the second charge reading period, and the charge transfer in the second charge transfer period are sequentially performed. Repeated. Then, the output signal IP based on the charges accumulated in the plurality of photoelectric conversion element units 15 is obtained at the output terminal 20.

In such a case, in the image pickup surface forming portion which constitutes the solid-state image pickup device 11, the charges obtained by the plurality of photoelectric conversion element portions 15 forming each of the odd pixel horizontal columns are addressed to one pixel horizontal column. , The transfer to the horizontal charge transfer unit 18 by each vertical charge transfer unit 16 is completed within the odd field period, and the charges obtained in the plurality of photoelectric conversion element units 15 forming each of the even pixel horizontal columns are The transfer to the horizontal charge transfer unit 18 by each vertical charge transfer unit 16 for one pixel horizontal column is completed within the even field period, and one pixel horizontal line is sequentially transferred to each horizontal charge transfer unit 18. The supply of the charges obtained by the plurality of photoelectric conversion element units 15 forming the column to the charge output unit 19 by the horizontal charge transfer unit 18 is supposed to be completed within each line period. As such, the two-phase vertical transfer driving signals φ
V1 and φV2 and two-phase horizontal transfer drive signals φH1 and φH2 are set, respectively. Therefore, the solid-state image sensor 1
The output signal IP derived to the output terminal 20 of the image pickup surface forming unit which constitutes 1 is sequentially formed by the odd field period and the even field period which are successively formed in units of the line period. Will be done.

Therefore, in the odd field period, the imaging signal for the line period based on the charges obtained by the plurality of photoelectric conversion element units 15 forming each of the odd pixel horizontal columns is supplied from the imaging surface forming unit to the odd pixel horizontal. An output signal IP for one field period, which is formed continuously by the number of columns, is obtained, and in the even field period, charges obtained by the plurality of photoelectric conversion element units 15 forming each of the even pixel horizontal columns are obtained. Based on the above, the output signal IP for one field period in which the image pickup signals for the line period are continuously formed by the number of even pixel horizontal columns is obtained.

FIG. 4 and FIG. 5 show the state of the output signal IP obtained from the image pickup surface forming section when the image pickup operation is actually performed in the solid-state image pickup device 11. FIG. 4 mainly shows a state in an odd field period, and as shown in FIG. 4A, the vertical synchronization signal SV shown in FIG. 4B.
4 in the odd-numbered field period OF starting from the leading edge of the horizontal sync signal SH shown in FIG. 4C from the start time of the odd-numbered field period OF in FIG. As indicated by D, an output signal IP is obtained in which the output signals for the line period based on the charges obtained by the photoelectric conversion element portions 15 forming each of the odd-numbered pixel horizontal columns are formed in series. The odd number given to each line period in the output signal IP is the number from the horizontal charge transfer unit 18 side of the odd pixel horizontal column in the imaging plane forming unit where the charges forming the output signal for the line period are obtained. Represents In this example, a 20-line period from a time point three lines ahead of the start time of the odd field period OF to a 17-line period elapsed from the start time of the odd field period OF. The corresponding period is actually the vertical blanking period T
BLK.

Similarly, FIG. 5 mainly shows a state in the even field period, and as shown in A of FIG.
In the even field period EF starting from the leading edge of the vertical synchronizing signal SV shown in FIG. 5B, for example, as shown in FIG.
14th from the start point of the even field period E-F of the horizontal synchronization signal SH shown in C (having a shift of 0.5 line period compared to the case of the odd field period OF). After that, as shown in D of FIG. 5, an output formed by a series of output signals for a line period based on the charges obtained by the photoelectric conversion element units 15 forming each of the even pixel horizontal columns. The signal IP is obtained. The even number given to each line period in the output signal IP is the number from the horizontal charge transfer unit 18 side of the even pixel horizontal column in the imaging plane forming unit where the charges forming the output signal for the line period are obtained. Represents Note that, even in this case, the even field period E is started from a time point preceding the start time of the even field period E-F by three line periods.
The period corresponding to the 20-line period until the 17-line period elapses from the start of -F is actually the vertical blanking period TBLK.

The element mounting portion 2 is provided with a drive signal forming portion 25 for driving the solid-state image pickup element 11 mounted on the element mounting portion 2.
They are connected to form an element driving unit. The drive signal forming unit 25 includes a vertical clock signal CLV and a horizontal clock signal C from the timing signal forming unit 26.
LH and the read command signals CRO and CRE are supplied to form the read gate drive signal φGO according to the read command signal CRO and the read gate drive signal φGE according to the read command signal CRE. Each of the phase vertical transfer drive signals φV1 and φV2 is formed based on the vertical clock signal CLV, and each of the two-phase horizontal transfer drive signals φH1 and φH2 is formed based on the horizontal clock signal CLH. Then, the drive signal forming unit 25 outputs the read gate drive signal φGO, the vertical transfer drive signals φV1 and φV2, and the horizontal transfer drive signals φH1 and φH2 according to the read command signal CRO, and the read gate drive signal φGE, vertical. Transfer drive signals φV1 and φV
2, and the horizontal transfer drive signals φH1 and φH2 are supplied to the image pickup surface forming unit of the solid-state image pickup device 11 mounted on the device mounting unit 2 according to the read command signal CRE, and the solid-state image pickup device 11 is driven. .

The timing signal forming section 26 includes a vertical synchronizing signal SV and a horizontal synchronizing signal SH from the synchronizing signal generating section 27.
Is supplied, and further storage command signals CCO and CCE are supplied from the defect detection section 33 described later, the vertical clock signal CLV is formed based on the horizontal synchronization signal SH, and the horizontal clock signal CLV is generated. The signal CLH is formed as a signal having a frequency significantly higher than that of the horizontal synchronizing signal SH, but synchronized with the horizontal synchronizing signal SH, and the read command signals CRO and CRE are respectively set to the storage command signal C.
Based on CO and CCE, they are formed to correspond to the odd field period and the even field period, and they are supplied to the drive signal forming unit 25.

Solid-state image pickup device 1 mounted on the device mounting portion 2
1 is driven by the drive signal forming unit 25, so that the output signal IP obtained from the image pickup surface forming unit of the solid-state image pickup device 11 is supplied to the sampling and holding unit 30 through the output terminal 2A of the device mounting unit 2. It In the sampling and holding unit 30, the sampling and holding signal SI is obtained by performing level sampling and holding of the sampling level for each predetermined short cycle with respect to the output signal IP, which is analog / digital (A /
D) It is supplied to the conversion unit 31. In the A / D converter 31, the output signal IP is digitized based on the sampling and holding signal SI, and the A / D converter 31
From the digital output signal DI corresponding to the output signal IP
Is obtained, and it is led to the output terminal 32 and is supplied to the defect detecting section 33.

In the defect detecting section 33, the vertical clock signal CLV from the timing signal forming section 26, the horizontal clock signal CLH, the read command signal CRO and the read command signal CRE, and the vertical synchronizing signal S from the synchronizing signal generating section 27.
V and reset signal CRS from control unit 34
And the defect detection command signal CST are supplied. The defect detection unit 33 is included in the digital output signal DI,
The defect portion caused by the defective pixel in the image pickup surface forming portion of the solid-state image pickup device 11 is detected, and the defect detection output based on the detection result is sent out.

The control unit 34 includes a defect detection section 33.
A defect detection switch 35 that is operated to detect a defective portion in the digital output signal DI and to output a defect detection output based on the detection result.
Are provided as a part of the operation unit 3 shown in FIG. In this defect detection switch 35, the solid-state imaging device 11 is mounted on the device mounting portion 2, and the solid-state imaging device 11 held by the entire device mounting portion 2 and the device mounting portion 2 is mounted.
Is covered with the movable lid 8, the solid-state image sensor 11 is maintained in a light-shielded state, and further, the element mounting portion 2 is assumed to function as a thermostatic device for the solid-state image sensor 11, It is operated to be turned on temporarily.

Then, the solid-state image pickup device 11 mounted on the device mounting portion 2 is covered with the movable lid 8 and kept in a light-shielding state, and the device mounting portion 2 functions as a thermostatic device for the solid-state image pickup device 11. When the defect detection switch 35 is operated to be temporarily turned on under such a state, the control unit 34 first supplies the reset signal CRS to the defect detection unit 33, and subsequently, the defect detection command. Signal CST
Is supplied to the defect detection unit 33 until the detection end signal CE arrives from the defect detection unit 33 or after that.

When the reset signal CRS from the control unit 34 is supplied, the defect detection section 33 responds to the reset signal CRS.
The built-in data memory section is cleared to prepare for writing new data thereafter. Then, subsequently, according to the defect detection command signal CST coming from the control unit 34, the solid-state image pickup device 11 mounted on the device mounting portion 2 is covered with the movable lid 8 to be kept in a light-shielded state, and further, the device mounting portion. Under the condition that 2 functions as a thermostatic device for the solid-state imaging device 11, the defective portion in the digital output signal DI obtained from the A / D conversion unit 31 is detected.

The defect detecting section 33 placed in the state of detecting the defective portion in the digital output signal DI, when the defective portion in the digital output signal DI is detected, outputs the defect data DD indicating that the defective portion is detected. First
Is sent to the display signal forming section 36 as the defect detection output of At the same time, the defective pixel in the image pickup surface forming portion of the solid-state image pickup device 11 which is the cause of the detected defective portion is set to the vertical address AV in the image pickup surface forming portion.
And a horizontal direction address AH to specify the pixel horizontal column to which the defective pixel belongs in the imaging plane forming unit, and the position of the defective pixel in the pixel horizontal column specified by the vertical address AV. The defective address data indicating the address including the horizontal address AH, that is, the defective address data DAVD and DAHD corresponding to the detected defective portion are stored in the built-in data memory unit and the level of the detected defective portion is stored. Is stored in a data memory unit having a built-in defect level data DED, and thereafter, the defect address data DAVD and DAHD and the defect level data DED stored in the data memory unit are read from the data memory unit at an appropriate timing, Read from data memory And the defective address data DAVD and DAHD as second defect detection output, also a defect level data DED read from the data memory unit 3
Are output to the display signal forming unit 36 as the defect detection outputs of the above.

In the defect detecting section 33, the storage command signals CCO and CCE are supplied to the timing signal forming section 26 through such an operation, and the defective portion in the digital output signal DI is detected. The period in which the operation of sending the defect data DD corresponding to the detected defective portion as the first defect detection output and the operation of storing the defect address data DAVD and DAHD and the defect level data DED in the data memory unit is completed. Control unit 34 for the detection end signal CE
Is sent to.

Defect data DD, defect address data DAVD and DAHD, and defect level data DED are supplied from the defect detection section 33 as first, second, and third defect detection outputs, respectively, to form a display signal. In the portion 36, a display signal SDP for displaying the number of defective pixels in the image pickup surface forming portion of the solid-state image pickup device 11 is formed based on the defect data DD, and the defect address data DAVD and DAHD are added. Based on this, a display signal SAP for displaying the position of the defective pixel in the image pickup surface forming portion of the solid-state image pickup device 11 is formed, and further, based on the defect level data DED, the digital output detected by the defect detecting portion 33. A display signal SLP for displaying the level of the defective portion in the signal DI is formed. And
These display signals SDP, SAP and SLP are displayed on the display unit 3 including the first, second and third display units 4, 5 and 6.
7 is supplied.

In the display unit 37, the solid-state image pickup device 11 is displayed by the first display unit 4 based on the display signal SDP.
The display of the number of defective pixels in the image pickup surface forming unit is performed, and the display signal SA is displayed by the second display unit 5.
Based on P, display is performed in which the position of the defective pixel in the image pickup surface forming portion of the solid-state image pickup device 11 is represented by the vertical address AV and the horizontal address AH in the image pickup surface forming portion, and further, the third display portion. 6 displays the level of the defective portion in the digital output signal DI detected by the defect detecting section 33 based on the display signal SLP. As a result, the state of defective pixels in the image pickup surface forming portion of the solid-state image pickup device 11 mounted on the device mounting portion 2 is displayed in the first, second and third display portions 4, 4.
It is possible to perform an accurate inspection based on the indications of 5 and 6.

FIG. 6 shows an example of a specific structure of the defect detecting section 33. In the example shown in FIG. 6, the signal input terminal 40 is supplied with the vertical synchronizing signal SV from the synchronizing signal generator 27. The vertical synchronization signal SV is A in FIG.
7, the odd-numbered field period OF and the even-numbered field period E-F are alternately set in each cycle as shown in FIG. 7B. Further, the vertical clock signal CLV and the horizontal clock signal CRH from the timing signal forming unit 26 are supplied to the signal input terminals 41 and 42, respectively.

When the defect detection switch 35 provided in the control unit 34 is operated and temporarily turned on, the reset signal CRS and the subsequent defect detection command signal CST are sent from the control unit 34 accordingly. , The defect detection command signal CST is input to the signal input terminal 4
3 is supplied at a timing as shown in C of FIG. 7, for example. When the defect detection command signal CST is supplied to the signal input terminal 43 as shown in C of FIG. 7, the supply start time of the defect detection command signal CST is at the solid-state imaging device mounted on the device mounting portion 2. A digital output signal DI based on the output signal IP obtained from the image pickup surface forming unit 11 is formed, and the digital output signal DI is formed.
Is within a signal output period TCO, which is a period during which the operation led to the output terminal 32 is performed. During such a signal output period TCO, the signal input terminal 44
Digital output signal DI is provided as shown at G in FIG.

In the odd field period OF, the digital output signal DI supplied to the signal input terminal 44 receives the photoelectric conversion element portion 15 forming each of the odd pixel horizontal columns in the image pickup surface forming portion of the solid-state image pickup element 11. It is an odd line field period signal OLF formed by a series of imaging signals for line periods based on the electric charge obtained in
Further, in the even field period E-F, the image pickup signals for the line period based on the charges obtained in the photoelectric conversion element portion 15 forming each of the even pixel horizontal columns in the image pickup surface forming portion are formed in series. Even line field period signal ELF.

Further, before the defect detection command signal CST is supplied in the signal output period TCO, the accumulation command signal generation unit 45 to which the vertical synchronizing signal SV is supplied through the signal input terminal 40 is supplied to the storage command signal generation unit 45 through the signal input terminal 43. Since the defect detection command signal CST is not supplied, the storage command signals CCO and CCE obtained from the storage command signal generator 45 are respectively supplied to the vertical synchronization signal SV as shown in D and E of FIG. The pulse signal has a cycle twice as long as that of the pulse sync signal and appears alternately in synchronization with the vertical sync signal SV.

When the defect detection command signal CST is supplied to the accumulation command signal generation unit 45 through the signal input terminal 43, the accumulation command signal generation unit 45 thereafter starts supplying the defect detection command signal CST. The storage command signal CCO is provided as a pulse signal synchronized with the third vertical synchronization signal SV.
Is generated, the storage command signal CCO is not generated until a preset period TCGO corresponding to, for example, n field periods (n ≧ 6) elapses, and then the period T
When CGO elapses, the accumulation command signal CCO has a cycle that is twice as long as that of the vertical synchronization signal SV.
The storage command signal CCE is generated as a pulse signal synchronized with V, and immediately before the start of supply of the defect detection command signal CST, as a pulse signal synchronized with the vertical synchronization signal SV.
After the generation of, the storage command signal CCE is not generated until a preset time, for example, a period TCGE corresponding to the n-field period has elapsed, and thereafter, when the period TCGE has elapsed, the storage command signal CCE is changed to Vertical sync signal SV
, And after a period corresponding to 6 field periods, the storage command signal CCE has a period twice that of the vertical synchronization signal SV and then the vertical synchronization signal SV. It is generated as a pulse signal synchronized with.

As shown in D and E of FIG. 7, the period T
The storage command signal CCO that does not appear in the CGO and the storage command signal CCE that does not appear in the period TCGE are the write control signal generator 4.
6 and the timing signal forming unit 26. The timing signal forming unit 26 outputs the read command signals CRO and CRE to the storage command signals CCO and C, respectively.
It is sent out as a pulse train signal that is issued in synchronization with CE. Therefore, in the period TCGO, the read gate drive signal φGO is not supplied from the drive signal forming unit 25 to the image pickup surface forming unit in the solid-state image pickup device 11, and each odd pixel horizontal column is formed in the image pickup surface forming unit. The charges obtained in the photoelectric conversion element section 15 are not read out to the vertical charge transfer section 16. Further, within the period TCGE, the read gate drive signal φGE is not supplied from the drive signal forming section 25 to the image pickup surface forming section of the solid-state image pickup device 11, and each even pixel horizontal column is formed in the image pickup surface forming section. The charges obtained in the photoelectric conversion element section 15 are not read out to the vertical charge transfer section 16.

As described above, in the period TCGO, the photoelectric conversion element portions 15 forming each of the odd-numbered pixel horizontal columns in the imaging surface forming portion are in the charge accumulation state, and in the period TCGE. The photoelectric conversion element portions 15 forming each of the even-numbered pixel horizontal columns in the image pickup surface forming portion are placed in the charge accumulation state. At this time, the solid-state image pickup element 11 attached to the element attachment portion 2 is movable. Since it is covered with the lid 8 and is kept in a light-shielded state, the image pickup surface forming portion thereof is substantially in a state where external light does not enter, and the photoelectric conversion element portion 15 does not accumulate charges due to external light. Not done.

When the end time of the period TCGO arrives, the storage command signal generator 45 outputs the storage command signal CCO.
Is generated as a pulse signal that appears in synchronism with the vertical synchronizing signal SV, which is generated by the timing signal forming unit 26.
Is supplied to. As a result, the timing signal forming unit 26
Is the read command signal CR at the end of the period TCGO.
O is sent as a pulse train signal that is issued in synchronization with the storage command signal CCO. As a result, the drive signal forming unit 25
To the image pickup surface forming portion of the solid-state image pickup device 11 from the read gate drive signal φGO and the vertical transfer drive signals φV1 and φ
The supply of V2 and the horizontal transfer drive signals φH1 and φH2 is started at the end of the period TCGO, and the vertical of the charges obtained in the photoelectric conversion element unit 15 forming each of the odd-numbered pixel horizontal columns in the imaging surface forming unit. Readout to the charge transfer unit 16 and vertical charge transfer unit 16 of the read charges
And the transfer by the horizontal charge transfer unit 18 are started at the end of the period TCGO.

Similarly, when the end point of the period TCGE arrives, the accumulation command signal generator 45 outputs the accumulation command signal CCE.
Is generated as a pulse signal that appears in synchronism with the vertical synchronizing signal SV, which is generated by the timing signal forming unit 26.
Is supplied to. As a result, the timing signal forming unit 26
Is the read command signal CR at the end of the period TCGE.
E is sent as a pulse train signal that is issued in synchronization with the storage command signal CCE. As a result, the drive signal forming unit 25
To the image pickup surface forming portion of the solid-state image pickup device 11, the read gate drive signal φGE, the vertical transfer drive signals φV1 and φ.
The supply of V2 and the horizontal transfer drive signals φH1 and φH2 is started at the end of the period TCGE, and the vertical of the charges obtained in the photoelectric conversion element unit 15 forming each of the even pixel horizontal columns in the imaging surface forming unit. Readout to the charge transfer unit 16 and vertical charge transfer unit 16 of the read charges
And the transfer by the horizontal charge transfer unit 18 are started at the end of the period TCGE.

At this time, the charges obtained by the photoelectric conversion element section 15 provided in the imaging surface forming section are read out to the vertical charge transfer section 16, and the read charges are transferred by the vertical charge transfer section 16. Also, the transfer by the horizontal charge transfer unit 18 includes reading and transfer of charges from a region that does not directly contribute to the formation of the output signal IP in the imaging surface forming unit, and is performed in a period longer than a normal one field period. It takes place over time. As a result, the charge state of the photoelectric conversion element unit 15 forming each of the odd-numbered pixel horizontal columns when the period TCGO elapses under the condition that the outside light does not substantially enter from the imaging surface forming unit. Of the even pixel horizontal row when the period TCGE elapses under the condition that the outside light does not substantially enter from the imaging surface forming unit. An output signal IP representing the charge state of the photoelectric conversion element portions 15 forming each is obtained.

Accordingly, the digital output signal DI based on the output signal IP at that time is supplied to the signal input terminal 44.
As shown in G of FIG. 7, a period longer than one field period starting from the end point of the period TCGO is supplied in the period TDDO, and a period longer than one field period starting from the end point of the period TCGE. For a period of time TDDE.

From the write control signal generator 46 to which the storage command signals CCO and CCE issued from the storage command signal generator 45 are supplied, the storage command signal CCE supplied at the end of the period TCGE and the period TCGO. In response to the storage command signal CCO supplied at the end point of the period TCGE, as shown in F of FIG. 7, over the two-field period from the end point of the period TCGE and the period TCGO.
The write control signal CWC, which takes a high level, is sent over the two-field period from the end of each of the two, and the write control signal CWC is supplied to the control terminal in the data memory unit 47 in which defective data described later is stored. .

In the data memory section 47, data can be written only when the write control signal CWC supplied from the write control signal generating section 46 takes a high level, and in other cases, data read, Alternatively, the data can be erased. Therefore, when the digital output signal DI is supplied to the signal input terminal 44 in the period TDDE and the period TDDO as shown in G of FIG. 7, the data memory unit 47 can write data. Be put into a state.

The digital output signal DI supplied to the signal input terminal 44 in the periods TDDE and TDDO.
The black level is fixed in the clamp section 50, and further, in the blanking section 51, the black level is obtained based on the charges from the photoelectric conversion element section 15 forming each horizontal row of pixels in the image pickup surface forming section of the solid-state image pickup element 11. The portion other than the above portion is subjected to blanking processing to be a digital output signal DI '. Then, the digital output signal DI ′ is supplied to the level comparing section 52 and the level data forming section 57, respectively.

With respect to the digital output signal DI ', the solid-state image pickup device 11 mounted on the device mounting portion 2 is covered with the movable lid 8 and kept in a light-shielded state, and the image pickup surface forming portion thereof is substantially exposed to external light. Since it is based on the output signal IP obtained under the non-operating state, it should represent a small level under the proper operation of the pixels in each imaging surface forming unit, that is, the photoelectric conversion element unit 15. Is. In other words, in the digital output signal DI ′, if there is a portion representing a relatively large level, that portion is a defective portion due to a defective pixel in the imaging surface forming portion.

The level comparing section 52 is supplied with a digital reference level signal DR from the reference level generating section 53, which represents a preset positive reference level. Then, in the level comparing section 52, the digital output signal D
I'is compared with the reference level represented by the digital reference level signal DR, and the level comparing section 52 indicates a low level when the level represented by the digital output signal DI 'is less than or equal to the reference level, and the digital output signal DI'.
When the level represented by the above exceeds the reference level, the defect data DD representing the high level is obtained.

Therefore, in the level comparing section 52, the defective portion included in the digital output signal DI 'is detected by the defective data DD representing the high level. Then, the defect data DD obtained from the level comparing section 52 is sent to the display signal forming section 36 as a first defect detection output, and is also supplied to the defect data storage control section 54.

Under such a condition, the output signal IP from the image pickup surface forming unit in the solid-state image pickup device 11 is output by the portion including the clamp unit 50, the blanking unit 51, the level comparing unit 52 and the reference level generating unit 53. A signal defect detection unit for detecting a defective portion included in the digital output signal DI obtained based on the output from the defective pixel in the imaging surface forming unit is formed.

Further, in the level data forming section 57, the digital output signal D from the blanking section 51 is outputted.
Level data DE representing the level of I'is formed,
That is, the defective data storage control unit 54 and the data memory unit 4
7 is supplied.

The defect data storage control unit 54, when the defect data DD obtained from the level comparison unit 54 indicates a high level, receives the level data D from the level data formation unit 57.
A write control signal CM that causes the data memory unit 47 to take a write state in accordance with each of the maximum level represented by E to the predetermined number in level order.
Supply.

In the data memory section 47, when the write control signal CM from the defective data storage control section 54 is supplied and the write state is established, the level data DE supplied from the level data forming section 57 at that time is supplied. , And is stored as defect level data DED representing the level of the defective portion included in the digital output signal DI ′.

At this time, the vertical clock signal CLV from the signal input terminal 41 is supplied to the vertical address counter (V-address counter) 61, and
Horizontal clock signal CLH through the signal input terminal 42
Is a horizontal address counter (H-address counter)
62. Further, the V-address counter 61
Of the read command signals CRO and C, which are supplied to the signal input terminals 63 and 64 by the timing signal forming unit 26, based on the storage command signals CCO and CCE.
RE is supplied as a reset signal through the adder 65, and the vertical clock signal CLV is supplied to the H-address counter 62 as a reset signal.

As a result, the V-address counter 61
The vertical direction clock signal CL is generated in each of the odd field period and the even field period while the count value is reset each time the read command signals CRO and CRE arrive.
V is counted and count data DAV is sent out. Also, H-
The address counter 62 has a vertical clock signal CLV.
, The horizontal direction clock signal CLH is counted and the count data DAH is transmitted. Therefore, the content of the count data DAV obtained from the V-address counter 61 changes in synchronization with the charge transfer by the vertical charge transfer unit 16 in the image pickup surface forming unit of the solid-state image pickup device 11, and from the H-address counter 62. The content of the obtained count data DAH is supposed to change in synchronization with the charge transfer by the horizontal charge transfer section 18 in the image pickup surface forming section of the solid-state image pickup device 11.

Therefore, the content of the count data DAV obtained from the V-address counter 61 is as follows.
When the output signal IP is obtained from the image pickup surface forming unit, the output signal IP obtained at that time in the image pickup surface forming unit
Represents the vertical address AV that specifies the pixel that has provided the electric charge that has been formed, that is, the pixel horizontal column to which the photoelectric conversion element unit 15 belongs, and the content of the count data DAH obtained from the H-address counter 62. When an output signal IP is obtained from the image pickup surface forming unit of the solid-state image pickup device 11, a pixel in the image pickup surface forming unit that has provided a charge determined to form the image pickup signal IP obtained at that time, that is, It represents a horizontal address AH that specifies the position of the photoelectric conversion element unit 15 in the horizontal pixel column to which it belongs.

Therefore, in the period TDDE and the period TDDO, the defect data DD from the level comparing section 52 is assumed to represent a high level, and the digital output signal D
When a defective portion included in I'is detected, the vertical direction address AV represented by the count data DAV obtained from the V-address counter 61 at that time causes the detected defective portion. Of the defective pixel, or the horizontal row of pixels to which the pseudo defective pixel in the imaging surface forming section corresponding to the detected pseudo defective portion belongs is specified, and at that time, the H-address counter 62
The horizontal address AH represented by the count data DAH obtained from the above specifies the position of the defective pixel in the imaging plane forming portion that causes the detected defective portion in the pixel horizontal column to which it belongs.

In this way, the V-address counter 61
The count data DAV sent from the H-address counter 62 and the count data DAV sent from the H-address counter 62 are supplied to the data memory unit 47. Then, the data memory unit 47
, The count data DAV sent from the V-address counter 61 and the count data DAH sent from the H-address counter 62 are the defective data storage control unit 5.
The defective address data DAVD and DAHD are written and stored in accordance with the write control signal CM supplied from No. 4.

The write data control signal CM is supplied from the defect data storage control unit 54 to the data memory unit 47 from the level data forming unit 57 while the defect data DD obtained from the level comparison unit 52 indicates a high level. Level data D
In the data memory section 47, the digital output signal D
The vertical address AV and the horizontal address AH that specify each defective pixel in the imaging surface forming unit, which causes the defective portion in I'from the maximum level to the predetermined number in the level order, are represented. The count data DAV and the count data DAH are stored as the defective address data DAVD and DAHD.

When the period TDDE and the period TDDO have elapsed, the write control signal CWC from the write control signal generator 46 is generated.
From the detection end signal generating section 69 to which is supplied the detection end signal CE, which is formed in accordance with the trailing edge of the write control signal CWC, as shown in H of FIG. 7, is obtained. Are supplied to the control unit 34. Thereby, the control unit 34, as shown in FIG.
The transmission of the defect detection command signal CST is stopped at the leading edge of the detection end signal CE. Then, the detection end signal C
At the time of the leading edge of E, the defect detection operation by the defect detection unit 33, that is, the defect portion in the digital output signal DI ′ is detected, and the defect data DD is sent to the display signal formation unit 36 as the first defect detection output. And defect address data DAVD and DAHD that specify defective pixels in the imaging surface forming portion of the solid-state imaging device 11 that cause the detected defective portion, and a defect level that indicates the level of the detected defective portion. The operation of storing the data DED in the data memory unit 47 is completed, and the signal output period T
Return to CO.

In the defect detecting section 33 having completed the defect detecting operation, in the subsequent signal output period TCO, the defect address data DAVD and DAHD and the defect level data DED stored therein are stored in the data memory section 47. Read and read defective address data DAV
D and DAHD are sent to the display signal forming unit 36 as the second defect detection output, and the read defect level data DED is sent as the third defect detection output.

[0068]

As is apparent from the above description, in the image pickup device defect detection apparatus according to the present invention, the image pickup device is mounted on the device mounting portion and driven by the device driving portion. When a defect portion included in the output signal from the image sensor is detected by the defect detection unit and the defect portion is detected, for example, defect data indicating that the defect portion is detected, the detected defect portion The defect address data that specifies the defective pixel in the imaging surface forming unit that causes the above, the defect level data that represents the level of the detected defective portion, and the like are transmitted as the defect detection output, and the display unit is based on the defect detection output. The number of defective pixels in the image pickup surface forming section of the image pickup element mounted in the element mounting section, the defective pixel in the image pickup surface forming section, Position, the display of the level in the detected defective portion by the defect detection section is made.

Therefore, according to the image pickup device defect detection apparatus of the present invention, when the image pickup device is actually shipped as a product, or when the image pickup device is accepted by the user, the image pickup device is mounted on the element mounting portion. The situation of defective pixels in the image pickup surface forming unit of the image pickup device can be accurately determined based on the display by the display unit by simply performing a very easy procedure of being mounted on the image pickup device and being driven by the element drive unit. You will be able to check.

[Brief description of drawings]

FIG. 1 is a block configuration diagram showing a main part in an example of an image sensor defect detection device according to the present invention.

FIG. 2 is a perspective view showing an appearance of an example of an image sensor defect detection device according to the present invention.

FIG. 3 is a schematic configuration diagram showing an example of a solid-state image sensor in which defect detection and display regarding defective pixels are performed by an example of the image sensor defect detection apparatus according to the present invention.

FIG. 4 is a time chart used to explain the operation of the solid-state imaging device shown in FIG.

5 is a time chart used for explaining the operation of the solid-state imaging device shown in FIG.

6 is a block configuration diagram showing an example of a specific configuration of a defect detection unit in the main part shown in FIG. 1. FIG.

7 is a time chart used for explaining an example of the operation of the specific configuration of the defect detection unit shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Enclosure 2 Element mounting part 3 Operation part 4 1st display part 5 2nd display part 6 3rd display part 7 Hinge part 8 Movable lid body 11 Solid-state image sensor 13 Semiconductor substrate 15 Photoelectric conversion element part 16 Vertical charge Transfer unit 17 Charge read gate unit 18 Horizontal charge transfer unit 19 Charge output unit 20 Output terminal 25 Drive signal forming unit 26 Timing signal forming unit 27 Synchronous signal generating unit 30 Sampling and holding unit 31 A / D conversion unit 32 Output terminal 33 Defect Detection unit 34 Control unit 35 Defect detection switch 36 Display signal formation unit 37 Display unit 45 Storage command signal generation unit 46 Write control signal generation unit 47 Data memory unit 50 Clamp unit 51 Blanking unit 52 Level comparison unit 53 Reference level generation Part 54 Defect data storage control part 57 Level data forming part 61 V-address counter 6 H- address counter

Claims (7)

[Claims] 1. An element mounting portion to which an image pickup element having an image pickup surface forming portion formed by arranging a plurality of pixels is mounted, and an element driving portion which drives the image pickup element mounted to the element mounting portion. Detecting a defective portion due to a defective pixel in the imaging surface forming unit, which is included in an output signal from the imaging device driven by the element driving unit, and outputs a defect detection output corresponding to the detected defective portion. A defect detection unit, a display signal formation unit that forms a display signal based on a defect detection output sent from the defect detection unit, and a display signal obtained from the display signal formation unit,
An image sensor defect detection device configured to include a display section that displays a defective pixel of the image sensor mounted on the element mounting section. 2. When the defect detecting section detects a defective portion, the cause of the defective portion in the address data specifying each pixel in the image pickup surface forming portion of the image pickup device mounted in the element mounting portion is determined. 2. The image sensor defect detection according to claim 1, further comprising data memory means for storing the defect address data corresponding to the defective pixel to be formed and transmitting the stored defect address data as a defect detection output. apparatus. 3. A defect detecting section is provided with a data memory means for storing defect level data representing a level of a detected defective portion and sending the stored defect level data as a defect detection output. Claim 1
The image pickup device defect detection device described. 4. When the defect detecting section detects a defective portion, the cause of the defective portion in the address data specifying each pixel in the image pickup surface forming portion of the image pickup device mounted in the element mounting portion is determined. The defect address data corresponding to the defective pixel to be formed and the defect level data representing the level of the defective portion are stored, and each of the stored defect address data and defect level data is sent as a defect detection output. The image sensor defect detection device according to claim 1, further comprising data memory means. 5. A defect detection section, when a defective portion is detected, sends defect data indicating that the defective portion has been detected as a first defect detection output, and
5. The image sensor defect detection device according to claim 4, wherein the defect address data and the defect level data from the data memory means are sent as second and third defect detection outputs, respectively. 6. The number of defective pixels in an image pickup surface forming portion of an image pickup device mounted on the device mounting portion,
2. The image sensor defect detection device according to claim 1, wherein the position of the defective pixel in the imaging surface forming unit and the level of the defective portion detected by the defect detection unit are displayed. 7. The image sensor defect detection apparatus according to claim 1, wherein the element mounting section functions as a thermostatic device for the image sensor mounted on the element mounting section.