JPH08124749A - Chip inductor and its manufacture - Google Patents
Chip inductor and its manufactureInfo
- Publication number
- JPH08124749A JPH08124749A JP26524194A JP26524194A JPH08124749A JP H08124749 A JPH08124749 A JP H08124749A JP 26524194 A JP26524194 A JP 26524194A JP 26524194 A JP26524194 A JP 26524194A JP H08124749 A JPH08124749 A JP H08124749A
- Authority
- JP
- Japan
- Prior art keywords
- core
- chip inductor
- coated
- magnetic
- inductor according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Landscapes
- Manufacturing Cores, Coils, And Magnets (AREA)
- Coils Or Transformers For Communication (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明はパソコン、テレビ、ビデ
オ等の電子機器および通信機器等に使用されるチップイ
ンダクタおよびその製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip inductor used in electronic devices such as personal computers, televisions, video devices, communication devices, etc., and a method of manufacturing the same.
【0002】[0002]
【従来の技術】近年、各種電子機器および通信機器の小
型化に伴い、これら電子機器および通信機器に用いられ
る部品は小型化が要求され、チップインダクタについて
も小型化が進みつつある。2. Description of the Related Art In recent years, with the miniaturization of various electronic equipment and communication equipment, miniaturization of parts used in these electronic equipment and communication equipment is required, and miniaturization of chip inductors is also progressing.
【0003】以下に従来のチップインダクタについて説
明する。従来のチップインダクタとして、例えば特開平
4−323809に開示されているものがあった。A conventional chip inductor will be described below. As a conventional chip inductor, for example, there is one disclosed in Japanese Patent Laid-Open No. 4-323809.
【0004】図18は従来のチップインダクタを説明す
るための平面図である。従来のチップインダクタは、U
字型チップ181に被覆導線2を巻回し、一字型チップ
182をU字型チップ181の両端の接合面に接合す
る。電極183には金属板を加工したものを用い、U字
型チップ181の側面で被覆導線2と電極183を接合
したものであった。しかしながら上記の従来のチップイ
ンダクタでは電極が金属板であるため、コストが高く、
また金属板加工の微細化に限界があるため、小型化が困
難であるという問題があった。FIG. 18 is a plan view for explaining a conventional chip inductor. The conventional chip inductor is U
The coated conductive wire 2 is wound around the U-shaped chip 181, and the one-shaped chip 182 is bonded to the bonding surfaces at both ends of the U-shaped chip 181. A metal plate was used as the electrode 183, and the coated conductive wire 2 and the electrode 183 were joined at the side surface of the U-shaped chip 181. However, in the above-mentioned conventional chip inductor, since the electrodes are metal plates, the cost is high,
Further, there is a problem that miniaturization is difficult because there is a limit to miniaturization of metal plate processing.
【0005】その対策のため従来は特開昭57−482
16にあるように、フェライトの表面に厚膜外部電極を
形成したチップインダクタがある。図19は従来の他の
チップインダクタの斜視図である。図19において1は
コの字型のコアであり、2は被覆導線、3はこの被覆導
線の端面、191は厚膜外部電極である。コア1の溝を
除く溝側の面に厚膜外部電極191を形成し、コア1の
溝に被覆導線2を巻回し、端部3を前記厚膜外部電極1
91に接続する。As a countermeasure against this, the conventional method is Japanese Patent Laid-Open No. 57-482.
16, there is a chip inductor in which a thick film external electrode is formed on the surface of ferrite. FIG. 19 is a perspective view of another conventional chip inductor. In FIG. 19, 1 is a U-shaped core, 2 is a coated conductive wire, 3 is an end face of this coated conductive wire, and 191 is a thick film external electrode. A thick film external electrode 191 is formed on the groove-side surface of the core 1 excluding the groove, the coated conductive wire 2 is wound around the groove of the core 1, and the end portion 3 is formed by the thick film external electrode 1
Connect to 91.
【0006】[0006]
【発明が解決しようとする課題】しかしこの従来のチッ
プインダクタでは磁束が電極によって遮蔽されてしまう
ため、大きなインダクタンス値が得られない。大きなイ
ンダクタンス値を得ようとすると形状が大きくなり、小
型化が困難である。However, since the magnetic flux is shielded by the electrodes in this conventional chip inductor, a large inductance value cannot be obtained. When trying to obtain a large inductance value, the shape becomes large and it is difficult to reduce the size.
【0007】本発明は上記従来の問題点を解決するもの
で、インダクタンス値が大きく、安価で小型のチップイ
ンダクタおよびその製造方法を提供することを目的とす
る。The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide an inexpensive and small chip inductor having a large inductance value and a manufacturing method thereof.
【0008】[0008]
【課題を解決するための手段】この目的を達成するため
に本発明のチップインダクタはコアに被覆導線を巻回
し、前記コアの相対向する両端面と各々同一平面上に被
覆導線の端面を配置し、概略直方体に前記コアの相対向
する両端面を除く側面のみを樹脂モールドし、前記相対
向する両端部において被覆導線の端部と接続する厚膜外
部電極を具備させたものである。In order to achieve this object, the chip inductor of the present invention has a core in which a coated wire is wound, and the end surfaces of the coated wire are arranged on the same plane as the opposite end surfaces of the core. However, only the side surfaces of the core other than the opposite end surfaces of the core are resin-molded in the substantially rectangular parallelepiped, and the thick film external electrodes connected to the end portions of the covered conductor at the opposite end portions are provided.
【0009】[0009]
【作用】この構成により、厚膜により形成された外部電
極と被覆導線の端部が接続されるため、電極用金属板が
不要であり、また微細な電極形成が可能となり、製造コ
ストが低減され、小型化が可能となる。またコアの軸方
向と垂直な面に電極があるため、磁束が遮蔽することな
く、大きなインダクタンス値で小型化が可能である。With this structure, since the external electrode formed of a thick film and the end of the covered conductor are connected to each other, a metal plate for an electrode is not required and a fine electrode can be formed, which reduces the manufacturing cost. It is possible to reduce the size. Further, since the electrode is located on the surface perpendicular to the axial direction of the core, the magnetic flux is not shielded, and the size can be reduced with a large inductance value.
【0010】[0010]
(実施例1)以下本発明の一実施例について、図面を参
照しながら説明する。図1は本発明の第一の実施例にお
けるチップインダクタの斜視図、図2はその断面図であ
る。(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. 1 is a perspective view of a chip inductor according to a first embodiment of the present invention, and FIG. 2 is a sectional view thereof.
【0011】図1および図2において1はコア、2は被
覆導線、3は被覆導線の端面、4はモールド樹脂、5は
コア端面、6は厚膜外部電極である。コア1に被覆導線
2が巻回され、このコア1の相対する両端面5には厚膜
外部電極6が形成されており、前記被覆導線の端面3が
コア1の相対する両端面5と同一平面上に設置されてお
り、前記厚膜外部電極6に電気接続されている。また前
記被覆導線2が巻回されたコア1の周囲はコア1の相対
する両側面を除いた側面をモールド樹脂4で覆われてい
る。1 and 2, 1 is a core, 2 is a coated conductor, 3 is an end face of the coated conductor, 4 is a mold resin, 5 is a core end face, and 6 is a thick film external electrode. A coated wire 2 is wound around a core 1, and thick film external electrodes 6 are formed on opposite end surfaces 5 of the core 1. The end surface 3 of the coated wire is the same as the opposite end surfaces 5 of the core 1. It is installed on a plane and is electrically connected to the thick film external electrode 6. In addition, the periphery of the core 1 around which the coated conductive wire 2 is wound is covered with the molding resin 4 on the side surfaces of the core 1 excluding the opposite side surfaces.
【0012】本実施例のコア1は巻線に耐える機械強度
を有し、大容量のインダクタを実現するため透磁率の高
い磁性材料、たとえばNi−Zn系フィライトにより構
成される。なおこの磁性材料は、酸化物系のフィライ
ト、鉄系金属あるいは合金系、たとえばセンダスト合
金、パーマロイ合金、アモルファス合金であってもよ
い。The core 1 of this embodiment has a mechanical strength capable of withstanding windings and is made of a magnetic material having a high magnetic permeability, for example, Ni--Zn based phyllite in order to realize a large-capacity inductor. The magnetic material may be oxide-based phyllite, iron-based metal or alloy-based material such as sendust alloy, permalloy alloy, or amorphous alloy.
【0013】また被覆導線2は、たとえばウレタン被覆
銅線であり、前記コア1に所望のインダクタンス値にな
るターン数だけ巻回されている。The coated conductor wire 2 is, for example, a urethane-coated copper wire, and is wound around the core 1 by the number of turns that provides a desired inductance value.
【0014】モールド樹脂4は耐熱性に優れた熱硬化性
樹脂、たとえばエポキシ樹脂を用いる。モールドにより
概略直方体のチップインダクタが得られ、自動実装機に
よる吸着が可能となる。The mold resin 4 is a thermosetting resin having excellent heat resistance, such as an epoxy resin. Molding gives a chip inductor in a substantially rectangular parallelepiped shape, which can be adsorbed by an automatic mounting machine.
【0015】厚膜外部電極6はチップ部品としての実装
性と端子強度を満足するため、たとえば導電性樹脂をデ
ィップあるいは印刷の後焼き付けすることにより得られ
る。後述する製造法によると端面上に被覆導線の端面と
コアの端面が露出しているため、ディップあるいは印刷
により端面に電極が形成されると同時に被覆導線とも電
気接続される。これにより、電極形成と被覆導線接続の
2工程が1工程に削減でき、安価にチップインダクタが
製造できる。Since the thick film external electrode 6 satisfies the mountability as a chip component and the terminal strength, it can be obtained by, for example, dipping a conductive resin or baking after printing. According to the manufacturing method described later, since the end face of the coated conductor and the end face of the core are exposed on the end face, an electrode is formed on the end face by dipping or printing, and at the same time, the coated conductor is electrically connected. As a result, the two steps of forming the electrodes and connecting the coated conductors can be reduced to one step, and the chip inductor can be manufactured at low cost.
【0016】なお厚膜外部電極6は銀焼き付け型電極、
電気メッキ電極、無電解メッキ電極、薄膜電極を用いて
もよい。The thick film external electrode 6 is a silver baking type electrode,
An electroplating electrode, an electroless plating electrode, or a thin film electrode may be used.
【0017】本発明の第1の実施例のチップインダクタ
の製造方法を図3に示す。まず図3(a)のフェライト
グリーンシートに図3(b)のようにパンチング穴(方
形)およびブレーク溝(点線)を設け、焼成後ブレーク
によって図3(c)の長尺コア61を得る。図3(d)
に示すように前記長尺コア61に被覆導線2を巻回し、
図3(e)に示すように被覆導線2を巻回した長尺コア
61をモールド樹脂4でモールドし、切断位置62で切
断し、図3(f)に示すように切断面に電極6を形成す
る。なお電極6は切断面および切断面に接する4つの面
の一部計5つの面に形成してもよい。FIG. 3 shows a method of manufacturing the chip inductor of the first embodiment of the present invention. First, a punching hole (square) and a break groove (dotted line) are provided in the ferrite green sheet of FIG. 3A as shown in FIG. 3B, and the long core 61 of FIG. 3C is obtained by a break after firing. Figure 3 (d)
As shown in, winding the covered wire 2 around the long core 61,
As shown in FIG. 3 (e), the long core 61 wound with the coated conductive wire 2 is molded with the molding resin 4, cut at the cutting position 62, and the electrode 6 is attached to the cut surface as shown in FIG. 3 (f). Form. The electrodes 6 may be formed on a cut surface and a part of the four surfaces in contact with the cut surface, that is, a total of five surfaces.
【0018】フェライトグリーンシートを積層し、パン
チング機で穴加工し、焼成後、長尺状にブレークしてい
るため、加工時間が短く、安価に製造できるという効果
がある。Since ferrite green sheets are laminated, holes are punched by a punching machine, and a long break is formed after firing, there is an effect that the processing time is short and the manufacturing is inexpensive.
【0019】なお図3(a)の焼結フェライト板を用
い、レーザにより図3(b)の角穴あけおよび切断を行
って図3(c)の長尺コア61を得ることもできる。It is also possible to obtain the long core 61 of FIG. 3 (c) by using the sintered ferrite plate of FIG. 3 (a) and performing the square hole and cutting of FIG. 3 (b) with a laser.
【0020】また被覆導線の端面3は斜め切断された楕
円であってもよい。斜め切断の方法はコアに被覆導線を
巻回し、被覆導線の端部をコアの端面に斜めに設置し、
樹脂モールドの後、コアと直角に切断する。コア端面と
平行に切断する被覆導線の端面3と厚膜外部電極5はそ
れぞれ接触面積が大きくなり、接続の信頼性が増す。Further, the end face 3 of the coated conductor wire may be an ellipse cut obliquely. The method of diagonal cutting is to wind the coated conductor around the core, install the end of the coated conductor diagonally to the end surface of the core,
After resin molding, cut at right angles to the core. The end surface 3 of the coated conductor and the thick film external electrode 5 which are cut in parallel with the end surface of the core have a large contact area, thereby increasing the reliability of connection.
【0021】本発明の実施例1のチップインダクタとし
て、外寸が0.5×0.6×1.6mmのコの字型で透磁
率が650のコアに、30μmの被覆導線を30ターン
巻回することによりインダクタンス値3μH、チップサ
イズが日本電子機械工業会が規定する1608サイズの
小型インダクタンスが得られる。また磁束はコアの軸部
分、コア凸部、補助コア、他のコア凸部にほとんど閉じ
こめられている。As the chip inductor according to the first embodiment of the present invention, a U-shaped core having an outer size of 0.5 × 0.6 × 1.6 mm and a magnetic permeability of 650 is wound with 30 turns of a coated wire of 30 μm. By turning, a small inductance having an inductance value of 3 μH and a chip size of 1608 size defined by the Japan Electronic Machinery Manufacturers Association is obtained. Further, the magnetic flux is almost confined in the axial portion of the core, the core convex portion, the auxiliary core, and the other core convex portions.
【0022】(実施例2)以下本発明の第2の実施例に
ついて、図面を参照しながら説明する。図4は本発明の
第2の実施例におけるチップインダクタの斜視図であ
る。41は角棒状磁性体コアである。その他の構成で実
施例1と同様のものには同じ番号を付している。外形が
概略直方体であるチップインダクタにおいて、本発明の
第2の実施例ではコアが角棒状であるため、チップイン
ダクタの外側面近傍まで、コアの形状を大きくでき、コ
アの断面積が大きくなり、インダクタンス値が大きくで
きるという効果がある。(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings. FIG. 4 is a perspective view of a chip inductor according to the second embodiment of the present invention. 41 is a square bar-shaped magnetic core. The other components having the same configurations as those in the first embodiment are denoted by the same reference numerals. In the chip inductor whose outer shape is a substantially rectangular parallelepiped, since the core has a square rod shape in the second embodiment of the present invention, the shape of the core can be increased up to the vicinity of the outer surface of the chip inductor, and the cross-sectional area of the core increases, There is an effect that the inductance value can be increased.
【0023】(実施例3)以下本発明の第3の実施例に
ついて説明する。図5に示すように、コアがHの字型磁
性体51を用いることにより、被覆導線の巻線位置が安
定し、インダクタンス値のバラツキを小さくできる。ま
た、磁束がHの字に沿うため、外部厚膜電極に遮蔽され
ない。このためインダクタンス値が低下することはな
い。(Embodiment 3) A third embodiment of the present invention will be described below. As shown in FIG. 5, by using the H-shaped magnetic body 51 having the H-shaped core, the winding position of the coated conductor is stabilized and the variation in the inductance value can be reduced. Further, since the magnetic flux is along the letter H, it is not shielded by the external thick film electrode. Therefore, the inductance value does not decrease.
【0024】(実施例4)以下本発明の第4の実施例に
ついて説明する。コアとして角棒状非磁性体を用いる。
本実施例では低誘電率のアルミナを用いる。これにより
線間浮遊容量を小さくでき、使用できる周波数の上限を
数百MHzから数GHzに拡大できるため、高周波用のイン
ダクタが得られる。(Embodiment 4) A fourth embodiment of the present invention will be described below. A square rod-shaped nonmagnetic material is used as the core.
In this embodiment, low dielectric constant alumina is used. As a result, the stray capacitance between lines can be reduced, and the upper limit of usable frequency can be expanded from several hundred MHz to several GHz, so that a high frequency inductor can be obtained.
【0025】(実施例5)以下本発明の第5の実施例に
ついて説明する。コアとしてコの字型非磁性体を用い
る。本実施例ではコの字型の低誘電率のアルミナを用い
る。これにより線間浮遊容量を小さくでき、使用できる
周波数の上限を数百MHzから数GHzに拡大でき、しかも
巻線位置が安定するため、バラツキの小さい高周波用の
インダクタが得られる。(Fifth Embodiment) A fifth embodiment of the present invention will be described below. A U-shaped non-magnetic material is used as the core. In this embodiment, U-shaped alumina having a low dielectric constant is used. As a result, the stray capacitance between lines can be reduced, the upper limit of usable frequency can be expanded from several hundred MHz to several GHz, and the winding position can be stabilized, so that a high-frequency inductor with less variation can be obtained.
【0026】(実施例6)以下本発明の第6の実施例に
ついて説明する。第6の実施例ではコアとしてHの字型
非磁性体を用いる。本実施例ではHの字型の低誘電率の
アルミナを用いる。これにより線間浮遊容量を小さくで
き、使用できる周波数の上限が数百MHzから数GHzと拡
大でき、しかも巻線位置が安定するため、バラツキの小
さい高周波用のインダクタが得られる。(Embodiment 6) A sixth embodiment of the present invention will be described below. In the sixth embodiment, an H-shaped non-magnetic material is used as the core. In this embodiment, an H-shaped alumina having a low dielectric constant is used. As a result, the stray capacitance between lines can be reduced, the upper limit of the usable frequency can be expanded from several hundred MHz to several GHz, and the winding position can be stabilized, so that a high-frequency inductor with less variation can be obtained.
【0027】(実施例7)以下本発明の第7の実施例に
ついて説明する。図6は本発明の第7の実施例における
チップインダクタの斜視図である。被覆導線の端部7が
コアの両端面5の外周部に沿って配置されている。本発
明の第7の実施例に用いるコアは図7に斜視図を示すよ
うに、コアの相対向する両端面の外周部に溝8を有し、
この溝8の内側には導電部9が存在する。(Embodiment 7) A seventh embodiment of the present invention will be described below. FIG. 6 is a perspective view of a chip inductor according to a seventh embodiment of the present invention. The end portion 7 of the coated conductor wire is arranged along the outer periphery of both end surfaces 5 of the core. As shown in the perspective view of FIG. 7, the core used in the seventh embodiment of the present invention has grooves 8 on the outer peripheral portions of the opposite end surfaces of the core,
A conductive portion 9 exists inside the groove 8.
【0028】本発明の第7の実施例のチップインダクタ
の製造方法を図8に示す。図8(a)のフェライトグリ
ーンシートに図8(b)に示す角穴81及びスルーホー
ル穴82を開け、スルーホール穴をまたいでブレーク溝
を設ける。スルーホール穴82に銀等の導電材料を印刷
し、内側に導電部を形成する。焼成の後、前記スルーホ
ール穴82を含む面でのブレークによって図8(c)に
示す溝8および導電部9を含む長尺状のフェライトコア
83を得る。前記コア83に被覆導線2を巻回する。そ
の際被覆導線2が溝8を通過するように巻回する。被覆
導線の端部7に相当する箇所の被覆をレーザ照射等によ
り剥がし、はんだ等により導電部9と電気接続する。モ
ールド後前記溝8を含む面で切断して個片にし、外部電
極を形成する。この外部電極形成はたとえば導電性樹脂
をディップすることにより得られる。前記導電部9の断
面が露出しているためこのディップにより外部電極と導
電部9が接続される。この結果被覆導線2の端部7と厚
膜外部電極5との接触面積が大きくなり、接続の信頼性
が向上するという効果がある。FIG. 8 shows a method of manufacturing the chip inductor of the seventh embodiment of the present invention. A square hole 81 and a through hole 82 shown in FIG. 8B are formed in the ferrite green sheet of FIG. 8A, and a break groove is provided across the through hole. A conductive material such as silver is printed in the through hole 82 to form a conductive portion inside. After firing, a long ferrite core 83 including the groove 8 and the conductive portion 9 shown in FIG. 8C is obtained by breaking on the surface including the through hole 82. The coated conductive wire 2 is wound around the core 83. At that time, the coated wire 2 is wound so as to pass through the groove 8. The coating of the portion corresponding to the end 7 of the coated conductor is peeled off by laser irradiation or the like, and electrically connected to the conductive portion 9 by soldering or the like. After molding, the surface including the groove 8 is cut into individual pieces to form external electrodes. This external electrode formation is obtained, for example, by dipping a conductive resin. Since the cross section of the conductive portion 9 is exposed, the external electrode and the conductive portion 9 are connected by this dip. As a result, the contact area between the end portion 7 of the coated conductor 2 and the thick film external electrode 5 is increased, and the connection reliability is improved.
【0029】(実施例8)以下本発明の第8の実施例に
ついて説明する。図9は第8の実施例のチップインダク
タの斜視図である。91は補助コアである。(Embodiment 8) An eighth embodiment of the present invention will be described below. FIG. 9 is a perspective view of the chip inductor of the eighth embodiment. 91 is an auxiliary core.
【0030】本発明の第8の実施例のチップインダクタ
の製造方法を図10に示す。図10(a)のフェライト
グリーンシートに図10(b)の角穴およびブレーク溝
加工を施し、焼成する。ブレークによって長尺状のフェ
ライトコア61を図10(c)のように得る。このと
き、単純な角棒状の補助コア71も同時に得る。図10
(d)に示すようにこの長尺コア61に被覆導線を巻回
し、図10(e)に示すように長尺の補助コア71を前
記長尺コアに貼り合わせる。さらに樹脂モールドして、
図10(f)の矢印62の位置で切断する。得られた個
片の断面に厚膜電極を形成する。長尺の補助コア71も
グリーンシート積層により形成される。FIG. 10 shows a method of manufacturing a chip inductor according to the eighth embodiment of the present invention. The ferrite green sheet of FIG. 10 (a) is subjected to the square hole and break groove processing of FIG. 10 (b) and fired. By the break, a long ferrite core 61 is obtained as shown in FIG. At this time, a simple prismatic auxiliary core 71 is also obtained at the same time. Figure 10
As shown in (d), the coated conductor is wound around the long core 61, and the long auxiliary core 71 is attached to the long core as shown in FIG. 10 (e). Further resin mold,
The cutting is performed at the position of arrow 62 in FIG. A thick film electrode is formed on the cross section of the obtained individual piece. The long auxiliary core 71 is also formed by stacking green sheets.
【0031】図9の補助コア91はコア1と概略閉磁路
を構成している。このためインダクタンス値は大きくな
るという効果がある。またコア1と補助コア6の間隙を
設けることにより、磁気飽和が緩和され、インダクタン
ス値が低下し始める直流電流を大きくすることができ
る。The auxiliary core 91 of FIG. 9 constitutes a closed magnetic circuit with the core 1. Therefore, there is an effect that the inductance value becomes large. Further, by providing a gap between the core 1 and the auxiliary core 6, it is possible to relax the magnetic saturation and increase the DC current at which the inductance value starts to decrease.
【0032】長尺コアを製造するのに、フェライトグリ
ーンシートを積層し、パンチング機で穴加工し、焼成
後、長尺状にブレークしているため、加工時間が短く、
安価に製造できるという効果がある。また補助コアは長
尺コア用グリーンシート中に同時に形成でき、ブレーク
によって長尺と分離できる。In order to produce a long core, ferrite green sheets are laminated, holes are punched by a punching machine, and after firing, breaks into a long shape.
There is an effect that it can be manufactured at low cost. Further, the auxiliary core can be formed simultaneously in the green sheet for the long core, and can be separated from the long core by the break.
【0033】(実施例9)本発明の第9の実施例を図1
1の斜視図を用いて説明する。92は棒状のコアであ
り、93はコの字型の補助コアである。棒状コア92に
被覆導線2が巻回されている。コアが棒状である場合
は、長尺コアに被覆導線を同じピッチで連続して巻回す
ることができるため、製造コストが低減できる。さらに
補助コアがコの字状であるため、棒状コアとの組み合わ
せで閉磁路を構成でき、インダクタンス値を大きくでき
る。(Embodiment 9) A ninth embodiment of the present invention is shown in FIG.
1 will be described with reference to the perspective view of FIG. Reference numeral 92 is a rod-shaped core, and 93 is a U-shaped auxiliary core. The coated conductor wire 2 is wound around the rod-shaped core 92. When the core is rod-shaped, the coated conductors can be continuously wound around the long core at the same pitch, so that the manufacturing cost can be reduced. Further, since the auxiliary core is U-shaped, a closed magnetic circuit can be formed by combining with the rod-shaped core, and the inductance value can be increased.
【0034】(実施例10)本発明の第10の実施例を
図12の斜視図を用いて説明する。1はコの字型コア、
121はコの字型補助コアである。コアがコの字型で、
補助コアもコの字型である場合、両者を組み合わせると
円に近い閉磁路が構成できるため、磁気抵抗が低く、イ
ンダクタンスが大きくなるという効果が得られる。(Embodiment 10) A tenth embodiment of the present invention will be described with reference to the perspective view of FIG. 1 is a U-shaped core,
Reference numeral 121 is a U-shaped auxiliary core. The core is U-shaped,
When the auxiliary core is also U-shaped, a closed magnetic circuit close to a circle can be formed by combining the two, so that the magnetic resistance is low and the inductance is large.
【0035】(実施例11)本発明の第11の実施例を
以下に説明する。図9にみる構成において、コア1およ
び補助コア91がNi−Zn系フェライトで構成されて
いる。Ni−Zn系フェライトは絶縁抵抗が高いため、
フェライトの両端面に外部電極を形成しても電極間が短
絡するという問題は生じない。外部電極形成のコストが
小さくできるため安価にチップインダクタが量産できる
という効果がある。(Embodiment 11) An eleventh embodiment of the present invention will be described below. In the configuration shown in FIG. 9, the core 1 and the auxiliary core 91 are made of Ni—Zn based ferrite. Since Ni-Zn ferrite has high insulation resistance,
Even if the external electrodes are formed on both end faces of the ferrite, the problem of short circuit between the electrodes does not occur. Since the cost of forming the external electrodes can be reduced, the chip inductor can be mass-produced at low cost.
【0036】(実施例12)本発明の第12の実施例を
以下に説明する。図9にみる構成において、コア1と補
助コア91が透磁率が異なる磁性体、たとえばコア1が
透磁率600のNi−Zn系フェライト、補助コア91
が透磁率2400のMn−Zn系フェライトで構成され
ている。コア1はNi−Zn系フェライトで構成されて
いるため、絶縁抵抗が高い。したがって、コア1の両端
面に直接外部電極を形成することができる。一方補助コ
アはMn−Zn系フェライトで構成されているため、絶
縁抵抗が低く、表面に直接外部電極を形成することはで
きないが、補助コアとしては用いることができる。コア
1と補助コア91で構成された本発明の第12の実施例
のインダクタの磁気回路の磁気抵抗はNi−Zn系フェ
ライトだけで構成されたインダクタの磁気抵抗より小さ
くなる。このためインダクタンス値が大きくなるという
効果がある。(Embodiment 12) A twelfth embodiment of the present invention will be described below. In the configuration shown in FIG. 9, the core 1 and the auxiliary core 91 are magnetic bodies having different magnetic permeability, for example, the core 1 is a Ni—Zn ferrite having a magnetic permeability of 600, and the auxiliary core 91.
Is composed of Mn—Zn ferrite having a magnetic permeability of 2400. Since the core 1 is made of Ni-Zn ferrite, the insulation resistance is high. Therefore, external electrodes can be directly formed on both end surfaces of the core 1. On the other hand, since the auxiliary core is made of Mn-Zn-based ferrite, it has a low insulation resistance and the external electrode cannot be directly formed on the surface, but it can be used as the auxiliary core. The magnetic resistance of the magnetic circuit of the inductor according to the twelfth embodiment of the present invention constituted by the core 1 and the auxiliary core 91 is smaller than the magnetic resistance of the inductor constituted only by the Ni—Zn ferrite. Therefore, there is an effect that the inductance value becomes large.
【0037】(実施例13)本発明の第13の実施例を
以下に説明する。図9にみる構成のモールド樹脂として
フェライト粉末を充填した樹脂、たとえばフェライト粉
末を80%充填したエポキシ系樹脂を用いる。(Thirteenth Embodiment) The thirteenth embodiment of the present invention will be described below. A resin filled with ferrite powder, for example, an epoxy resin filled with 80% ferrite powder is used as the molding resin having the configuration shown in FIG.
【0038】図9の構造のチップサイズが2.0×1.
25mmであるチップインダクタにおいて、透磁率650
のコアおよび補助コアを用い、コアと補助コアの間隔が
計250μmであり、前記コアに線径70μmの被覆導
線を40ターン巻回し、フェライトを充填したモールド
樹脂で用いた場合のフェライトの充填率とインダクタン
ス値の関係のグラフを図13に示す。The chip size of the structure of FIG. 9 is 2.0 × 1.
Permeability of 650 in a 25 mm chip inductor
When the core and the auxiliary core are used, the distance between the core and the auxiliary core is 250 μm in total, and the coated conductor wire having a wire diameter of 70 μm is wound 40 turns around the core, and the ferrite filling rate is used in a molding resin filled with ferrite. FIG. 13 shows a graph of the relationship between the inductance value and the inductance value.
【0039】図13によりフェライトの充填率を増加す
ることはインダクタンス値の増加に効果があることがわ
かる。ただし充填率が大きすぎるとモールド樹脂の流動
性が低下するので、流動性が確保できる範囲で充填率を
選ぶ必要がある。It can be seen from FIG. 13 that increasing the filling rate of ferrite is effective in increasing the inductance value. However, if the filling rate is too high, the fluidity of the mold resin will decrease, so it is necessary to select the filling rate within the range in which the fluidity can be secured.
【0040】(実施例14)本発明の第14の実施例を
以下に説明する。長尺のコアと長尺の補助コアをモール
ド金型の中で位置決めし、樹脂モールドする。これによ
り貼り合わせの工程を省くことができるため、貼り合わ
せ設備および工数が削減でき、安価に製造できるという
効果がある。(Fourteenth Embodiment) A fourteenth embodiment of the present invention will be described below. The long core and the long auxiliary core are positioned in the molding die and resin-molded. As a result, the step of bonding can be omitted, so that the bonding equipment and man-hours can be reduced, and the manufacturing cost can be reduced.
【0041】(実施例15)本発明の第15の実施例を
以下に説明する。図14は本発明の第15の実施例の説
明図である。製造工程において図14(a)に示すよう
に長尺コア141と長尺の補助コア143の間にストリ
ップ状のスペーサ142を入れる。その結果出来上がっ
たチップインダクタは図14(b)に示すようにコア1
と補助コア91はスペーサ144を介して接する。(Fifteenth Embodiment) A fifteenth embodiment of the present invention will be described below. FIG. 14 is an explanatory diagram of the fifteenth embodiment of the present invention. In the manufacturing process, as shown in FIG. 14A, a strip-shaped spacer 142 is inserted between the elongated core 141 and the elongated auxiliary core 143. The resulting chip inductor has core 1 as shown in FIG.
And the auxiliary core 91 are in contact with each other via the spacer 144.
【0042】スペーサを介することにより、コアと補助
コアの間隔が一定になり、間隔に依存するインダクタン
ス値や直流重畳特性等のバラツキが小さくできる。By using the spacer, the distance between the core and the auxiliary core becomes constant, and variations in the inductance value and DC superposition characteristics depending on the distance can be reduced.
【0043】(実施例16)本発明の第16の実施例を
以下に説明する。図15は本発明の第16の実施例の説
明図である。図15(a)に示すように製造工程におい
て長尺の補助コア143の長尺コア141側の表面に非
磁性膜151を設ける。その結果出来上がったチップイ
ンダクタは図15(b)に示すようにコア1と補助コア
91は非磁性膜152を介して接する。補助コア91の
表面に非磁性膜152があるため、コア1と補助コア9
1の間隔が狭くしかも一定になるため、トロイダルコイ
ルの特性に近くなり、インダクタンス値が大きくしかも
バラツキが小さくできる。(Embodiment 16) A sixteenth embodiment of the present invention will be described below. FIG. 15 is an explanatory diagram of the sixteenth embodiment of the present invention. As shown in FIG. 15A, the nonmagnetic film 151 is provided on the surface of the long auxiliary core 143 on the long core 141 side in the manufacturing process. In the resulting chip inductor, as shown in FIG. 15B, the core 1 and the auxiliary core 91 are in contact with each other via the non-magnetic film 152. Since the non-magnetic film 152 is on the surface of the auxiliary core 91, the core 1 and the auxiliary core 9 are
Since the interval of 1 is narrow and constant, it becomes close to the characteristics of the toroidal coil, and the inductance value can be large and the variation can be small.
【0044】(実施例17)本発明の第17の実施例を
以下に説明する。図16は本発明の第17の実施例の説
明用の斜視図である。長尺コア141の矢印161の部
分の表面にあらかじめ導電部を形成しておく。被覆導線
2の矢印161の部分にレーザーを照射し、被覆導線の
被覆を剥離すると同時に剥離された被覆導線を前記導電
部に溶接する。さらに矢印161の位置で切断し切断面
に外部電極を形成する。これにより外部電極が前記導電
部と電気接続され、前記導電部被覆導線に接続されてい
るため、外部電極と被覆導線は接続される。従ってコア
表面の外部電極と被覆導線の電気接続が確実になり、信
頼性が増すという効果がある。(Embodiment 17) A seventeenth embodiment of the present invention will be described below. FIG. 16 is a perspective view for explaining the 17th embodiment of the present invention. A conductive portion is formed in advance on the surface of the portion of the long core 141 indicated by the arrow 161. A portion of the coated conductor 2 indicated by an arrow 161 is irradiated with a laser to peel off the coating of the coated conductor, and at the same time, the peeled coated conductor is welded to the conductive portion. Further, it is cut at the position of arrow 161 to form an external electrode on the cut surface. As a result, the external electrode is electrically connected to the conductive portion and is connected to the conductive portion covered conductive wire, so that the external electrode and the coated conductive wire are connected. Therefore, there is an effect that the electrical connection between the external electrode on the surface of the core and the covered conductor is ensured and the reliability is increased.
【0045】(実施例18)本発明の第18の実施例を
以下に説明する。図17は本発明の第18の実施例にお
ける製造方法の説明図である。図17(a)において長
尺コア83に溝8を設け、この溝8の内側に導電部9を
設ける。次に図17(b)に示すように長尺コア83に
被覆導線2を一部が前記溝8に沿うように巻回する。溝
8に沿った被覆導線の矢印171の位置に銅を溶融させ
た溶射を施し、被覆導線2の被覆の剥離と導電部9への
接続を同時に行う。(Embodiment 18) An eighteenth embodiment of the present invention will be described below. FIG. 17 is an explanatory diagram of the manufacturing method according to the eighteenth embodiment of the present invention. In FIG. 17A, the groove 8 is provided in the long core 83, and the conductive portion 9 is provided inside the groove 8. Next, as shown in FIG. 17B, the coated conductive wire 2 is wound around the elongated core 83 so that a part thereof is along the groove 8. Copper is melted and sprayed on the position of the arrow 171 of the coated conductor along the groove 8 to remove the coating of the coated conductor 2 and connect it to the conductive portion 9 at the same time.
【0046】その後図17(c)のように、樹脂モール
ド後矢印172の位置で切断する。切断面に外部電極を
形成し、図17(d)のチップインダクタが得られる。Thereafter, as shown in FIG. 17C, the resin is molded and then cut at a position of an arrow 172. External electrodes are formed on the cut surface, and the chip inductor of FIG. 17D is obtained.
【0047】この結果被覆導線と外部電極の電気接続が
確実になり、接続の信頼性が向上する。As a result, the electric connection between the covered conductor and the external electrode is ensured, and the connection reliability is improved.
【0048】なお、外部電極は厚膜を用いたが、印刷し
て焼き付けるタイプの薄膜電極等にしても、小型化およ
び簡略な製造という効果は同様である。Although a thick film is used as the external electrode, the effect of miniaturization and simple manufacture is the same even if a thin film electrode of a type that is printed and baked is used.
【0049】[0049]
【発明の効果】上記のように本発明はコアに被覆導線を
巻回し、前記コアの相対向する両端面と各々同一平面上
に被覆導線の端面を配置し、概略直方体に側面のみを樹
脂モールドし、前記相対向する両端部において被覆導線
の端部と接続する厚膜外部電極を具備することにより、
小型で安価なチップインダクタを実現できるものであ
る。As described above, according to the present invention, the coated conductive wire is wound around the core, the end surfaces of the coated conductive wire are arranged on the same plane as the opposite end surfaces of the core, and the side surface of the substantially rectangular parallelepiped is resin-molded. By including thick film external electrodes connected to the ends of the covered conductor at the opposite ends,
It is possible to realize a small and inexpensive chip inductor.
【図1】本発明の第1の実施例におけるチップインダク
タの斜視図FIG. 1 is a perspective view of a chip inductor according to a first embodiment of the present invention.
【図2】本発明の第1の実施例におけるチップインダク
タの断面図FIG. 2 is a sectional view of the chip inductor according to the first embodiment of the present invention.
【図3】本発明の第1の実施例におけるチップインダク
タの製造方法の説明図FIG. 3 is an explanatory diagram of a method of manufacturing the chip inductor according to the first embodiment of the present invention.
【図4】本発明の第2の実施例におけるチップインダク
タの斜視図FIG. 4 is a perspective view of a chip inductor according to a second embodiment of the present invention.
【図5】本発明の第3の実施例におけるチップインダク
タの斜視図FIG. 5 is a perspective view of a chip inductor according to a third embodiment of the present invention.
【図6】本発明の第7の実施例におけるチップインダク
タの斜視図FIG. 6 is a perspective view of a chip inductor according to a seventh embodiment of the present invention.
【図7】本発明の第7の実施例におけるチップインダク
タに用いるコアの斜視図FIG. 7 is a perspective view of a core used in a chip inductor according to a seventh embodiment of the present invention.
【図8】本発明の第7の実施例におけるチップインダク
タの製造方法の説明図FIG. 8 is an explanatory view of a method of manufacturing a chip inductor according to a seventh embodiment of the present invention.
【図9】本発明の第8の実施例におけるチップインダク
タの斜視図FIG. 9 is a perspective view of a chip inductor according to an eighth embodiment of the present invention.
【図10】本発明の第8の実施例におけるチップインダ
クタの製造方法の説明図FIG. 10 is an explanatory diagram of a method of manufacturing a chip inductor according to an eighth embodiment of the present invention.
【図11】本発明の第9の実施例におけるチップインダ
クタの斜視図FIG. 11 is a perspective view of a chip inductor according to a ninth embodiment of the present invention.
【図12】本発明の第10の実施例におけるチップイン
ダクタの斜視図FIG. 12 is a perspective view of a chip inductor according to a tenth embodiment of the present invention.
【図13】本発明の第13の実施例におけるチップイン
ダクタのフェライト充填率とインダクタンス値の関係を
示す図FIG. 13 is a diagram showing a relationship between a ferrite filling rate and an inductance value of a chip inductor according to a thirteenth embodiment of the present invention.
【図14】本発明の第15の実施例におけるチップイン
ダクタの製造方法の説明図FIG. 14 is an explanatory diagram of a method of manufacturing a chip inductor according to a fifteenth embodiment of the present invention.
【図15】本発明の第16の実施例におけるチップイン
ダクタの製造方法の説明図FIG. 15 is an explanatory diagram of a method of manufacturing a chip inductor according to a sixteenth embodiment of the present invention.
【図16】本発明の第17の実施例におけるチップイン
ダクタの製造方法の説明図FIG. 16 is an explanatory diagram of a method of manufacturing a chip inductor according to a seventeenth embodiment of the present invention.
【図17】本発明の第18の実施例におけるチップイン
ダクタの製造方法の説明図FIG. 17 is an explanatory diagram of a method of manufacturing a chip inductor according to an eighteenth embodiment of the present invention.
【図18】従来の金属端子電極を有するチップインダク
タの構造図FIG. 18 is a structural diagram of a conventional chip inductor having a metal terminal electrode.
【図19】従来の厚膜外部端子を有するチップインダク
タの構造図FIG. 19 is a structural diagram of a conventional chip inductor having a thick film external terminal.
1 コア 2 被覆導線 3 被覆導線の端面 4 モールド樹脂 5 コア端面 6 厚膜外部電極 1 Core 2 Coated Conductive Wire 3 End Surface of Coated Conductive Wire 4 Mold Resin 5 Core End Surface 6 Thick Film External Electrode
フロントページの続き (72)発明者 川又 肇 大阪府門真市大字門真1006番地 松下電器 産業株式会社内Continued Front Page (72) Hajime Kawamata Hajime Kawamata 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.
Claims (28)
対向する両端面と各々同一平面上に被覆導線の端面を配
置し、概略直方体に前記コアの相対向する両端面を除く
側面のみを樹脂モールドし、前記相対向する両端部にお
いて被覆導線の端部と接続する厚膜外部電極を具備させ
てなるチップインダクタ。1. A coated wire is wound around a core, and the end surfaces of the coated wire are arranged on the same planes as the opposite end surfaces of the core, respectively, and only the side surfaces of the substantially rectangular parallelepiped excluding the opposite end surfaces of the core. A resin-molded chip inductor having thick film external electrodes connected to the ends of the covered conductor at opposite ends thereof.
のチップインダクタ。2. The chip inductor according to claim 1, wherein the core is a rectangular rod-shaped magnetic body.
載のチップインダクタ。3. The chip inductor according to claim 1, wherein the core is a U-shaped magnetic body.
載のチップインダクタ。4. The chip inductor according to claim 1, wherein the core is an H-shaped magnetic body.
載のチップインダクタ。5. The chip inductor according to claim 1, wherein the core is a rectangular rod-shaped nonmagnetic material.
記載のチップインダクタ。6. The core is a U-shaped non-magnetic material.
The listed chip inductor.
記載のチップインダクタ。7. The core is an H-shaped non-magnetic body.
The listed chip inductor.
が、斜めに切断された楕円である請求項1記載のチップ
インダクタ。8. The chip inductor according to claim 1, wherein an end surface of the coated conductive wire connected to the thick film external electrode is an ellipse cut obliquely.
が、コアの相対向する両端面の外周部に沿う部分を有す
る請求項1記載のチップインダクタ。9. The chip inductor according to claim 1, wherein an end portion of the coated conductive wire connected to the thick film external electrode has portions along outer peripheral portions of opposite end surfaces of the core.
部が、コアの相対向する両端面の外周部に設けた溝に沿
う部分を有する請求項1記載のチップインダクタ。10. The chip inductor according to claim 1, wherein an end portion of the coated conductive wire connected to the thick film external electrode has a portion along a groove provided on an outer peripheral portion of both end surfaces of the core facing each other.
部が、コアの相対向する両端面の外周部に設けた溝に沿
う部分を有し、この溝が内面に導電部を有し、前記被覆
導線の一部を前記導電部と電気的に接続した請求項1記
載のチップインダクタ。11. An end portion of a coated conductor wire connected to a thick film external electrode has a portion along a groove provided on outer peripheral portions of opposite end surfaces of a core, and the groove has a conductive portion on an inner surface. The chip inductor according to claim 1, wherein a part of the coated conductor wire is electrically connected to the conductive portion.
し、前記コアの相対向する両端面に被覆導線の端面を位
置させ、磁性体からなる補助コアを前記コアと二ヵ所で
接して閉磁路を形成するように配置し、概略直方体に側
面のみをモールド樹脂でモールドし、前記コアの相対向
する両端部において被覆導線の端部と接続する厚膜外部
電極を具備させてなるチップインダクタ。12. A coated wire is wound around a core made of a magnetic material, the end faces of the coated wire are positioned on opposite end surfaces of the core, and an auxiliary core made of a magnetic material is contacted with the core at two positions to close the magnetic field. A chip inductor, which is arranged so as to form a path, is provided with a thick film external electrode connected to an end of a covered conductive wire at opposite ends of the core, the side surface being molded in a substantially rectangular parallelepiped with a molding resin.
型である請求項12記載のチップインダクタ。13. The chip inductor according to claim 12, wherein the core is rod-shaped and the auxiliary core is U-shaped.
状である請求項12記載のチップインダクタ。14. The chip inductor according to claim 12, wherein the core is U-shaped and the auxiliary core is rod-shaped.
の字型である請求項12記載のチップインダクタ。15. The chip inductor according to claim 12, wherein the core is U-shaped and the auxiliary core is U-shaped.
用いる磁性体をNi−Zn系フェライトで構成した請求
項12記載のチップインダクタ。16. The chip inductor according to claim 12, wherein the magnetic material used for the core and the magnetic material used for the auxiliary core are made of Ni—Zn based ferrite.
体で構成した請求項12記載のチップインダクタ。17. The chip inductor according to claim 12, wherein the core and the auxiliary core are made of magnetic materials having different magnetic permeability.
充填した樹脂を用いた請求項12記載のチップインダク
タ。18. The chip inductor according to claim 12, wherein a resin filled with ferrite powder is used as the molding resin.
モールドし、輪切り切断し、切断面に前記被覆導線と接
続する厚膜電極を形成するチップインダクタの製造方
法。19. A method of manufacturing a chip inductor, wherein a coated conductor is wound around a long core, resin-molded, cut into slices, and a thick film electrode connected to the coated conductor is formed on the cut surface.
磁性体のコアを形成する請求項19記載のチップインダ
クタの製造方法。20. The method of manufacturing a chip inductor according to claim 19, wherein a long magnetic core is formed by a green sheet laminating method.
し、前記コアに長尺の磁性体の補助コアを貼り合わせ、
貼り合わせた全体を樹脂モールドし、輪切り切断し、切
断面に前記被覆導線と接続する厚膜電極を形成するチッ
プインダクタの製造方法。21. A coated conductive wire is wound around a long magnetic core, and a long magnetic auxiliary core is attached to the core.
A method for manufacturing a chip inductor, comprising resin-molding the entire bonded body, cutting into slices, and forming a thick film electrode connected to the coated conductor on the cut surface.
り合わせを兼ねる請求項21記載のチップインダクタの
製造方法。22. The method of manufacturing a chip inductor according to claim 21, wherein there is no bonding and the resin mold also functions as bonding.
磁性体のコアと長尺の磁性体の補助コアを形成する請求
項21記載のチップインダクタの製造方法。23. The method of manufacturing a chip inductor according to claim 21, wherein the long magnetic core and the long magnetic auxiliary core are formed by a green sheet laminating method.
し、ストリップ状の非磁性のスペーサを介して長尺の磁
性体の補助コアを貼り合わせ、樹脂モールドし、輪切り
切断し、切断面に前記被覆導線と接続する厚膜外部電極
を形成するチップインダクタの製造方法。24. A coated conductor is wound around a long magnetic core, and a long magnetic auxiliary core is attached via a strip-shaped non-magnetic spacer, resin-molded, cut into slices, and cut. A method of manufacturing a chip inductor, wherein a thick film external electrode connected to the coated conductor is formed on a surface thereof.
し、表面に非磁性膜を設けた長尺の磁性体の補助コアを
貼り合わせ、樹脂モールドし、輪切り切断し、切断面に
前記被覆導線と接続する厚膜外部電極を形成するチップ
インダクタの製造方法。25. A coated magnetic wire is wound around a core of a long magnetic material, and an auxiliary core of a long magnetic material having a non-magnetic film on the surface is attached, resin-molded, cut into slices, and cut surfaces are cut. A method of manufacturing a chip inductor, comprising forming a thick film external electrode connected to the coated conductive wire.
るいは印刷することにより厚膜外部電極を形成し、外部
電極形成と同時に露出した導線断面の接続をする請求項
19または請求項21記載のチップインダクタの製造方
法。26. The chip inductor according to claim 19 or 21, wherein a thick film external electrode is formed by dipping or printing a cut surface with a conductive resin, and the exposed conductor cross section is connected at the same time when the external electrode is formed. Manufacturing method.
成する工程と、この長尺のコアに被覆導線を巻回する工
程と、樹脂モールドする工程と、輪切り切断する工程
と、切断面に前記被覆導線と接続する厚膜電極を形成す
る工程を含み、被覆導線を巻回するとき、被覆導線の輪
切り切断される部分に選択的にレーザー照射する工程を
含むチップインダクタの製造方法。27. A step of forming a conductive portion on a part of a side surface of a long core, a step of winding a coated conductive wire on the long core, a step of resin molding, and a step of cutting into a ring. A method of manufacturing a chip inductor, comprising the step of forming a thick film electrode connected to the coated conductor on a cut surface, and the step of selectively irradiating a portion of the coated conductor to be sliced when the coated conductor is wound. .
アの側面に溝を設け、この溝に導電部を設け、長尺のコ
アに被覆導線を巻回するときに、前記溝に沿わせて被覆
導線の一部を巻回し、溶射により被覆導線の一部と溝の
導電部を電気接続し、樹脂モールドし、輪切り切断し、
切断面に前記被覆導線と電気接続する厚膜電極を形成す
るチップインダクタの製造方法。28. A groove is provided on a side surface of a long core corresponding to a cut portion of a ring cut, and a conductive portion is provided in the groove, and when the coated wire is wound around the long core, the groove is aligned with the groove. A part of the coated conductor is wound around, and a part of the coated conductor is electrically connected to the conductive part of the groove by thermal spraying, resin-molded, and cut into rings.
A method of manufacturing a chip inductor, comprising forming a thick film electrode electrically connected to the coated conductor on a cut surface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26524194A JPH08124749A (en) | 1994-10-28 | 1994-10-28 | Chip inductor and its manufacture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26524194A JPH08124749A (en) | 1994-10-28 | 1994-10-28 | Chip inductor and its manufacture |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH08124749A true JPH08124749A (en) | 1996-05-17 |
Family
ID=17414494
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP26524194A Pending JPH08124749A (en) | 1994-10-28 | 1994-10-28 | Chip inductor and its manufacture |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH08124749A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09326317A (en) * | 1996-06-05 | 1997-12-16 | Nippon Syst Design:Kk | Microwave inductor coil |
US6437676B1 (en) | 1999-06-29 | 2002-08-20 | Matsushita Electric Industrial Co., Ltd. | Inductance element |
US7466283B2 (en) | 2005-06-14 | 2008-12-16 | Murata Manufacturing Co., Ltd. | Coil antenna structure and portable electronic apparatus |
JP2015144166A (en) * | 2014-01-31 | 2015-08-06 | 東光株式会社 | Electronic component |
JP2020136393A (en) * | 2019-02-15 | 2020-08-31 | 株式会社村田製作所 | Wire-wound inductor component |
CN113724961A (en) * | 2021-07-23 | 2021-11-30 | 深圳顺络电子股份有限公司 | Surface mount type high-frequency inductor and manufacturing method thereof |
-
1994
- 1994-10-28 JP JP26524194A patent/JPH08124749A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09326317A (en) * | 1996-06-05 | 1997-12-16 | Nippon Syst Design:Kk | Microwave inductor coil |
US6437676B1 (en) | 1999-06-29 | 2002-08-20 | Matsushita Electric Industrial Co., Ltd. | Inductance element |
DE10031599B4 (en) * | 1999-06-29 | 2005-06-23 | Matsushita Electric Industrial Co., Ltd., Kadoma | coil element |
US7466283B2 (en) | 2005-06-14 | 2008-12-16 | Murata Manufacturing Co., Ltd. | Coil antenna structure and portable electronic apparatus |
JP2015144166A (en) * | 2014-01-31 | 2015-08-06 | 東光株式会社 | Electronic component |
JP2020136393A (en) * | 2019-02-15 | 2020-08-31 | 株式会社村田製作所 | Wire-wound inductor component |
US11869703B2 (en) | 2019-02-15 | 2024-01-09 | Murata Manufacturing Co., Ltd. | Wound-wire-type inductor component |
CN113724961A (en) * | 2021-07-23 | 2021-11-30 | 深圳顺络电子股份有限公司 | Surface mount type high-frequency inductor and manufacturing method thereof |
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