JPH08111518A - Hybrid optical integrated circuit, fabrication thereof and optical transmission module - Google Patents
Hybrid optical integrated circuit, fabrication thereof and optical transmission moduleInfo
- Publication number
- JPH08111518A JPH08111518A JP24543894A JP24543894A JPH08111518A JP H08111518 A JPH08111518 A JP H08111518A JP 24543894 A JP24543894 A JP 24543894A JP 24543894 A JP24543894 A JP 24543894A JP H08111518 A JPH08111518 A JP H08111518A
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- Prior art keywords
- optical
- substrate
- mark
- optical axis
- core
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Landscapes
- Optical Couplings Of Light Guides (AREA)
- Optical Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、光導波路素子と光素子
とが同一Ｓｉ基板上に集積化されたハイブリッド光集積
回路及びその製造方法並びに光伝送モジュールに係り、
特に光素子をＳｉ基板上に高精度に位置決め固定するも
のに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid optical integrated circuit in which an optical waveguide element and an optical element are integrated on the same Si substrate, a method of manufacturing the same, and an optical transmission module.
In particular, it relates to a device for positioning and fixing an optical element on a Si substrate with high accuracy.
【０００２】[0002]
【従来の技術】石英系光導波路素子が形成されたＳｉ基
板上に、半導体光源や半導体光検出器等の光素子や、さ
らに電子回路素子を搭載したハイブリッド光集積回路へ
の感心が高まっている。2. Description of the Related Art There is a growing interest in hybrid optical integrated circuits in which optical elements such as semiconductor light sources and semiconductor photodetectors, and electronic circuit elements are further mounted on a Si substrate on which a quartz optical waveguide element is formed. .
【０００３】ここで、高性能かつ低価格なハイブリッド
光集積回路を実現するためには、次の２点が重要な課題
となる。まず第１点として光素子とＳｉ基板上に形成さ
れた石英系光導波路素子間での結合損失を最小とするた
めに、両者はサブミクロンの位置合せ（光軸合せ）精度
で固定する必要がある。第２点として低価格のハイブリ
ッド光集積回路を実現するためには、光素子とＳｉ基板
上に形成された石英系光導波路素子をサブミクロンの位
置合せ精度を確保しつつ光素子をＳｉ基板上に短時間で
固定する必要がある。Here, in order to realize a high performance and low cost hybrid optical integrated circuit, the following two points are important issues. First, in order to minimize the coupling loss between the optical element and the silica-based optical waveguide element formed on the Si substrate, it is necessary to fix both with sub-micron alignment (optical axis alignment) accuracy. is there. Second, in order to realize a low-priced hybrid optical integrated circuit, the optical element and the silica-based optical waveguide element formed on the Si substrate should be aligned on the Si substrate while ensuring the submicron alignment accuracy. Need to be fixed in a short time.
【０００４】従来、この要請に応えるために、Ｓｉ基板
上に形成された石英系光導波路素子に光素子を位置決め
固定する一つの方法として、光素子に形成した光軸調整
用マークと、Ｓｉ基板上に形成した光軸調整用マークと
を赤外線顕微鏡で各々検出し、基板ステージを移動させ
てこれらのマーク同士を位置合せをする方法が提案され
ている（１９９３年電子情報通信学会秋季大会（４−２
６６ページ））。Conventionally, in order to meet this demand, as one method for positioning and fixing the optical element to the silica-based optical waveguide element formed on the Si substrate, the optical axis adjusting mark formed on the optical element and the Si substrate are used. A method has been proposed in which the optical axis adjustment marks formed above are respectively detected by an infrared microscope, and the marks are aligned by moving the substrate stage (1993 Autumn Meeting of the Institute of Electronics, Information and Communication Engineers (4) -2
(P. 66)).
【０００５】[0005]
【発明が解決しようとする課題】光軸調整用マークを利
用して光素子を石英系光導波路素子が形成されたＳｉ基
板上に位置決め固定する上記提案に基づくこれまでの方
法は、まず、Ｓｉ基板上に石英系光導波路素子を形成す
る前に、Ｓｉ基板上に光軸調整用マークを形成する。こ
の光軸調整用マークの形成方法には、ホトリソグラフィ
で形成したパターンをもとにＳｉ基板をエッチングして
形成するのが一般的である。次に、光軸調整用マークを
形成したＳｉ基板のオリエンテーションフラット等を基
準にホトリソグラフィで光導波路素子のコアパターンを
形成する。The conventional method based on the above proposal for positioning and fixing the optical element on the Si substrate on which the silica-based optical waveguide element is formed by using the optical axis adjusting mark is as follows. Before forming the quartz optical waveguide element on the substrate, the optical axis adjusting mark is formed on the Si substrate. In general, the optical axis adjusting mark is formed by etching a Si substrate based on a pattern formed by photolithography. Next, the core pattern of the optical waveguide element is formed by photolithography with reference to the orientation flat of the Si substrate on which the optical axis adjusting mark is formed.
【０００６】このとき、最も重要なことは、既にＳｉ基
板に形成された光軸調整用マークに対して光導波路素子
のコアパターンが所望の位置にパターンニングされるか
どうかである。すなわち、光軸調整用マークを利用して
光素子を石英系光導波路素子が形成されたＳｉ基板上に
サブミクロンの高精度で位置決め固定するには、その位
置決め固定に先立って、Ｓｉ基板上の光軸調整用マーク
と光導波路素子のコア（光軸）との相対位置精度が極め
て重要となるということであり、その相対位置精度は±
０．５μｍ以下が必要である。At this time, what is most important is whether or not the core pattern of the optical waveguide element is patterned at a desired position with respect to the optical axis adjusting mark already formed on the Si substrate. That is, in order to position and fix the optical element on the Si substrate on which the silica-based optical waveguide element is formed with high accuracy of submicron using the optical axis adjustment mark, prior to the positioning and fixing, the Si element on the Si substrate is fixed. This means that the relative positional accuracy between the optical axis adjustment mark and the core (optical axis) of the optical waveguide element is extremely important.
0.5 μm or less is required.
【０００７】しかし、現状の技術レベルでは、光導波路
素子のコアのパターニング精度は±１μｍが限界であ
り、これ以下の精度でマスク合せをすることは極めて困
難である。したがって、Ｓｉ基板上に光軸調整用マーク
を形成した後に、光導波路素子のコアパターンを形成す
るやり方では、Ｓｉ基板上の光軸調整用マークと光導波
路素子の光軸との相対位置精度を±０．５μｍ以下とす
ることができない。However, at the current level of technology, the patterning accuracy of the core of the optical waveguide device is limited to ± 1 μm, and it is extremely difficult to perform mask alignment with accuracy less than this. Therefore, in the method of forming the core pattern of the optical waveguide element after forming the optical axis adjustment mark on the Si substrate, the relative positional accuracy between the optical axis adjustment mark on the Si substrate and the optical axis of the optical waveguide element is improved. It cannot be less than ± 0.5 μm.
【０００８】本発明の目的は、前記した従来技術の欠点
を解消し、Ｓｉ基板上に形成する光軸調整用マークを極
めて高い精度で形成して、光素子と光導波路素子とを高
い位置合せ精度で固定することが可能なハイブリッド光
集積回路及びその製造方法並びに光伝送モジュールを提
供することにある。An object of the present invention is to solve the above-mentioned drawbacks of the prior art and to form an optical axis adjusting mark formed on a Si substrate with extremely high accuracy to achieve high alignment between an optical element and an optical waveguide element. An object of the present invention is to provide a hybrid optical integrated circuit that can be fixed with precision, a method of manufacturing the same, and an optical transmission module.
【０００９】[0009]
【課題を解決するための手段】本発明のハイブリッド光
集積回路は、光導波路素子を設けたＳｉ基板上にＳｉ基
板側光軸調整用マークを形成し、該Ｓｉ基板側光軸調整
用マークと光素子に形成した光素子側光軸調整用マーク
とを合せることによって、Ｓｉ基板上に前記光導波路素
子と光軸結合する光素子を搭載したハイブリッド光集積
回路において、前記Ｓｉ基板上に形成したＳｉ基板側光
軸調整用マークと光導波路素子の光軸との相対位置精度
が±０．５μｍ以下であるものである。In the hybrid optical integrated circuit of the present invention, a Si substrate side optical axis adjusting mark is formed on a Si substrate provided with an optical waveguide element, and the Si substrate side optical axis adjusting mark and the Si substrate side optical axis adjusting mark are formed. In the hybrid optical integrated circuit in which the optical element for optical axis coupling with the optical waveguide element is mounted on the Si substrate by aligning with the optical element side optical axis adjusting mark formed on the optical element, the hybrid optical integrated circuit is formed on the Si substrate. The relative positional accuracy between the Si substrate side optical axis adjusting mark and the optical axis of the optical waveguide element is ± 0.5 μm or less.
【００１０】本発明のハイブリッド光集積回路の製造方
法は、光導波路素子のコアをＳｉ基板上に形成するため
のコアパターニング工程と、前記Ｓｉ基板上に光素子を
位置合せして搭載するためのＳｉ基板側光軸調整用マー
クのパターンを形成するためのマークパターニング工程
とを備え、前記Ｓｉ基板上に前記光素子を搭載する際、
該光素子に形成した光素子側光軸調整用マークと前記Ｓ
ｉ基板上に形成したＳｉ基板側光軸調整マークとを位置
合せすることによって、前記光素子と前記光導波路素子
のコアとを光軸結合させるハイブリッド光集積回路の製
造方法であって、前記Ｓｉ基板上にＳｉ基板側光軸調整
用マークを形成するためのマークパターニング工程と、
前記コアを形成するためのコアパターニング工程とを同
時に行うようにしたものである。A method of manufacturing a hybrid optical integrated circuit according to the present invention comprises a core patterning step for forming a core of an optical waveguide element on a Si substrate, and a step of aligning and mounting the optical element on the Si substrate. A mark patterning step for forming a pattern of a Si substrate side optical axis adjusting mark, and when mounting the optical element on the Si substrate,
The optical element side optical axis adjustment mark formed on the optical element and the S
A method for manufacturing a hybrid optical integrated circuit, wherein the optical element and the core of the optical waveguide element are optically axis-coupled by aligning the Si substrate side optical axis adjustment mark formed on the i substrate. A mark patterning step for forming a Si substrate side optical axis adjusting mark on the substrate;
The core patterning process for forming the core is simultaneously performed.
【００１１】この場合において、Ｓｉ基板上に形成する
前記光軸調整用マークパターンと前記コアパターンと
が、同一ホトリソグラフィ用マスクに描画されているこ
とが好ましい。また、前記光素子に形成した光軸調整用
マークと、Ｓｉ基板上に形成した光軸調整用マークとの
位置合せには公知の画像処理技術を使ることができる
が、特に赤外線顕微鏡を使用してそれぞれのマークを検
出して位置合せを行えば、光素子と光導波路素子との光
軸結合が短時間で容易に行える。In this case, it is preferable that the optical axis adjusting mark pattern and the core pattern formed on the Si substrate are drawn on the same photolithography mask. A known image processing technique can be used for aligning the optical axis adjusting mark formed on the optical element and the optical axis adjusting mark formed on the Si substrate, but an infrared microscope is particularly used. Then, if each mark is detected and aligned, the optical axis and the optical waveguide element can be easily coupled in a short time.
【００１２】本発明の光伝送モジュールは、上記ハイブ
リッド光集積回路において、光集積回路端部に光ファイ
バをさらに接続したものである。The optical transmission module of the present invention is the above hybrid optical integrated circuit, further comprising an optical fiber connected to the end of the optical integrated circuit.
【００１３】[0013]
【作用】Ｓｉ基板上にＳｉ基板側光軸調整用マークを形
成するためのマークパターンニングを、コアを形成する
ためのコアパターニングと同時に行うようにすると、相
前後してパターニングする場合に比して、コアとマーク
パターンとの相対位置関係をより高精度にパターニング
でき、これに基づくコアと光軸調整用マークとの相対位
置精度をサブミクロン以下にすることができる。したが
って、このＳｉ基板側光軸調整用マークに位置合せして
Ｓｉ基板上に搭載する光素子は、光導波路素子のコアに
高精度に光軸結合させることができる。When the mark patterning for forming the Si substrate side optical axis adjusting mark on the Si substrate is performed at the same time as the core patterning for forming the core, as compared with the case where the patterning is performed successively. Thus, the relative positional relationship between the core and the mark pattern can be patterned with higher accuracy, and the relative positional accuracy between the core and the optical axis adjusting mark based on this can be made submicron or less. Therefore, the optical element which is aligned with the optical axis adjusting mark on the Si substrate and mounted on the Si substrate can be accurately coupled to the core of the optical waveguide element by the optical axis.
【００１４】[0014]
【実施例】以下、本発明の実施例を説明する。図３は本
発明の実施例によるハイブリッド光集積回路の組立て斜
視図である。ハイブッド光集積回路は、光導波路素子１
０が形成されたＳｉ基板１上に、半導体光源や半導体光
検出器等の光素子２を搭載したものである。光導波路素
子１０は、Ｓｉ基板１上に設けたバッファ層６と、この
上に設けたコア４と、コア４を含むバッファ層６上に設
けたクラッド層７とから構成される。光素子２を搭載す
るために、図示するようにＳｉ基板１の一部に、Ｓｉ基
板表面を露出させてＳｉベンチ７を形成してある。Embodiments of the present invention will be described below. FIG. 3 is an assembled perspective view of a hybrid optical integrated circuit according to an embodiment of the present invention. The hybrid optical integrated circuit includes an optical waveguide device 1
An optical element 2 such as a semiconductor light source or a semiconductor photodetector is mounted on a Si substrate 1 on which 0 is formed. The optical waveguide device 10 includes a buffer layer 6 provided on the Si substrate 1, a core 4 provided on the buffer layer 6, and a cladding layer 7 provided on the buffer layer 6 including the core 4. In order to mount the optical element 2, the Si bench 7 is formed on a part of the Si substrate 1 by exposing the surface of the Si substrate as shown in the figure.
【００１５】Ｓｉベンチ７には、光素子２を光導波路素
子１０のコア４と位置合せするための複数のＳｉ基板側
光軸調整用マーク５が形成される。複数形成してあるの
は、位置合せ時のずれ角をなくすためである。このＳｉ
基板側光軸調整用マーク５と光導波路素子１０のコア４
との相対位置精度は±０．５μｍ以下に設定されてい
る。A plurality of Si substrate side optical axis adjusting marks 5 for aligning the optical element 2 with the core 4 of the optical waveguide element 10 are formed on the Si bench 7. The reason for forming a plurality is to eliminate the misalignment angle during alignment. This Si
Substrate side optical axis adjustment mark 5 and core 4 of the optical waveguide device 10
The relative position accuracy with respect to is set to ± 0.5 μm or less.
【００１６】光素子２の裏面には、Ｓｉ基板１上に形成
されたＳｉ基板側光軸調整用マーク５と対応する複数の
光素子側光軸調整用マーク３が形成される。この光素子
２の裏面に形成した光素子側光軸調整用マーク３と、Ｓ
ｉ基板１上に形成したＳｉ基板側光軸調整用マーク５と
を合せて光素子２と光導波路素子１０のコア４との位置
合せをする。この位置合せは公知の画像処理技術を使っ
て行う。Ｓｉ基板側光軸調整用マーク５と光導波路素子
１０のコア４との相対位置精度は上述したように±０．
５μｍ以下に設定されているので、Ｓｉ基板１上にサブ
ミクロンの高精度で光素子２を位置決め固定できる。し
たがって、高精度のハイブリッド光集積回路が得られ
る。A plurality of optical element side optical axis adjusting marks 3 corresponding to the Si substrate side optical axis adjusting marks 5 formed on the Si substrate 1 are formed on the back surface of the optical element 2. An optical element side optical axis adjusting mark 3 formed on the back surface of the optical element 2;
The optical element 2 and the core 4 of the optical waveguide element 10 are aligned with the Si substrate side optical axis adjusting mark 5 formed on the i substrate 1. This alignment is performed using a known image processing technique. As described above, the relative positional accuracy between the Si substrate side optical axis adjusting mark 5 and the core 4 of the optical waveguide element 10 is ± 0.
Since the thickness is set to 5 μm or less, the optical element 2 can be positioned and fixed on the Si substrate 1 with high accuracy of submicron. Therefore, a highly accurate hybrid optical integrated circuit can be obtained.
【００１７】次に、上述したハイブリッド光集積回路の
製造方法を図１を用いて説明する。Next, a method for manufacturing the above hybrid optical integrated circuit will be described with reference to FIG.
【００１８】まず、外径３インチ、両面に酸化膜（Ｓｉ
Ｏ2 ）１μｍが形成された厚さ１mmのＳｉ基板２０（図
１（ａ））上にレジストを塗布後マスクアライナでＳｉ
ベンチ２１用のパターンを転写し、反応性イオンエッチ
ング（ＲＩＥ）あるいはフッ酸を用いて不要な酸化膜を
除去する。除去後、残された酸化膜をマスク材としてＳ
ｉ基板２０のエッチングを行ってＳｉ基板２０上に凸状
のＳｉベンチ２１を形成する（図１（ｂ））。エッチャ
ントは濃度４０重量％、温度４０℃の水酸化カリウム
（ＫＯＨ）の水溶液を用い、深さ２５μｍのエッチング
を行ってＳｉベンチ２１を形成する。First, an outer diameter of 3 inches and an oxide film (Si
O 2 ). 1 μm thick Si substrate 20 (FIG. 1A) having a thickness of 1 μm is coated with a resist and then Si is formed by a mask aligner.
The pattern for the bench 21 is transferred, and the unnecessary oxide film is removed using reactive ion etching (RIE) or hydrofluoric acid. After removal, the remaining oxide film is used as a mask material for S
The i substrate 20 is etched to form a convex Si bench 21 on the Si substrate 20 (FIG. 1B). The etchant is an aqueous solution of potassium hydroxide (KOH) having a concentration of 40% by weight and a temperature of 40 ° C., and etching is performed to a depth of 25 μm to form the Si bench 21.
【００１９】次に、Ｓｉベンチ２１上にＳｉＯ2 のガラ
ス膜２２を電子ビーム蒸着法や火炎堆積法で２５μｍ堆
積させる（図１（ｃ））。さらに、研磨等の手段を用い
てＳｉベンチ２１上の不要なＳｉＯ2 のガラス膜２２を
削り取り、残ったガラス膜をバッファ層２３とする（図
１（ｄ））。バッファ層２３の屈折率ｎ0 は、Ｍｅｔｒ
ｉｏｎ社製のプリズム・カプラ（ＰＣ−２０１０）で測
定したところ、ｎ0 ＝１．４５７６であった。Next, a glass film 22 of SiO 2 is deposited on the Si bench 21 to a thickness of 25 μm by an electron beam evaporation method or a flame deposition method (FIG. 1 (c)). Further, the unnecessary glass film 22 of SiO 2 on the Si bench 21 is scraped off by means of polishing or the like, and the remaining glass film is used as the buffer layer 23 (FIG. 1 (d)). The refractive index n 0 of the buffer layer 23 is Metr
When measured with a prism coupler (PC-2010) manufactured by Ion Co., n 0 = 1.4576.
【００２０】次に、バッファ層２３が埋め込まれた格好
になったＳｉ基板２０上の全面に、屈折率ｎ1 を有する
コアガラス膜２４を電子ビーム蒸着法で８μｍ形成する
（図１（ｅ））。屈折率ｎ1 はプリズム・カプラで測定
したところｎ1 ＝１．４６２０であった。Next, a core glass film 24 having a refractive index n 1 is formed to a thickness of 8 μm on the entire surface of the dressed Si substrate 20 in which the buffer layer 23 is embedded (FIG. 1 (e)). ). The refractive index n 1 was n 1 = 1.4620 when measured with a prism coupler.
【００２１】次に、コアガラス膜２４の表面上に、マグ
ネトロン・スパッタリング方によりＷＳｉ膜（図示せ
ず）を１μｍ形成した。さらに、レジスト（図示せず）
を塗布後、マスクアライナでコア２５とＳｉ基板側光軸
調整用マークのパターン２６とを形成するためのパター
ンを転写し、反応性イオンエッチング（ＲＩＥ）でコア
ガラス膜２４をエッチングして、コア２５と光軸調整用
マークのパターン２６とを同時に形成した（図１
（ｆ））。ここで重要なことは、Ｓｉ基板２０上にＳｉ
基板側光軸調整用マーク２７を形成するためのマークパ
ターニングと、コア２５を形成するためのコアパターニ
ングとが同時に行われること、すなわち、Ｓｉ基板２０
上に形成する光軸調整用マークパターンとコアパターン
とが、同一のホトリソグラフィ用マスクに描画されてい
ることである。これによって、Ｓｉ基板２０上の光軸調
整用マークのパターン２６、すなわち光軸調整用マーク
２７とコア２５との相対位置精度は、±１μｍが限界で
あるコアのパターニング精度よりも高いホトリソグラフ
ィグラフィ用マスクの描画精度に転嫁させることがで
き、その結果、相対位置精度を±０．５μｍ以下とする
ことができる。Next, a WSi film (not shown) having a thickness of 1 μm was formed on the surface of the core glass film 24 by magnetron sputtering. Further, a resist (not shown)
After coating, a pattern for forming the core 25 and the Si substrate side optical axis adjusting mark pattern 26 is transferred by a mask aligner, and the core glass film 24 is etched by reactive ion etching (RIE) to 25 and the optical axis adjustment mark pattern 26 are formed at the same time (see FIG. 1).
(F)). What is important here is that Si on the Si substrate 20 is
The mark patterning for forming the substrate side optical axis adjusting mark 27 and the core patterning for forming the core 25 are performed simultaneously, that is, the Si substrate 20.
That is, the optical axis adjusting mark pattern and the core pattern formed above are drawn on the same photolithography mask. As a result, the pattern 26 of the optical axis adjusting mark on the Si substrate 20, that is, the relative positional accuracy between the optical axis adjusting mark 27 and the core 25 is higher than the patterning accuracy of the core whose limit is ± 1 μm. It can be passed on to the drawing accuracy of the mask for use, and as a result, the relative position accuracy can be set to ± 0.5 μm or less.
【００２２】次に、Ｓｉ基板側光軸調整用マークのパタ
ーン２６が形成されたＳｉ基板２０を、濃度４０重量
％、温度４０℃の水酸化カリウム（ＫＯＨ）の水溶液に
入れ、コア２５とＳｉ基板側光軸調整用マークのパター
ン２６とをマスク材としてＳｉベンチ２１の一部をエッ
チングし、凹状の光軸調整用マーク２７をＳｉベンチ２
１上に形成する（図１（ｇ））。Next, the Si substrate 20 on which the Si substrate side optical axis adjusting mark pattern 26 is formed is put into an aqueous solution of potassium hydroxide (KOH) having a concentration of 40% by weight and a temperature of 40 ° C. to form the core 25 and the Si. A part of the Si bench 21 is etched using the substrate side optical axis adjusting mark pattern 26 as a mask material to form a concave optical axis adjusting mark 27.
1 (FIG. 1 (g)).
【００２３】次に、コア２５及びＳｉ基板側光軸調整用
マーク２７が形成されたＳｉ基板２０を加熱したターン
テーブルに置き、火炎堆積法を用いて、まず、ＳｉＯ2
−Ｂ2 Ｏ3 −Ｐ2 Ｏ5 系の多孔質ガラス層を３００μｍ
形成する。その後、これを電気炉内の石英ガラス炉心管
内に位置させ、Ｈｅガス雰囲気で１３３０℃の温度で１
１時間保持することにより多孔質ガラス層を透明ガラス
化して、クラッド層２８を厚さ３０μｍ形成した（図１
（ｈ））。このクラッド層２８の屈折率ｎ0 は１．４５
７６であり、バッファ層２３と同じであることを確認し
た。またコア２５の幅及び高さは共に８μｍ、コア２
５、バッファ層２３、クラッド層２８間の比屈折率差は
０．３％である。Next, the Si substrate 20 on which the core 25 and the Si substrate side optical axis adjusting mark 27 are formed is placed on a heated turntable, and SiO 2 is first deposited by a flame deposition method.
-B 2 O 3 -P 2 O 5 based porous glass layer 300 μm
Form. After that, this was placed in a quartz glass furnace tube in an electric furnace, and the temperature was set to 1,330 ° C. in a He gas atmosphere for 1 hour.
The porous glass layer was made transparent by holding it for 1 hour to form a clad layer 28 having a thickness of 30 μm (FIG. 1).
(H)). The refractive index n 0 of the clad layer 28 is 1.45.
It was confirmed to be 76, which is the same as the buffer layer 23. The width and height of the core 25 are both 8 μm, and the core 2
5, the relative refractive index difference between the buffer layer 23 and the cladding layer 28 is 0.3%.
【００２４】次に、クラッド層２８の表面上にマグネト
ロン・スパッタリング法により、ＷＳｉ膜（図示せず）
を３μｍ形成した。さらに、レジスト（図示せず）を塗
布後、マスクアライナで光素子を搭載するためのピット
部パターンを転写し、反応性イオンエッチング（ＲＩ
Ｅ）でクラッド層２８の一部をエッチングし、一段低く
なった光素子搭載用ピット部２９、及び一段高くなった
光導波路素子３０を形成した（図１（ｉ））。Next, a WSi film (not shown) is formed on the surface of the clad layer 28 by magnetron sputtering.
Of 3 μm was formed. Further, after applying a resist (not shown), a mask aligner is used to transfer a pit pattern for mounting an optical element, and reactive ion etching (RI) is performed.
Part of the clad layer 28 was etched in step E) to form an optical element mounting pit portion 29 having a further lowered height and an optical waveguide element 30 having a further raised height (FIG. 1 (i)).
【００２５】図２に、上述した製造方法により製造した
光導波路３０と光軸調整用マーク２７とを備えるＳｉ基
板２０の平面図を示す。FIG. 2 shows a plan view of the Si substrate 20 provided with the optical waveguide 30 and the optical axis adjusting mark 27 manufactured by the manufacturing method described above.
【００２６】最後に、図３に示したように、光素子２の
裏面に形成した光素子側光軸調整用マーク３と、Ｓｉ基
板１上に形成したＳｉ基板側光軸調整用マーク７とを合
せて光素子２と光導波路素子１０のコア４との位置合せ
をする。この位置合せの方法は、図示しない基板ステー
ジ上に光導波路素子付きＳｉ基板１を載せた上で、赤外
線顕微鏡を使用し、これにより両光軸調整用マーク３、
７を各々検出し、基板ステージを移動させてこれらのマ
ーク同士を高精度に位置合せすることによって行う。位
置合せと同時に、光素子２をＳｉベンチ８上に固定し
た。その結果、光素子２と光導波路素子１０との光軸位
置ずれ量は０．１μｍ以下となった。Finally, as shown in FIG. 3, the optical element side optical axis adjusting mark 3 formed on the back surface of the optical element 2 and the Si substrate side optical axis adjusting mark 7 formed on the Si substrate 1. Then, the optical element 2 and the core 4 of the optical waveguide element 10 are aligned with each other. This alignment method is performed by placing an Si substrate 1 with an optical waveguide element on a substrate stage (not shown) and using an infrared microscope, whereby the optical axis adjustment marks 3,
7 is detected and the substrate stage is moved to align these marks with high accuracy. Simultaneously with the alignment, the optical element 2 was fixed on the Si bench 8. As a result, the optical axis position shift amount between the optical element 2 and the optical waveguide element 10 was 0.1 μm or less.
【００２７】上記実施例のハイブリッド光集積回路の製
造方法によれば、Ｓｉ基板側光軸調整用マークを形成す
るためのマークパターニングと、コアを形成するための
コアパターニングとを同一のホトリソグラフィ用マスク
を用いて同時に行うようにしたので、相前後してＳｉ基
板上に光導波路と光軸調整用マークとを形成する従来方
法に比べ、約１／１０の光軸ずれ量で光素子をＳｉ基板
上に固定することができた。According to the hybrid optical integrated circuit manufacturing method of the above-described embodiment, the mark patterning for forming the Si substrate side optical axis adjusting mark and the core patterning for forming the core are the same for photolithography. Since the steps are performed simultaneously using a mask, the optical element is made Si with an optical axis shift amount of about 1/10 as compared with the conventional method of forming the optical waveguide and the optical axis adjustment mark on the Si substrate one after another. It could be fixed on the substrate.
【００２８】このようにして形成されたハイブリッド光
集積回路は、最後に光ファイバが接続されて光伝送モジ
ュールとなる。この光伝送モジュールは図４に示すよう
に、Ｓｉベンチ３１にＬＤ（レーザダイオード）などの
半導体光源３２や、ＰＤ（ホトディテクタ）などの半導
体光検出器３３が既述したように位置合せして搭載さ
れ、これらはＳｉベンチ３１に臨ませたコア３６の端部
と光軸結合される。一方、ハイブリッド光集積回路端に
は光ファイバ３４がコネクタ３５によって接続され、コ
ア３６の端部と光軸結合される。光素子と光導波路素子
とが高精度に結合されたハイブリッド光集積回路を使用
するため、精度の高い光伝送モジュールを構成できる。In the hybrid optical integrated circuit thus formed, an optical fiber is finally connected to form an optical transmission module. As shown in FIG. 4, this optical transmission module is arranged by aligning a semiconductor light source 32 such as an LD (laser diode) and a semiconductor photodetector 33 such as a PD (photodetector) on the Si bench 31 as described above. They are mounted, and these are optically coupled with the end of the core 36 facing the Si bench 31. On the other hand, an optical fiber 34 is connected to the end of the hybrid optical integrated circuit by a connector 35, and is optically coupled to the end of the core 36. Since the hybrid optical integrated circuit in which the optical element and the optical waveguide element are coupled with high accuracy is used, a highly accurate optical transmission module can be configured.
【００２９】[0029]
【発明の効果】本発明のハイブリッド光集積回路によれ
ば、Ｓｉ基板上に形成したＳｉ基板側光軸調整用マーク
と光導波路素子の光軸との相対位置精度が±０．５μｍ
以下であるため、光素子と光導波路素子との光軸位置ず
れ量をサブミクロン以下とすることができ、高精度のハ
イブリッド光集積回路が得られる。According to the hybrid optical integrated circuit of the present invention, the relative positional accuracy between the Si substrate side optical axis adjusting mark formed on the Si substrate and the optical axis of the optical waveguide element is ± 0.5 μm.
Since it is below, the amount of optical axis position deviation between the optical element and the optical waveguide element can be made submicron or less, and a highly accurate hybrid optical integrated circuit can be obtained.
【００３０】本発明のハイブリッド光集積回路の製造方
法によれば、Ｓｉ基板側光軸調整用マークを形成するた
めのマークパターニングと、コアを形成するためのコア
パターニングとを同時に行うようにしたので、相前後し
てパターニングする従来方法に比べ、Ｓｉ基板上に形成
するＳｉ基板側光軸調整用マークを極めて高い精度で形
成することができる。したがって、高性能かつ低価格な
ハイブリッド光集積回路を得ることができる。According to the method of manufacturing the hybrid optical integrated circuit of the present invention, the mark patterning for forming the Si substrate side optical axis adjusting mark and the core patterning for forming the core are simultaneously performed. The Si substrate side optical axis adjusting mark formed on the Si substrate can be formed with extremely high accuracy as compared with the conventional method in which patterning is performed successively. Therefore, a high performance and low cost hybrid optical integrated circuit can be obtained.
【００３１】本発明の光伝送モジュールによれば、光素
子と光導波路素子とが高精度に位置合せされたハイブリ
ッド光集積回路を用いているので、高精度の光伝送モジ
ュールが得られる。According to the optical transmission module of the present invention, since the hybrid optical integrated circuit in which the optical element and the optical waveguide element are aligned with high precision is used, a high precision optical transmission module can be obtained.
【図１】本発明の実施例によるハイブリッド光集積回路
の製造方法の工程図。FIG. 1 is a process drawing of a method for manufacturing a hybrid optical integrated circuit according to an embodiment of the present invention.
【図２】本実施例の製造方法により製造された光素子の
搭載される前のハイブリッド光集積回路の平面図であ
る。FIG. 2 is a plan view of a hybrid optical integrated circuit before mounting an optical element manufactured by the manufacturing method of this embodiment.
【図３】本発明の実施例によるハイブリッド光集積回路
の組立て斜視図。FIG. 3 is an assembled perspective view of a hybrid optical integrated circuit according to an embodiment of the present invention.
【図４】本発明の実施例による光伝送モジュールの斜視
図。FIG. 4 is a perspective view of an optical transmission module according to an exemplary embodiment of the present invention.
２０ Ｓｉ基板 ２１ Ｓｉベンチ ２２ ＳｉＯ2 のガラス膜 ２３ バッファ層 ２４ コアガラス膜 ２５ コア ２６ Ｓｉ基板側光軸調整用マークのパターン ２７ Ｓｉ基板側光軸調整用マーク ２８ クラッド層 ２９ 光素子搭載用ピット部 ３０ 光導波路素子20 Si substrate 21 Si bench 22 SiO 2 glass film 23 Buffer layer 24 Core glass film 25 Core 26 Si substrate side optical axis adjusting mark pattern 27 Si substrate side optical axis adjusting mark 28 Clad layer 29 Optical element mounting pit Part 30 Optical waveguide device
───────────────────────────────────────────────────── フロントページの続き (72)発明者 寺岡 達夫 茨城県日立市日高町５丁目１番１号 日立 電線株式会社オプトロシステム研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tatsuo Teraoka 5-1-1 Hidaka-cho, Hitachi-shi, Ibaraki Hitachi Cable Ltd.
Claims (5)
板側光軸調整用マークを形成し、該Ｓｉ基板側光軸調整
用マークと光素子に形成した光素子側光軸調整用マーク
とを位置合せすることによって、Ｓｉ基板上に前記光導
波路素子と光軸結合する光素子を搭載したハイブリッド
光集積回路において、前記Ｓｉ基板上に形成した前記Ｓ
ｉ基板側光軸調整用マークと前記光導波路素子の光軸と
の相対位置精度が±０．５μｍ以下であることを特徴と
するハイブリッド光集積回路。1. A Si substrate side optical axis adjusting mark is formed on a Si substrate provided with an optical waveguide element, and the Si substrate side optical axis adjusting mark and the optical element side optical axis adjusting mark formed on the optical element. In the hybrid optical integrated circuit in which an optical element for optical axis coupling with the optical waveguide element is mounted on the Si substrate by aligning S and S, the S formed on the Si substrate
A hybrid optical integrated circuit, wherein the relative positional accuracy between the i-substrate side optical axis adjusting mark and the optical axis of the optical waveguide element is ± 0.5 μm or less.
るためのコアパターニング工程と、前記Ｓｉ基板上に光
素子を位置合せして搭載するためのＳｉ基板側光軸調整
用マークのパターンを形成するためのマークパターニン
グ工程とを備え、前記Ｓｉ基板上に前記光素子を搭載す
る際、該光素子に形成した光素子側光軸調整用マークと
前記Ｓｉ基板上に形成したＳｉ基板側光軸調整マークと
を位置合せすることによって、前記光素子と前記光導波
路素子のコアとを光軸結合させるハイブリッド光集積回
路の製造方法であって、前記Ｓｉ基板上にＳｉ基板側光
軸調整用マークを形成するためのマークパターニング工
程と、前記コアを形成するためのコアパターニング工程
とを同時に行うことを特徴とするハイブリッド光集積回
路の製造方法。2. A core patterning step for forming a core of an optical waveguide element on a Si substrate, and a pattern of a Si substrate side optical axis adjusting mark for aligning and mounting an optical element on the Si substrate. And a mark patterning step for forming an optical element on the Si substrate, the optical element side optical axis adjusting mark formed on the optical element and the Si substrate side formed on the Si substrate when the optical element is mounted on the Si substrate. A method for manufacturing a hybrid optical integrated circuit in which the optical element and the core of the optical waveguide element are optically coupled by aligning the optical axis adjustment mark with each other, and the optical axis adjustment on the Si substrate side is performed on the Si substrate. A method for manufacturing a hybrid optical integrated circuit, wherein a mark patterning step for forming a use mark and a core patterning step for forming the core are performed at the same time.
の製造方法において、Ｓｉ基板上に形成する前記Ｓｉ基
板側光軸調整用マークパターンと前記コアパターンと
が、同一ホトリソグラフィ用マスクに描画されているこ
とを特徴とするハイブリッド光集積回路の製造方法。3. The hybrid optical integrated circuit manufacturing method according to claim 2, wherein the Si substrate side optical axis adjusting mark pattern and the core pattern formed on a Si substrate are drawn on the same photolithography mask. And a method for manufacturing a hybrid optical integrated circuit.
集積回路の製造方法において、前記光素子に形成した光
素子側光軸調整用マークと、Ｓｉ基板上に形成したＳｉ
基板側光軸調整用マークとをそれぞれ赤外線顕微鏡で検
出して位置合せすることを特徴とするハイブリッド光集
積回路。4. The hybrid optical integrated circuit manufacturing method according to claim 2, wherein the optical element side optical axis adjusting mark formed on the optical element and the Si formed on the Si substrate.
A hybrid optical integrated circuit characterized in that the substrate side optical axis adjusting marks are respectively detected and aligned by an infrared microscope.
において、ハイブリッド光集積回路端部に光ファイバを
さらに接続したことを特徴とする光伝送モジュール。5. The optical transmission module according to claim 1, further comprising an optical fiber connected to an end of the hybrid optical integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24543894A JP3208555B2 (en) | 1994-10-11 | 1994-10-11 | Method for manufacturing hybrid optical integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24543894A JP3208555B2 (en) | 1994-10-11 | 1994-10-11 | Method for manufacturing hybrid optical integrated circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08111518A true JPH08111518A (en) | 1996-04-30 |
| JP3208555B2 JP3208555B2 (en) | 2001-09-17 |
Family
ID=17133670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24543894A Expired - Lifetime JP3208555B2 (en) | 1994-10-11 | 1994-10-11 | Method for manufacturing hybrid optical integrated circuit |
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| Country | Link |
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| JP (1) | JP3208555B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002022414A (en) * | 2000-07-10 | 2002-01-23 | Hitachi Chem Co Ltd | Step inspecting apparatus and method of manufacturing optical guide device |
| KR100757233B1 (en) * | 2006-06-08 | 2007-09-10 | 한국전자통신연구원 | Optical waveguide platform and method of manufacturing the same |
-
1994
- 1994-10-11 JP JP24543894A patent/JP3208555B2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002022414A (en) * | 2000-07-10 | 2002-01-23 | Hitachi Chem Co Ltd | Step inspecting apparatus and method of manufacturing optical guide device |
| KR100757233B1 (en) * | 2006-06-08 | 2007-09-10 | 한국전자통신연구원 | Optical waveguide platform and method of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3208555B2 (en) | 2001-09-17 |
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