JPH08103029A - Battery pack, charger and charging adapter - Google Patents

Abstract

PURPOSE: To shorten precharging period by turning off FET and passing charging current through a parasitic diode when the secondary battery is not in a discharging condition or is in a charging condition, by using a control means. CONSTITUTION: When discharging is stopped and a charger 102 is connected, both of FET3 and FET4 are ON, so that charging current runs through the FET3 and FET4. Therefore, FET3 is kept OFF, by which charging current runs through a parasitic diode 3A. The terminal voltage of a battery pack is higher than that of a conventional type by 0.7V which is the voltage drop of the parasitic diode 3A, so after starting charging, the terminal voltage rises immediately to 5.8V which is necessary voltage to assure the operation of a camcoder 103. It is thus possible to shorten precharging period.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a battery pack, a charging adapter, and a charger, which are so-called precharged with a small current during charging until the voltage reaches a predetermined value.

[0002]

2. Description of the Related Art FIG. 10 shows an example of the configuration of a conventional battery pack. The secondary batteries A or B are, for example, lithium-ion type batteries, each having a full charge voltage of, for example, 4.2 V, and these are connected in series. The + terminal of the secondary battery A is connected to the terminal EB +, and the − terminal of the secondary battery B is connected to the terminal EB via the FETs 3 and 4 connected in series to the secondary batteries A and B. -Is connected. Therefore, according to this battery pack, from its terminals EB + and EB-
A voltage of 8.4 (= 4.2 × 2) V can be applied to the load (provided that this is the case when the secondary batteries A and B are fully charged). The voltage drops with use).

The control circuit 1 includes a positive terminal of the secondary battery A and a positive terminal 2
It is connected between the negative terminal of the secondary battery B and the voltage between them, that is, the voltage of the secondary batteries A and B connected in series (hereinafter appropriately referred to as battery voltage) is detected. . Further, the control circuit 1 has terminals DO and CO, each of which is an FET (N-channel MOS FET).
3 or FET (N channel MOS FET) 4 is connected to the gate (G).

The source (S) of the FET 3 is connected to the connection point (V-) between the control circuit 1 and the negative terminal of the secondary battery B, and the drain (D) thereof is connected to the drain of the FET 4. There is. The source of the FET4 is connected to the terminal EB-.

In the FET 3, between the source and the drain, the charging currents of the secondary batteries A and B flow (in the direction in which the discharging currents of the secondary batteries A and B do not flow),
The parasitic diode 3A is formed. In addition, FET4
A parasitic diode 4A is formed between the source and the drain in a direction in which a discharge current of the secondary batteries A and B flows (a direction in which a charging current of the secondary batteries A and B does not flow). .

The control circuit 1 normally operates (secondary batteries A and B
Voltage is within a predetermined range), its terminal D
Of O and CO to L and H levels, for example H
The level (the level at which the FETs 3 and 4 are turned on) is output. This H level is applied to the gates of the FETs 3 and 4, so that the FETs 3 and 4 are normally turned on.

Therefore, when a load (not shown) is connected between the terminals EB + and EB-, the secondary batteries A and B, the terminal EB +, the load, the terminal EB-, and the FET4 (FET
4, the discharge current flows through the path of FET3 (source and drain of FET4) and FET3 (drain and source of FET3).

At this time, the control circuit 1 detects the battery voltage, which is the predetermined first reference voltage (secondary battery A
And B become smaller than a voltage (for example, 5V) that may cause an overdischarge state, the output level of the terminal DO is changed from H level to L level (for example, ground level (0V)). As a result, the L level is applied to the gate of the FET3, and the FET3 is turned off.
Since the parasitic diode 3A of the FET 3 is connected in the direction in which the charging current flows, that is, the direction in which the discharging current does not flow, when the FET 3 is turned off, the discharging current is cut off. This prevents over-discharge.

In this state, a charger (not shown in FIG. 10) is provided between the terminals EB + and EB-.
Is connected and the charging of the secondary batteries A and B is started, the charger, the terminal EB +, the secondary batteries A and B,
A charging current flows through the path of the parasitic diode 3A and the FET 4. However, in this case, in the parasitic diode 3A, as compared with the source-drain of the FET 3 (FET
3 (the same applies to FET4), when a voltage of a certain level is applied to the gate, the on-resistance becomes a small value, so the voltage drop between the source and drain is very small), for example, about Since a large voltage drop of about 0.6 to 0.8 V occurs, efficient charging cannot be performed.

Therefore, when the charging is started, that is, when the charger is connected, the control circuit 5 detects a voltage drop (for example, a voltage drop of about 1 V) caused thereby,
After that, the output level of the terminal DO is forcibly changed from the L level to the H level. As a result, the H level is applied to the gate of the FET3, and the FET3 is turned on. Then, the charger, the terminal EB +, the secondary batteries A and B, FE
The charging current is performed through the path of T3 and FET4.

During charging, the control circuit 1 still detects the battery voltage, which may cause a predetermined second reference voltage (secondary batteries A and B to be overcharged). Voltage (for example, 8.4V), the output level of the terminal CO is changed from H level to L level (for example, ground level (0V)). As a result, the L level is applied to the gate of FET4, and F
ET4 is turned off. FET4 parasitic diode 4A
Is connected in the direction in which the discharge current flows, that is, in the direction in which the charge current does not flow. Therefore, when the FET 4 is turned off, the charge current is cut off. This prevents overcharging.

In this state, when the load is connected again between the terminals EB + and EB- and the discharge of the secondary batteries A and B is started, the load, the terminal EB + and the secondary batteries A and B are started. , FET3, parasitic diode 4A, discharge current flows. However, in this case, the parasitic diode 4A causes a large voltage drop similarly to the above-mentioned parasitic diode 3A, so that efficient discharge cannot be performed.

Therefore, when the discharge is started, that is, when the load is connected, the control circuit 1 detects a voltage drop (for example, a voltage drop of about 0.4V) caused thereby, and then the terminal DO. The output level of is forcibly changed from L level to H level. As a result, the FET 4 is turned on and efficient discharge is performed.

Next, FIG. 11 shows an example of a conventional charger for charging the battery pack 101 as described above. The power supply circuit 32 is, for example, 2 connected in series.
A voltage equal to the full charge voltage of the secondary batteries A and B (in this case, 8.4 V as described above) is generated and the charging current is supplied. The + terminal of the power supply circuit 32 is
The charger 10 is connected via the parallel circuit of the resistor R and the switch SW.
2 is connected to the terminal EC +, and its-terminal is connected to the terminal- of the charger 102.

Therefore, the terminal EB of the battery pack 101
The battery pack 101 can be charged by connecting + or EB- to the terminals EC + or EC-, respectively.

Here, the battery pack 101 is, for example, a camcorder 10 in which a VTR and a video camera are integrated.
3 is used in the camcorder 103,
When operating as a TR, it would be convenient if the camcorder 103 could be set in the charger 102 and powered by it. In addition, while operating the camcorder 103 using the charger 102 as a power source, at the same time, the battery pack 1
It would be even more convenient if 01 can be charged.

Therefore, this charger 102 has terminals EB + and EB- for charging the battery pack 101, and terminals EC '+ and E for supplying power to the camcorder 103.
It also has C'-. The terminal EC ′ + is a connection point between the + terminal of the power supply circuit 32 and a parallel circuit including the resistor R and the switch SW, and the terminal EC′− is a connection point between the − terminal of the power supply circuit 32 and the terminal EC−. They are connected to each other, whereby the camcorder 10 is connected to the terminals EC '+ and EC'-.
If 3 is connected, power can be supplied to the camcorder 103.

Now, the resistor R and the switch S
No parallel circuit of W is provided, that is, the power supply circuit 3
Charger 1 in which the + terminal of 2 and the terminal EC + are directly connected
If the battery pack 101 is connected to the charger 102, the voltage between the terminals EC + and EC− is the voltage (terminal voltage) of the battery pack 101 (the terminals EB + and EB− of the battery pack 101). Voltage between
Becomes equal to

Further, the + terminal of the power supply circuit 32 and the terminal E
When C + is directly connected, terminals EC '+ and E
Since the voltage between C′− is equal to the voltage between terminals EC + and EC−, the voltage supplied to the camcorder 103 is equal to the voltage of the battery pack 101.

Therefore, the terminal voltage of the battery pack 101 is lower than the voltage required to operate the camcorder 103 (the minimum voltage required to guarantee the normal operation of the CPU (not shown) incorporated in the camcorder 103). When it is low, when both the battery pack 101 and the camcorder 103 are connected to the charger 102, the camcorder 103 does not operate normally.

That is, when the battery pack 101 is in a state close to an over-discharged state, the terminal voltage thereof is, for example, about 5.
If the voltage required to operate the camcorder 103 is about 5.8 V,
When both the battery pack 101 and the camcorder 103, which are in a state close to the over-discharged state, are connected to the charger 102, the normal operation of the camcorder 103 cannot be guaranteed.

Therefore, the charger 102 is provided with a parallel circuit composed of the resistor R and the switch SW, and a switch control circuit 33 for controlling the switch SW. The switch control circuit 33 detects the voltage between the terminals EC + and EC− (that is, the voltage of the battery pack 101), and the voltage is 5.8V which is the voltage required for the camcorder 103 to operate normally. If it is above, the switch SW is turned on, and if it is less than 5.8 V, the switch SW is turned off.

When the switch SW is off, the charging current is
It is supplied to the battery pack 101 via the resistor R.
Now, when the voltage of the battery pack 101 is, for example, 5 V, a voltage drop of about 3 (≈8.4-5) V occurs at the resistor R, which causes the power supply circuit 32 in the camcorder 103. The generated voltage of 8.4V is applied.

By the way, in this case, as the resistance R, for example, a resistance of about 100Ω is used. Therefore, when the battery pack 101 is charged through the resistor R, the charging current is about 30 mA (= 3V / 100Ω).
If the battery is charged in this state, it will take a considerable amount of time to complete the charging.

Therefore, in the switch control circuit 33, as described above, the voltage of the battery pack 101 is 5.8 V which is the voltage required for the camcorder 103 to operate normally.
Then, the switch SW is turned on. As a result, the charging current flows through the switch SW, so that the battery pack 101 is charged with a large charging current. Therefore, after the voltage of the battery pack 101 reaches 5.8V, charging is completed in a short time.

Here, FIG. 12 shows the battery pack when the battery pack 101 having a terminal voltage of 5 V is further mounted (connected) when the camcorder 103 is mounted (connected) to the charger 102. The time change of the voltage of 101 (terminal voltage) and the voltage supplied to the camcorder 103 is shown. The battery pack 101 is the charger 102
Before it is installed on the camcorder 103, the power circuit 3
The voltage of 8.4 V generated by 2 is supplied. When the battery pack 101 is attached, the switch S
Since W is turned off, the voltage of 8.4 V is continuously supplied to the camcorder 103 as it is.

On the other hand, for the battery pack 101,
Through the resistor R, charging with a small charging current is started. Then, when the terminal voltage becomes 5.8 V, the switch SW is turned on, whereby charging with a large charging current is started via the switch SW. When charging with such a large charging current is started, the terminal voltage of the battery pack 101 instantly rises by, for example, about 0.3V. This is the loss due to the internal resistance of the secondary batteries A and B. How much the temperature increases depends on, for example, the temperature, the capacities of the secondary batteries A and B, the old and new thereof, and the like.

When the switch SW is turned on, the voltage supplied to the camcorder 103 becomes the same as the voltage of the battery pack 101.

When the switch SW is turned on,
The voltage supplied to the camcorder 103 momentarily becomes 5.8V which is the voltage of the battery pack 101, but since this voltage is a voltage at which the camcorder 103 can operate normally, there is no problem.

[0030]

By the way, the charger 10
In FIG. 2, as shown in FIG. 12, a period (precharge period) of charging with a minute current (hereinafter referred to as precharge period) from when the switch SW is turned off to when the switch SW is turned on is longer than a predetermined time. Long, battery pack 10
If 1 is defective, battery error processing such as stopping charging is performed. Further, conventionally, the precharge time detection (precharge period detection) is realized by, for example, software.

Therefore, for example, the battery pack 101 (2
If the secondary batteries A and B) are changed to have a larger capacity, the precharge period becomes longer. Therefore, when the secondary battery is charged by the charger 102, the battery pack 101
The battery error processing is performed even though the battery has not failed.

In order to prevent this, there is a method of changing the above-mentioned software. In this method, the manufacturer manufactures a new charger in which the software is changed for battery packs having different capacities. Need to sell,
Moreover, the consumer side must purchase the charger newly.

Further, when the capacity of the battery pack 101 is changed to a large one, even if a new charger is used, the precharge period is long, so that it takes a considerable time to complete the charging. (If the capacity required to increase the voltage of the battery pack 101 from 5 V to 5.8 V is 120 mAH, for example, it takes 4 hours (= 120 mAH / 30 mA) for precharging alone).

The present invention has been made in view of such a situation, and makes it possible to shorten the precharge period.

[0035]

The battery pack of the present invention is a secondary battery (for example, the secondary batteries A and B shown in FIG. 1).
Etc.), switching means (for example, FET3 shown in FIG. 1) connected in series with the secondary battery for turning on / off the discharge current of the secondary battery, and detecting the discharge or charge state of the secondary battery. In a battery pack provided with a control unit (for example, the operational amplifier 2 shown in FIG. 1) that controls the switching unit according to the detection result, the switching unit inputs and outputs the charging current or the discharging current of the secondary battery. First and second input / output terminals (for example, source and drain) and a control terminal (for example, gate) to which a control voltage for turning on or off is applied.
And a FET having a parasitic diode (for example, the parasitic diode 3A shown in FIG. 1) arranged in the direction in which the charging current of the secondary battery flows, the control means includes: Or when in the charging state, FE
It is characterized in that T is turned off and a charging current is caused to flow through a parasitic diode.

When this battery pack is further provided with a voltage detecting means for detecting the voltage of the secondary battery (for example, the Zener diode DA shown in FIG. 1), the control means has the voltage detected by the voltage detecting means. When is equal to or higher than a predetermined value, the FET can be turned on. Further, the control means can detect the discharged or charged state of the secondary battery based on the potential difference between the first and second input / output terminals. Further, when a discharge current flows between the first and second input / output terminals, the control means:
A control voltage is applied to the control terminal so that the potential difference between them becomes a predetermined value, and a potential difference of a predetermined value or more is generated between the first and second input / output terminals in the direction in which the discharge current flows. When the secondary battery is present, it can be determined that the secondary battery is in the discharged state.

The charging adapter of the present invention is a charging adapter mounted between the battery pack and the charger at the time of charging, and the charging current supplied from the charger to the battery pack is input / output. First and second input / output terminals (for example, source and drain) and a control terminal to which a control voltage for turning on or off is applied (for example,
Gate) and a parasitic diode arranged in the direction in which the charging current flows (for example, parasitic diode 5A shown in FIG. 8).
And the like) (for example, FET5 shown in FIG. 8)
Etc.) and voltage detection means for detecting the voltage of the battery pack (for example, Zener diode DB shown in FIG. 8).
When the voltage detected by the voltage detecting means is less than a predetermined value, the FET is turned off, the charging current flows through the parasitic diode, and the voltage detected by the voltage detecting means is equal to or more than the predetermined value. At one time, the FET is turned on and the charging current is characterized by flowing through the first and second input / output terminals.

The charger of the present invention is a charger for charging a battery pack, and is a supply means for supplying a charging current to the battery pack (for example, the power supply circuit 32 shown in FIG. 9).
A first and second input / output terminals (for example, a source and a drain) through which a charging current supplied to the battery pack is input and output; , Gate, etc.) and a parasitic diode (eg,
And a parasitic diode 6A shown in FIG. 9)
(For example, FET6 shown in FIG. 9) and voltage detection means for detecting the voltage of the battery pack (for example, Zener diode DC shown in FIG. 9) are provided, and the voltage detected by the voltage detection means has a predetermined value. When less than, the FET is turned off and the charging current flows through the parasitic diode,
When the voltage detected by the voltage detecting means is equal to or higher than a predetermined value, the FET is turned on and the charging current flows through the first and second input / output terminals.

[0039]

In the battery pack of the present invention, when the secondary batteries A and B are not in the discharged state or in the charged state, the FET 3 is turned off and the charging current flows through the parasitic diode 3A. Therefore, at the time of charging, the voltage of the battery pack increases by the amount of the voltage drop due to the parasitic diode 3A, so that the precharge period can be shortened.

In the charging adapter of the present invention, when charging, it is mounted between the battery pack and the charger, and when the voltage of the battery pack is less than a predetermined value, the FET 5 is turned off and the charging current is parasitic. It flows through the diode 5A. Further, when the voltage of the battery pack is equal to or higher than the predetermined value, the FET 5 is turned on and the charging current flows through the source and the drain of the FET 5. Therefore, the FET
When 5 is off, the voltage of the battery pack seen from the charger through the charging adapter is increased by the amount of the voltage drop due to the parasitic diode 5A, so that the precharge period can be shortened.

In the charger of the present invention, the power supply circuit 32
Supplies a charging current to the battery pack. And
When the voltage of the battery pack is less than the specified value, FET6
Is turned off and the charging current flows through the parasitic diode 6A. When the voltage of the battery pack is equal to or higher than a predetermined value, FET6 is turned on and the charging current is FET6.
Flows through the source and drain. Therefore, FE
When T6 is off, the voltage of the battery pack seen from the power supply circuit 32 is increased by the amount of the voltage drop due to the parasitic diode 6A, so that the precharge period can be shortened.

[0042]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the configuration of an embodiment of the battery pack of the present invention. 10 and 11 in the figure.
The same reference numerals are given to the portions corresponding to the case of. That is, in this battery pack, the terminal DO of the control circuit 1 is connected to the gate of the FET 3 via the NPN transistor Tr1 and the operational amplifier 2.

Specifically, the terminal DO of the control circuit 1 is connected to the base of the transistor Tr1, its collector is at the connection point between the control circuit 1 and the + terminal of the secondary battery A, and its emitter is an operational amplifier. 2 are respectively connected to terminals that activate 2 (hereinafter, appropriately referred to as active terminals). The output terminal of the operational amplifier 2 is F
It is connected to the gate of ET3.

The non-inverting input terminal (+) of the operational amplifier 2 is connected to the connection point between the terminal EB- and the source of the FET 4 via the resistor RC. Further, the inverting input terminal (-) of the operational amplifier 2 is connected to the connection point between the resistors RA and RB. When the voltage applied to the non-inverting input terminal is larger than the voltage applied to the inverting input terminal, the operational amplifier 2 outputs a voltage corresponding to the difference between the voltages and outputs the voltage to the non-inverting input terminal. If the applied voltage is less than or equal to the voltage applied to the inverting input terminal,
It is designed to output 0 level.

One end of the resistor RA that is not connected to the resistor RB is connected to the connection point between the + terminal and the terminal EB + of the secondary battery A, and the one of the resistor RB that is not connected to the resistor RA. One end is connected to a connection point between the negative terminal of the secondary battery B and the terminal EB-.

The Zener diode DA has its cathode connected to the connection point between the + terminal and the terminal EB + of the secondary battery A, and its anode connected to the connection point between the non-inverting input terminal of the operational amplifier 2 and the resistor RC. ing. The Zener voltage of the Zener diode DA is set to 5.8 V or higher, which is a voltage that guarantees the operation of the camcorder 103 (the upper limit is the voltage of the battery pack at which the charger 102 stops charging (for example, full charge voltage). 8.4V),
The voltage drop of the parasitic diode 3A of the FET 3 is 0.
7V is subtracted).

Next, FIG. 2 shows a detailed configuration example of the control circuit 1. In the voltage detection circuit 11, the voltages of the secondary batteries A and B (2 of the directly connected secondary batteries A and B,
The voltage between the + terminal of the secondary battery A and the-terminal of the secondary battery B), that is, the battery voltage is detected. The voltage (battery voltage) detected by the voltage detection circuit 11 is supplied to the determination circuit 12. The determination circuit 12 determines whether the voltage from the voltage detection circuit 11 is lower than the first reference voltage and whether it is higher than the second reference voltage (provided that the first reference voltage <the second reference voltage). Reference voltage). Then, the determination circuit 12 controls the gate drive circuit 13 according to the determination result.

That is, the determination circuit 12 is the voltage detection circuit 11
When the battery voltage from is lower than the first reference voltage, the gate drive circuit 13 is caused to output the L level from the terminal DO and the H level is output from the terminal CO.
When the voltage from the voltage detection circuit 11 is equal to or higher than the first reference voltage and equal to or lower than the second reference voltage, the determination circuit 12 causes the gate drive circuit 13 to output the H level from the terminal DO, and The H level is output from the terminal CO. Further, the determination circuit 12 includes the voltage detection circuit 11
Is higher than the second reference voltage, the gate drive circuit 13 is caused to output the H level from the terminal DO and the L level is output from the terminal CO.

Further, the decision circuit 12 has a terminal CO or D.
When the output level of O is the L level and the voltage supplied from the voltage detection circuit 11 drops by a predetermined level, the output level of the terminal CO or DO is forcibly set to the H level as described above. .

As described above, the terminal DO of the control circuit 1
A signal of the same level as that described with reference to FIG. 10 is output from each of CO and CO.

The ground level shift circuit 14 built in the gate drive circuit 13 is set to the voltage level of the source of the FET 4 (the voltage level of the point b in FIG. 1) during charging.
The ground level of the terminal CO is shifted. As a result, when the L level is output from the terminal CO, the FET4
Is normally operated, that is, the FET 4 is turned off.

In FIG. 1, the connecting line between the control circuit 1 (ground level shift circuit 14) and the point b is omitted. Further, when L level is output from the terminal DO of the control circuit 1 during discharging to prevent over-discharge, the voltage level of the source of the FET 3 (in FIG. 1,
Since the voltage level of the point a) is equal to the potential of the-terminal of the secondary battery B, that is, it has the lowest potential in the battery pack during discharging, it is not necessary to shift the ground level of the terminal DO.

Returning to FIG. 1, the operation will be described.
First, when the secondary batteries A and B are in a state of being charged to some extent (the first reference voltage or more and the second reference voltage or less), from the terminals DO and CO of the control circuit 1 described above. Thus, the H level is output. Therefore, F
ET4 is turned on as described above.

On the other hand, the H level output from the terminal DO is applied to the base of the transistor Tr1, which turns on the transistor Tr1.
From the + terminal of the secondary battery A, through the transistor Tr1
A voltage of a predetermined level is applied to the active terminal of the operational amplifier 2 (hereinafter, appropriately referred to as "the H level is applied to the active terminal"). Then, the operational amplifier 2 becomes active (in operation).

Battery voltage (voltage of secondary batteries A and B)
Is higher than the Zener voltage of the Zener diode DA, the battery voltage is applied to the non-inverting input terminal of the operational amplifier 2 via the Zener diode DA. Further, a voltage obtained by dividing the battery voltage by the resistors RA and RB (when the battery voltage is E, RB × E / (RA + RB)) is applied to the inverting input terminal of the operational amplifier 2. Therefore, the voltage applied to the non-inverting input terminal of the operational amplifier 2 is higher than the voltage applied to its inverting input terminal, and since the operational amplifier 2 is active, the H level is output from its output terminal. As a result, FET3
It turns on.

On the other hand, when the battery voltage is the Zener diode D
If the voltage is not higher than the Zener voltage of A, no voltage is applied to the non-inverting input terminal of the operational amplifier 2. However,
When a load is connected to the battery pack (when a load is connected to the terminals EB + and EC-), the potential of the point b becomes the potential of the + terminal of the secondary battery A via the connected load, and thus The battery voltage is applied to the non-inverting input terminal of the operational amplifier 2 via the resistor Rc. Therefore, as in the case where the battery voltage is equal to or higher than the Zener voltage of the Zener diode DA, the output of the operational amplifier 2 becomes H level,
As a result, the FET3 is turned on.

As described above, since the FET3 and the FET4 are both turned on, the discharge current flows through the same route as in the case described with reference to FIG.

When the battery voltage (voltage of the secondary batteries A and B) becomes lower than the first reference voltage (voltage at which the secondary batteries A and B may be in an overdischarged state), the control circuit 1 The output level of the terminal DO is changed from H level to L level. As a result, the transistor Tr1 is turned off, and no voltage (H level) is applied to the active terminal of the operational amplifier 2. Then, the operational amplifier 2
It becomes an inactive state (a state in which it does not operate), and no voltage (H level) is output from the operational amplifier 2 regardless of the voltage applied to its inverting input terminal and non-inverting input terminal (the output level of the operational amplifier 2 is L Level). Therefore, the FET 3 is turned off and over discharge is prevented.

Next, in this state, when the charger 102 described in FIG. 11 is connected to the battery pack (between the terminals EB + and EB−), charging of the secondary batteries A and B is started. , As described above, the charger 10
2, the charging current flows through the path of the terminal EB +, the secondary batteries A and B, the parasitic diode 3A, and the FET 4. Therefore,
In this case, since a predetermined voltage drop (here, for example, 0.7 V) occurs in the parasitic diode 3A, as described above, considering the charging efficiency, the FET 3 is turned on and the parasitic diode 3A does not operate. Without FET3
It is better to let the charging current flow through.

However, in this case, when the voltage of the battery pack (the voltage between the terminals EB + and EB−) is viewed from the charger 102 side, the parasitic diode 3A is found from the battery voltage.
The voltage becomes 0.7 V, which is a voltage drop of 0.7 V. Therefore, when the charging current is passed through the parasitic diode 3A, compared to when the charging current is passed through the FET 3,
The voltage of the battery pack is faster and the camcorder 103
Will be 5.8V, which is the voltage required to guarantee the operation.

Therefore, conventionally, as described with reference to FIG. 10, when the charger is connected, the FET 3 is turned on. However, in the battery pack of FIG. 1, the charger 102 is connected. However, the FET 3 is not immediately turned on, but is left off.

That is, when the charger 102 is connected, the control circuit 1 changes the output level of the terminal DO from L level to H level. As a result, as described above, the transistor Tr1 is turned on and the operational amplifier 2 is activated.

On the other hand, in FIG. 1, since the charging current flows in the direction from the point a to the point b, the potential at the point a becomes higher than the potential at the point b. Since the voltage drop of the parasitic diode 3A is sufficiently larger than the voltage drop of the FET 4, the potential difference between the points a and b is almost the same as the voltage drop of the parasitic diode 3A.

In the present case, the battery voltage is determined by the camcorder 10
Since it is lower than 5.8V which is the voltage necessary to guarantee the operation of No. 3 and therefore lower than the Zener voltage of the Zener diode DA, the potential at the point b or a is present at the non-inverting input terminal or the inverting input terminal of the operational amplifier 2. The voltage corresponding to
Applied respectively. That is, the voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier 2 is equal to the potential difference between the points b and a. Therefore, in the present case, the output of the operational amplifier 2 becomes 0V (L level), and the FET 3 becomes the charger 10
Even if 2 is connected, it is not turned on but is kept off, and the charging current continues to flow through the diode 3A.

Next, when the secondary batteries A and B are in a charged state to some extent (the first reference voltage or more, the second reference voltage
If the load is connected to the battery pack and discharging is performed, as described above,
Both FET3 and FET4 are turned on. In this state, when the discharging is stopped and the charger 102 is connected, the charging is performed as follows.

That is, in this case, FET3 and FET4
Since both are in the ON state, this FET3 and FE
The charging current flows through T4. As described above, the charging current flows from the point a to the direction b, and the potential at the point a becomes higher than the potential at the point b. Therefore, the output of the operational amplifier 2 in the active state changes from the H level to the L level. Become. Therefore, the FET 3 is turned off, which causes the charging current to flow through the parasitic diode 3A.

In FIG. 3, the charger 102 is provided with a camcorder 10
When 3 is attached (connected), the voltage (terminal voltage) of the battery pack shown in FIG. 1 when the terminal voltage is 5 V is further attached (connected), 3 shows the change over time in the voltage supplied to the camcorder 103. Note that FIG. 3 corresponds to FIG. 12 described above. Compared to the conventional case shown in FIG. 12 (in FIG. 3, the terminal voltage of the conventional battery pack is indicated by a dashed line), the terminal voltage of the battery pack is the voltage drop of the parasitic diode 3A. There is 0.7
Since it is increased by V, it can be seen that after charging is started, the terminal voltage immediately rises to 5.8V which is a voltage required to guarantee the operation of the camcorder 103. Therefore,
As shown in the figure, the precharge time can be shortened.

Therefore, even if the capacities of the secondary batteries A and B are changed to large ones, it is possible to prevent the occurrence of the precharge error as described above. further,
For example, charging from a deep discharge state can be speeded up.

After the completion of precharge, charging with a large charging current is started as described above, but charging is performed with the charging current flowing through the parasitic diode 3A (FIG. 1). If the charger 102 finishes charging when the terminal voltage of the battery pack reaches the full charge voltage of the secondary batteries A and B connected in series, as shown in FIG. The voltage is 0. 0 which is the voltage drop of the parasitic diode 3A from the full charge voltage.
Only 7V lower. That is, in this case, the secondary batteries A and B are not sufficiently charged.

Therefore, after the completion of the precharge, it is necessary to turn on the FET 3, that is, the charging current, not through the parasitic diode 3A but through the FET 3.

Therefore, in the battery pack of FIG. 1, the Zener diode DA is provided between the + terminal of the secondary battery A and the non-inverting input terminal of the operational amplifier 2 as described above.
Is provided. In this case, when the battery voltage rises due to charging and becomes equal to or higher than the Zener voltage of the Zener diode DA, the Zener diode DA is turned on and the battery voltage is applied to the non-inverting input terminal of the operational amplifier 2. On the other hand, the voltage applied to the inverting input terminal is
As described above, since the battery voltage is a voltage obtained by dividing the battery voltage by the resistors RA and RB, the output of the operational amplifier 2 becomes H level. As a result, the FET3 is turned on.

As a result, as shown in FIG. 5, the terminal voltage of the battery pack drops by the voltage drop of the parasitic diode and becomes almost the same as the battery voltage (the same unless the voltage drops of FETs 3 and 4 are taken into consideration). become). Therefore, the secondary batteries A and B are sufficiently charged.

Here, the Zener voltage is 5.8 V which is a voltage for guaranteeing the operation of the camcorder 103 as described above.
The reason above is that if it is smaller than that, the terminal voltage of the battery pack drops by 0.7V when the FET 3 is switched from the off state to the on state, so that the voltage becomes smaller than 5.8V and the precharge is performed again. Is started. Furthermore, the upper limit of the Zener voltage is set to a value obtained by subtracting 0.7V, which is the voltage drop of the parasitic diode 3A, from the voltage of the battery pack at which the charger 102 finishes (stops) charging as described above. This is because if the value is larger than that, the charger 102 finishes charging before the Zener diode DA is turned on.

In the battery pack shown in FIG. 1,
The battery voltage is detected by the Zener diode DA (whether or not the battery voltage is equal to or higher than the Zener voltage), and when it is equal to or higher than a predetermined value (Zener voltage), the operational amplifier 2 turns on the FET3. However, it is also possible to detect the battery voltage by another method and control the FET 3 to turn on when the detected voltage is equal to or higher than a predetermined value.

When discharging the battery pack (FIG. 1), when the battery voltage is lower than the Zener voltage of the Zener diode DA, the voltage between the non-inverting input terminal and the inverting input terminal of the operational amplifier 2 is point b. Is equal to the potential difference between a and a.

On the other hand, the N-channel MOS FETs such as the FETs 3 and 4 have a very small on resistance when the voltage applied to their gates is higher than a certain level of voltage. Therefore, at the gates of FETs 3 and 4,
When a voltage of a certain level or higher is applied and the discharge current is small, the potential difference between points b and a is very small. That is, a voltage of a certain level or more is applied to the gates of the FETs 3 and 4, whereby the ON resistance of each becomes, for example, 50 mΩ, and the discharge current becomes
For example, in the case of 30 mA, the potential difference between points b and a is
It becomes 3 mV (= (50 mΩ + 50 mΩ) × 30 mA).

At the time of discharging (except for over-discharging), that is, when the potential at the point b becomes larger than the potential at the point a,
In order to turn on the FET 3, it is necessary to set the output of the operational amplifier 2 to the H level. However, when the potential difference between the points b and a is very small, the operational amplifier 2 determines that the H level is high due to the small potential difference. You must use the one that outputs with high accuracy. When the operational amplifier 2 has high accuracy as described above, the cost of the battery pack is increased.

Therefore, in the battery pack of FIG. 1, the ON resistance of the N-channel MOS FET has a very small value when a relatively large voltage is applied to the gate of the N-channel MOS FET, but when the gate voltage is small. Is a characteristic that the on-resistance decreases as the gate voltage increases, that is, the on-resistance increases when the voltage applied to the gate decreases. By causing the above, the potential difference between the points b and a is increased to some extent.

That is, in the battery pack of FIG.
The potential difference between points b and a is input to the operational amplifier 2, and its output is the gate voltage of the FET 3. That is,
Negative feedback is applied to FET3. Thus, when the discharge current is small, points b and a
And the input voltage to the operational amplifier 2 decreases, and the output voltage of the operational amplifier 2, that is, the gate voltage of the FET 3 also decreases. Therefore, in this case, the ON resistance of the FET 3 becomes large, and even if the discharge current is small, the voltage drop in the FET 3 becomes large, and the potential difference between the points b and a also becomes large.

When the discharge current becomes large, the potential difference between points b and a, that is, the input voltage to the operational amplifier 2 also becomes large, and the output voltage of the operational amplifier 2, that is, the FET.
The gate voltage of 3 also increases. Therefore, in this case, FE
The on-resistance of T3 becomes small, and even if the discharge current becomes large, the voltage drop in FET3 becomes small, and the potential difference between points b and a also becomes small.

As described above, the magnitude of the discharge current is
When it is in a range of a small value to some extent, the potential difference between the points b and a, that is, the input voltage to the operational amplifier 2 is held at a constant value of some magnitude.

On the other hand, when the discharge current further increases, the on-resistance of the FET3 becomes a minute value as described above. In this case, however, the discharge current is large, so that the FET3
Even if the on resistance of 1 is small, the FET 3 causes a large voltage drop proportional to the discharge current.

Therefore, in the FET3, when the discharge current is below a certain value (for example, 500 mA),
When a constant voltage drop of a predetermined magnitude is generated and the discharge current becomes larger than that value, a voltage drop proportional to the magnitude of the discharge current is generated. Therefore, the operational amplifier 2 is not very accurate. Cheap ones can be used.

From the above, the operational amplifier 2 sets the control voltage such that the potential difference between the source and drain of the FET 3 becomes a predetermined value when the discharge current flows between the source and the drain of the FET 3.
It is determined that the secondary batteries A and B are in a discharging state when a potential difference of a predetermined value or more is applied between the source and the drain of T3 in the direction of the discharging current. In this case, the operational amplifier 2 outputs an H level), when the secondary battery A and B are not in such a state (in this case, the operational amplifier 2 outputs an L level), the FET 3 is turned off. It can be said that the control is performed so that the charging current is caused to flow through the parasitic diode 3A.

When the discharge current is below a certain value, the voltage drop caused in the FET 3 takes into consideration, for example, drift and offset of the operational amplifier 2, and a voltage larger than that value (for example, 50 mV). Should be This can be set by adjusting the resistors RA and RB (the ratio of RA and RB).

In the above case, the operational amplifier 2 detects whether or not the battery pack (secondary batteries A and B) is in the discharged state, and when it is in the discharged state, the FET 3 is turned on, and When not in the discharging state, the FET 3 is turned off. However, other known means (for example, a highly accurate operational amplifier is used to reduce a minute potential difference between points a and b (or FET 3 or FET 4)). Detecting and determining (detecting) the discharged or charged state of the battery back based on the detection result, and corresponding to the determination result (detection result), the FE as described above.
ON / OFF control (switching control) of T3 (control to turn off when the battery pack is not in a discharging state or charging state, and turn on when the battery pack is in a discharging state or not charging state) It is also possible to do.

Further, for example, a mechanism for detecting that the battery pack is attached to the charger 102 (for example, a switch that is turned on when the battery pack is attached to the charger 102, or the battery pack is attached to the charger 102). It is also possible to provide the battery pack with a switch that causes the user to turn it on when it is attached, and to perform switching control of the FET 3 according to the detection result.

However, since it is possible to use an inexpensive operational amplifier in the case shown in FIG. 1, it is possible to reduce the cost of the device (compared with the case where a switch or other means is used). .

Next, FIG. 6 shows an example of the actual configuration of the portion on the left side of the control circuit 1 of the battery pack of FIG.
In the figure, transistors Q7, IC1 to 3, Zener diode ZD, and resistors R12, R13, and R15 are the transistors Tr1, FET3, FET4, operational amplifier 2, Zener diode DA, resistors RA, RB, and RC in FIG.
, Respectively.

The capacitor C7 is a speed-up capacitor. The capacitor C8 is a capacitor for preventing oscillation. Further, the diodes D1 and D2 are diodes for preventing backflow. The resistor R11 is a resistor for applying a bias (diode bias) to the diodes D1 and D2.

Next, FIG. 7 shows the configuration of an embodiment of the charging adapter of the present invention. This charging adapter 21
Is used by being mounted between the charger (conventional charger) 102 shown in FIGS. 10 and 11 and the battery pack 101 during charging. That is, the battery pack 101 is charged via the adapter 21.

FIG. 8 shows a detailed configuration example of the adapter 21. The cathode of the Zener diode DB is connected to the connection point between the terminal connected to the terminal EC + of the charger 102 and the terminal connected to the terminal EB + of the battery pack 101, and the anode of the Zener diode DB is connected via the resistor RD. It is connected to the source of the N-channel MOS FET5. F
The connection point between the Zener diode DB and the resistor RD is connected to the gate of ET5 via the amplifier AMP1. The drain or source of the FET 5 is the charger 10
2 is connected to the terminal EC- or the terminal connected to the terminal EB- of the battery pack 101, respectively.

A parasitic diode 5A is formed between the drain and the source of the FET 5 in the direction in which the charging current from the charger 102 flows. Further, the Zener voltage of the Zener diode DB is the same as that in the Zener diode DA of FIG.

In the adapter 21, the battery pack 101
When the terminal voltage of is lower than the Zener voltage of the Zener diode DB, the Zener diode DB is turned off, and therefore, the voltage is not applied to the gate of the FET 5, so that the FET 5 is also turned off. Therefore, in this state, when charging is started as shown in FIG. 7,
The charging current from the charger 102 will flow through the parasitic diode 5A. In this case, when the adapter 21 is viewed from the charger 102, its terminal voltage is a voltage obtained by adding 0.7 V, which is the voltage drop of the parasitic diode DB, to the terminal voltage of the battery pack 101.

Then, as the charging progresses, the battery pack 10
When the terminal voltage of 1 becomes equal to or higher than the Zener voltage of the Zener diode DB, the Zener diode DB is turned on. Therefore, the gate of the FET5 is connected to the gate of the FET5 via the amplifier AMP1.
A predetermined level of voltage capable of driving the FET5 (the FET5 is completely turned on) is applied, and the FET5 is
Turns on. This causes the charging current to flow not through the parasitic diode 5A but through the FET 5. In this case, when the adapter 21 is viewed from the charger 102, its terminal voltage becomes the same as the terminal voltage of the battery pack 101 (however, the voltage drop of the FET 5 is negligible).

As described above, when the terminal voltage of the battery pack 101 is less than the Zener voltage of the Zener diode DB, the FET 5 is turned off so that the charging current flows through the parasitic diode 5A, and the battery pack 101 When the terminal voltage of is equal to or higher than the Zener voltage of the Zener diode DB, the FET 5 is turned on so that the charging current flows between the source and the drain thereof. Therefore, as described in FIG. The time can be shortened and the secondary batteries A and B can be sufficiently charged.

In FIG. 8 (the same applies to FIG. 10 described later), the terminal voltage of the battery pack 101 is
The Zener diode DB is used for detection, but Fig. 1
It is also possible to detect the battery voltage by another method and control so that the FET 5 is turned on when the detected voltage is equal to or higher than a predetermined value, as in the case described in the above.

Further, in FIG. 8 (the same applies to FIG. 10 described later), one end of the resistor RD that is not connected to the Zener diode DB is connected to the source of the FET 5, and the terminal voltage itself of the battery pack 101 is set to the Zener. Although the diode DB is used for detection, in addition to this, one end of the resistor RD which is not connected to the Zener diode DB is connected to the FET.
5 is connected to the drain of the parasitic diode 5A (FET
It is also possible to detect the terminal voltage of the battery pack 101 via 5) with the Zener diode DB.

However, in this case, the Zener diode DB
The Zener voltage of 5.8V, which is the voltage that guarantees the operation of the camcorder 103, and the parasitic diode 5A of the FET 5
It is necessary to set the added value to the voltage drop amount (here, for example, 0.7 V), that is, 6.5 V or more. (The upper limit is the battery pack 10 at which the charger 102 stops charging.
The voltage of 1 is 8.4V).

As described above, the Zener voltage of the Zener diode DB is an addition value of 5.8V which is a voltage for guaranteeing the operation of the camcorder 103 and 0.7V which is a voltage drop of the parasitic diode 5A of the FET5. If it is less than 0.5V, the terminal voltage of the battery pack via the adapter 21 is reduced by 0.7V when the FET 5 is switched from the off state to the on state, so that the voltage is 5.8V. This is because it becomes smaller and precharge is started again. Further, the upper limit of the Zener voltage is charged (stopped) by the charger 102 as described above.
The battery pack voltage of 8.4V is
This is because if the value is larger than that, the charger 102 finishes charging before the Zener diode DB is turned on.

Next, FIG. 9 shows the configuration of an embodiment of the charger of the present invention. In the figure, the same reference numerals are given to the portions corresponding to those in FIG.
That is, the charger 31 has the same configuration as the charger 102 of FIG. 11 except that the FET 6, the resistor RE, the amplifier AMP2, and the Zener diode DC are newly provided.

The cathode of the Zener diode DC is connected to the connection point between the terminal EC + and the resistor R, and the anode of the Zener diode DC is connected to the N-channel MOS FET via the resistor RE.
6 sources. In the gate of FET6,
Zener diode DC via amplifier AMP2,
The connection point with the resistor RE is connected. The drain or source of the FET 6 is the power supply circuit 32 or the terminal EB-.
, Respectively.

FET6 and Zener diode D
C, the amplifier AMP2, or the resistor RE is F in FIG.
ET5, Zener diode DB, amplifier AMP1, or resistor RD are similar to each other. That is, F
In ET6, a parasitic diode 6A is formed between the drain and source of the ET6 in a direction in which a charging current flows. Further, the Zener voltage of the Zener diode DC or the resistance value of the resistor RE is the same as that of the Zener diode DB or the resistor RD of FIG.

Therefore, this charger 31 is constructed in the same manner as the conventional charger 102 with the adapter 21 shown in FIG. 8 mounted, and therefore the conventional battery pack 101 is charged using this charger 31. In this case, the precharge time can be shortened and the secondary batteries A and B can be sufficiently charged.

In this embodiment, the secondary batteries A and B are, for example, lithium-ion type batteries, but the present invention is also applicable to, for example, Nick type batteries and lead batteries.

The control circuit 1 has a simple structure as described with reference to FIG.
It is possible to use a so-called power-down type disclosed in Japanese Patent Publication No. 7 or the like. Further, in this embodiment, the control circuit 1 is provided with the secondary battery A.
Although the voltages when B and B are connected in series are detected, for example, the voltages of the secondary batteries A and B are detected and the device is controlled so that they are fully charged. Is also possible. Further, in this embodiment, the two secondary batteries A and B are provided, but the number of secondary batteries may be one, or three or more.

[0107]

As described above, according to the present invention, the precharge period can be shortened.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an embodiment of a battery pack of the present invention.

FIG. 2 is a block diagram showing a detailed configuration example of a control circuit 1 in the embodiment of FIG.

FIG. 3 is a waveform diagram showing the voltage supplied to the camcorder 103 and the terminal voltage of the battery pack.

FIG. 4 shows a case where the battery pack of FIG. 1 is charged,
It is a wave form diagram which shows the terminal voltage and the battery voltage of the secondary batteries A and B.

5 is a diagram showing a case where the battery pack of FIG. 1 is charged,
It is a wave form diagram which shows the terminal voltage and the battery voltage of the secondary batteries A and B.

6 is a circuit diagram showing an example of an actual configuration of a portion on the left side of the control circuit 1 of the battery pack shown in FIG.

7 is a diagram illustrating a case where charging is performed using the charging adapter 21 of FIG.

FIG. 8 is a circuit diagram showing a configuration of an embodiment of a charging adapter of the present invention.

FIG. 9 is a circuit diagram showing a configuration of an embodiment of a charger of the present invention.

FIG. 10 is a diagram showing a configuration of an example of a conventional battery pack.

FIG. 11 is a diagram showing a configuration of an example of a conventional charger.

12 is a waveform diagram showing the voltage supplied to the camcorder 103 and the terminal voltage of the battery pack 101 when the battery pack 101 of FIG. 10 is charged using the charger 102 of FIG.

[Explanation of symbols]

 1 Control Circuit 2 Operational Amplifier 3 FET 3A Parasitic Diode 4 FET 4A Parasitic Diode 5 FET 5A Parasitic Diode 6 FET 6A Parasitic Diode 11 Voltage Detection Circuit 12 Judgment Circuit 13 Gate Drive Circuit 14 Ground Level Shift Circuit 21 Charging Adapter 31 Charger 32 Power Supply Circuit 33 Switch control circuit 101 Battery pack 102 Charger 103 Camcorder

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hisashi Aoki No. 1 Sparrowgairi, Sakazaki, Koda-cho, Nukata-gun, Aichi Prefecture Sony Koda Corporation

Claims (6)

[Claims] 1. A secondary battery, a switching means connected in series with the secondary battery for turning on / off a discharge current of the secondary battery, and detecting a discharged or charged state of the secondary battery, In a battery pack including control means for controlling the switching means in response to the detection result, the switching means includes first and second input / output terminals for inputting / outputting a charging current or a discharging current of the secondary battery. The control unit includes an FET having an output terminal, a control terminal to which a control voltage for turning on or off is applied, and a parasitic diode arranged in a direction in which a charging current of the secondary battery flows, When the secondary battery is not discharged,
Alternatively, when in a charged state, the FET is turned off, and the charging current is caused to flow through the parasitic diode. 2. A voltage detecting means for detecting the voltage of the secondary battery is further provided, wherein the control means turns on the FET when the voltage detected by the voltage detecting means is a predetermined value or more. The battery pack according to claim 1, wherein the battery pack is a battery pack. 3. The control means detects the discharged or charged state of the secondary battery based on the potential difference between the first and second input / output terminals. Battery pack as described. 4. The control means supplies a control voltage to the control terminal such that a potential difference between the first and second input / output terminals has a predetermined value when a discharge current flows between the first and second input / output terminals. It is determined that the secondary battery is in a discharged state when a potential difference of the predetermined value or more is applied between the first and second input / output terminals in the direction in which the discharge current flows. The battery pack according to claim 3, wherein the battery pack is a battery pack. 5. A charging adapter mounted between a battery pack and a charger during charging, wherein the charging current supplied from the charger to the battery pack is input and output. 2 input / output terminals, a control terminal to which a control voltage for turning on or off is applied,
An FET having a parasitic diode arranged in a direction in which the charging current flows, and a voltage detection unit that detects the voltage of the battery pack, and when the voltage detected by the voltage detection unit is less than a predetermined value, The FET is turned off, the charging current flows through the parasitic diode, and when the voltage detected by the voltage detection means is equal to or higher than the predetermined value, the FET is turned on and the charging current is A charging adapter characterized by flowing through the first and second input / output terminals. 6. A charger for charging a battery pack, comprising: supplying means for supplying a charging current to the battery pack; and first and second input / output terminals for inputting and outputting a charging current supplied to the battery pack. FE having an output terminal, a control terminal to which a control voltage for turning on or off is applied, and a parasitic diode arranged in a direction in which the charging current flows
T and voltage detection means for detecting the voltage of the battery pack, and when the voltage detected by the voltage detection means is less than a predetermined value, the FET is turned off and the charging current causes the parasitic diode to When the voltage detected by the voltage detection means is equal to or higher than the predetermined value, the FET is turned on and the charging current flows through the first and second input / output terminals. And charger.