JPH0793452B2 - Method for manufacturing tandem hetero photoelectric conversion element - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a photoelectric conversion element and its manufacturing method, and more particularly, to a photoelectric conversion element using Si, II
The present invention relates to a tandem hetero photoelectric conversion element obtained by connecting a photoelectric conversion element using a group IV compound semiconductor in series by epitaxial growth and a method for manufacturing the same.

[0002]

2. Description of the Related Art In a conventional tandem hetero photoelectric conversion device, for example, Technical Digest of International PVSEC Volume 5 (Kyoto, 1990), page 1028 (Technical Digest of of).
the International PVSEC-
5 (Kyoto, Japan, 1990) p. 10
As described in 28), the heterojunction interface had an atomically flat structure. And it is to form a pn junction of GaAs having a flat surface by using an epitaxial growth method such as a metal organic chemical vapor deposition method after performing impurity diffusion on a Si substrate having a flat surface to form a pn junction. It was made by.

However, the above-mentioned conventional technique has a problem that the photoelectric conversion efficiency cannot be increased as expected because the reflection of incident light on the surface cannot be prevented even if an antireflection film is formed on the surface.

On the other hand, Applied Physics Letters, Vol. 48 (1986), pages 215 to 2
Page 17 (Applied Physics Lette
rs48 (1986) pp. 215-217), a V-shaped groove (hereinafter abbreviated as V groove) is formed on the surface to reduce reflection of incident light,
A method of increasing the photoelectric conversion efficiency has been used.

[0005]

In the second prior art described above, the surface of the Si substrate is a (100) just surface and the V groove is formed in the [011] or [01-1] direction.
When a tandem hetero photoelectric conversion device is manufactured on such a substrate by using the first conventional technique, the following two problems occur.

The first problem is that the V-groove is flattened during growth when epitaxial growth is performed under normal conditions. The normal conditions referred to here are, when the III-V compound semiconductor is subjected to molecular beam epitaxial growth or metalorganic vapor phase epitaxial growth, the growth temperature is 530 ° C. or higher, and the incident flux ratio of the V group element to the III group element is 1- It is about 10.

Secondly, an antiphase boundary in which a bond between group III elements or a group V element exists is generated and becomes a recombination center of carriers, so that the life of carriers is shortened and the efficiency of the photoelectric conversion element is shortened. Is a problem that decreases. This will be described below with reference to FIGS. 8 and 9.

Generally, an atomic step (hereinafter abbreviated as one atomic layer step) 108 having a height of one atomic layer as shown in FIG. 8 exists on the surface of a Si (100) just substrate. FIG. 8A shows a case where a V groove is formed on such a substrate so that the longitudinal direction is [011], and the longitudinal direction is [0].
1-1] is formed as shown in FIG. 8B. FIG. 7 shows a cross-sectional structure when GaAs is grown by about one molecular layer in this state. Si {11 near the Si1 atomic layer step 108 and the Si (100) plane and the V groove side surface
In the vicinity of the intersection with the 1} plane 103, Ga-Ga or As
It can be seen that the bond 107 of the same element such as -As is generated. This is called an anti-phase boundary and becomes a recombination center of carriers, causing deterioration of photoelectric conversion efficiency. As the growth of GaAs on the Si substrate is continued, the antiphase boundary extends in the growth direction, so that it is necessary to suppress the generation at the initial stage of growth of GaAs.

An object of the present invention is to achieve high efficiency in a tandem hetero photoelectric conversion device utilizing epitaxial growth of a III-V group compound semiconductor on a Si substrate by suppressing reflection of incident light and suppressing generation of antiphase boundaries. It is to provide a photoelectric conversion element. Another object of the present invention is V
It is an object of the present invention to provide a method for manufacturing a high-efficiency photoelectric conversion element in which the V-groove shape changes little when epitaxially growing a III-V group compound semiconductor on a grooved Si substrate.

[0010]

In order to achieve the above object, in a tandem hetero photoelectric conversion device utilizing epitaxial growth of a III-V group compound semiconductor on a Si substrate, a V groove is formed on the surface of the Si substrate, The longitudinal direction of the V groove and the tilt direction from the (100) plane of the Si substrate are aligned. Furthermore, in order to achieve the above-mentioned other purposes,
The conditions for epitaxially growing the III-V group compound semiconductor on the Si substrate having the V groove are set so that the growth temperature is 500.
The incident flux ratio of the group V element to the group III element was set to 15 ° C. or lower.

[0011]

By forming the V groove on the surface of the photoelectric conversion element, reflection of incident light can be suppressed. In addition, the surface of the Si substrate is tilted from the (100) plane in the [011] or [01-1] direction by 2 to 5 degrees, and a V groove having a longitudinal direction in the same direction as the tilt direction is formed. It is possible to suppress the occurrence of antiphase boundaries in the GaAs layer grown on the substrate. This will be described with reference to FIGS.

When the Si substrate is tilted by 2 to 5 degrees from the (100) plane in the [011] or [011] direction, the Japanese Journal of Applied Physics Vol. 26 (1987), pages L114 to L116. Page (Japanes Journal of Appl
ied Physics 26 (1987) pp. L1
14-L116), one atomic step on the surface changes into an atomic step of two atomic layer height (hereinafter abbreviated as two atomic step) by heating at 1000 ° C. or higher in ultrahigh vacuum. . Due to this effect, at least (1
The occurrence of antiphase boundaries on the (00) plane can be suppressed. Next, as shown in FIG. 5, consider a case where V-grooves are formed in parallel on the Si (100) substrate in the [011] direction. At this time, when the tilt direction of the substrate is the [01-1] direction, that is, when the atomic step row and the longitudinal direction of the V groove are parallel (FIG. 5A), the tilt direction of the substrate is the [011] direction,
That is, there are two types in the case where the atomic step sequence and the longitudinal direction of the V groove are perpendicular (FIG. 5B). When the Si substrate having such V-grooves is heated in an ultrahigh vacuum at 1000 ° C. for about 10 minutes, a diatomic step structure appears on the surface as shown in FIG. However, illustration of the rearrangement structure of atoms on the surface is omitted. FIG. 6A shows the case of FIG. 5A, and FIG. 6B shows the case of FIG. 5B. In the case of FIG. 6B, the two atomic steps are arranged parallel to the paper surface. The case where GaAs is grown on the Si substrate in such a state will be considered below.

FIG. 7 is a cross-sectional structural view in the case where GaAs is grown by one molecular layer on the Si substrate on which two atomic steps are formed by the molecular beam epitaxy method. Substrate temperature 50
When As is irradiated at 0 ° C. or higher, As forms bonds with Si atoms on the surface, and excess As atoms are re-evaporated. When Ga of one atomic layer is supplied in the state of being irradiated with As flux, one GaAs molecular layer is grown. In the figure Si
Although illustration of atomic steps existing on the {111} plane is omitted, they are all two atomic steps.
The occurrence of an antiphase boundary on the 1} plane does not pose a problem. We consider the conventional Si (100) plane and Si {11] by considering the tilt direction of the Si (100) substrate.
It was newly found that the anti-phase boundary existing near the boundary with the 1} plane can be eliminated. 7A shows the case where the Si substrate is tilted in the [01-1] direction, and FIG. 7B is the case where the Si substrate is tilted in the [011] direction. In FIG. 7A, Si (100)
It was found that the antiphase boundary 107 is generated near the interface between the surface 101 and the Si {111} surface 103, but the antiphase boundary is not generated in FIG. 7B. On the other hand, V
If the groove is formed in the [01-1] direction, Si
When the (100) substrate is tilted in the [011] direction, an antiphase boundary is generated, but the Si (100) substrate is [01
It was found that the anti-phase boundary does not occur if tilted in the −1] direction.

From the above, by forming the V-groove on the surface of the Si substrate and making the longitudinal direction of the V-groove coincide with the inclination direction from the (100) plane of the Si substrate, reflection of incident light is reduced and Since recombination of carriers at the phase boundary can be suppressed, a highly efficient tandem hetero photoelectric conversion element can be manufactured.

On the other hand, III-
As a result of examining the conditions for epitaxially growing a group V compound semiconductor, if the growth temperature is 500 ° C. or lower and the incident flux ratio of the group V element to the group III element is 15 or more, the surface of the group III element on the growth surface It was found that the diffusion distance was reduced and the flattening phenomenon of the V groove could be suppressed. Therefore, by epitaxially growing the III-V group compound semiconductor on the Si substrate under the above conditions, the Si
The shape of the V groove formed on the substrate can be maintained up to the III-V group compound semiconductor surface.

[0016]

EXAMPLES Example 1 Hereinafter, a first structure of a tandem hetero photoelectric conversion device according to the present invention and a manufacturing method thereof will be described with reference to FIG.

FIG. 1 is a vertical sectional structural view showing a method for manufacturing a photoelectric conversion element, in which the direction perpendicular to the plane of the drawing is [011]. First, as shown in FIG. 1A, an n-type Si (100) substrate (thickness: 300 μm, resistivity: 2 Ω · cm, inclined at 3 degrees in the [011] direction) 121 was set in an atmosphere of 100% oxygen to 900
Heated to ℃, 100nm thick SiO on the front and back
_{2 The} film 122 is formed. The SiO ₂ film on the back surface is removed by hydrofluoric acid, and an n-type impurity diffusion region (P (phosphorus) concentration:
0.5-1 × 10 ²⁰ / cm ³ , thickness 200 nm) 123
To make.

Then, as shown in FIG. 1B, SiO 2 is formed on the back surface.
₂ After depositing the film 122, a width of 10 μm in the [01-1] direction was obtained by photolithography and etching.
A SiO ₂ film having a length of 10 mm in the [011] direction is provided with an interval 36.
It was left at 0 μm, and Si was etched with a KOH solution or a hydrazine solution using it as a mask. At this time, Si was etched up to a vertical depth of 240 μm, but the etching proceeded anisotropically to form a V groove.
1} surface 103 appeared.

After that, the SiO ₂ film on the surface was removed, and
As shown in (c), a p-type diffusion region (B concentration: 0.5-
1 × 10 ²⁰ / cm ³ , thickness 200 nm) 124 is formed, and the SiO ₂ film on the back surface is removed.

Then, the sample was put in a molecular beam epitaxy apparatus to remove the natural oxide film on the surface, and after irradiating with As flux at 580 ° C., the growth temperature was 500 ° C., the incident As / Ga flux ratio was 15, and the growth rate was 1 μm. / H,
As shown in FIG. 2A, the highly-doped p-type GaAs layer (B
e concentration: 1 × 10 ²⁰ / cm ³ , film thickness 10 nm) 125,
Highly doped n-type GaAs layer (Si concentration: 1 × 10 ¹⁹ / cm
³ , film thickness 10 nm) 126, n-type GaAs layer (Si concentration: 5 × 10 ¹⁶ / cm ³ , film thickness 3 μm) 127, p-type G
aAs layer (Be concentration: 1 × 10 ¹⁹ / cm ³ , film thickness 10 n
m) 128 four layers were sequentially grown. Here, the layers 125 and 126 form a tunnel junction diode that connects the GaAs photoelectric conversion element and the Si photoelectric conversion element.

Finally, the sample was taken out from the molecular beam epitaxy apparatus, and as shown in FIG. 2B, an n-type ohmic electrode 129 was formed on the back surface and a p-type ohmic electrode 130 was formed on the front surface.
To form a GaAs / Si tandem hetero photoelectric conversion element.

According to this embodiment, on the surface side of the tandem hetero photoelectric conversion element, the antiphase boundary is not generated.
Since the V-shaped groove can be formed, the reflection of incident light can be reduced without reducing the life of carriers, so that the efficiency of the photoelectric conversion element can be increased.

In this embodiment, the Si (100) substrate tilted in the [011] direction was used, but even if the Si (100) substrate tilted in the [01-1] direction is used, the longitudinal direction of the V-groove may be changed. The same effect can be obtained by setting the [01-1] direction. Further, in this embodiment, the inclination angle from the (100) plane of the substrate is 3 degrees, but the same effect can be obtained if it is about 2-5 degrees. Further, in the present embodiment, the growth temperature during GaAs growth was 500 ° C. and the incident As / Ga flux ratio was 15, but the growth temperature may be lower and the flux ratio may be higher. Further, in this embodiment, GaAs is shown as an example of the III-V compound semiconductor, but AlGaAs
Of course, other compound semiconductors and mixed crystals thereof may be used, and the epitaxial growth method thereof may be a metal-organic vapor phase epitaxy method, a liquid phase epitaxy method, or the like in addition to the molecular beam epitaxy method. Of course.

[Embodiment 2] A second structure of a tandem hetero photoelectric conversion device according to an embodiment of the present invention and a method for manufacturing the same will be described below with reference to FIGS. 3 and 4.

FIG. 3 is a vertical sectional structural view showing a method for manufacturing a photoelectric conversion element, in which the direction perpendicular to the plane of the drawing is [011]. First, as shown in FIG. 3A, an n-type Si (100) substrate (thickness: 300 μm, resistivity: 2 Ω · cm, inclined at 3 degrees in the [011] direction) 121 was set to 900 in an atmosphere of 100% oxygen.
Heated to ℃, 100nm thick SiO on the front and back
_{2 The} film 122 is formed. Subsequently, by photolithography and etching, the width in the [01-1] direction is 10 μm.
m, [011] direction 10 mm long SiO ₂ film 36
Si was etched with a KOH solution or a hydrazine solution, using the mask as a mask and leaving it at 0 μm intervals. At this time, Si was etched to a vertical depth of 240 μm, but the etching proceeded anisotropically, and Si {111} plane 1
03 appeared. After that, the SiO ₂ film on the surface is removed and p
A mold diffusion region (B concentration: 0.5-1 × 10 ²⁰ / cm ³ , thickness 200 nm) 124 was formed, and the SiO ₂ film on the back surface was removed. Then, the sample is put into a molecular beam epitaxy apparatus to remove the natural oxide film on the surface, and then irradiated with As flux at 580 ° C.
With a s / Ga flux ratio of 15 and a growth rate of 1 μm / h, as shown in FIG. 3C, a highly doped p-type GaAs layer (Be
Concentration: 1 × 10 ²⁰ / cm ³ , film thickness 10 nm) 125, highly doped n-type GaAs layer (Si concentration: 1 × 10 ¹⁹ / c)
m ³ , thickness 10 nm) 126, n-type GaAs layer (Si concentration: 5 × 10 ¹⁶ / cm ³ , thickness 3 μm) 127, p-type G
aAs layer (Be concentration: 1 × 10 ¹⁹ / cm ³ , film thickness 10 n
m) 128 four layers were sequentially grown. Here, the layers 125 and 126 form a tunnel junction diode that connects the GaAs photoelectric conversion element and the Si photoelectric conversion element.

The sample was taken out from the molecular beam epitaxy apparatus, and a SiO ₂ film was deposited on the front and back surfaces, as shown in FIG.
As shown in FIG. 3, by photolithography and etching, Si having a width of 10 μm in the [01-1] direction and a length of 10 mm in the [011] direction was formed in accordance with the V groove pattern on the surface side.
With the O ₂ film left, using it as a mask, anisotropic etching of Si was performed to a vertical depth of 240 μm with a KOH solution or a hydrazine solution, and Si {111} planes 103 were exposed. After that, the SiO ₂ film on the back surface is removed, and the n-type diffusion region (P (phosphorus) concentration: 0.5-1 × 10 ²⁰ / cm ³ ,
(Thickness: 200 nm) 123 was formed, and the SiO ₂ film on the surface was removed.

An n-type ohmic electrode 129 is formed on the back surface and a p-type ohmic electrode 130 is formed on the front surface to form GaAs / S.
The i-tandem hetero photoelectric conversion element was used (FIG. 4B).

According to this embodiment, the V groove can be formed on the front surface side and the back surface side of the tandem hetero photoelectric conversion element without the occurrence of the anti-phase boundary, so that the life of the carrier is not reduced and Since the reflection of incident light on the front surface and the light emitted from the back surface can be reduced, the efficiency of the photoelectric conversion element can be increased.

In this embodiment, the Si (100) substrate tilted in the [011] direction was used, but even if the Si (100) substrate tilted in the [01-1] direction is used, the longitudinal direction of the V-groove may be changed. The same effect can be obtained by setting the [01-1] direction. In this embodiment, the inclination angle from the (100) plane of the substrate is 3 degrees, but the same effect can be obtained if the inclination angle is about 2-5 degrees. Further, in the present embodiment, the growth temperature during GaAs growth was 500 ° C. and the incident As / Ga flux ratio was 15, but the growth temperature may be lower and the flux ratio may be higher. Further, in the present embodiment, GaAs is shown as an example of the III-V group compound semiconductor, but other compound semiconductors such as AlGaAs and mixed crystals thereof may be used, and the epitaxial growth method may be molecular beam epitaxy. In addition to the method, it goes without saying that a metal organic vapor phase growth method, a liquid phase epitaxy method or the like may be used.

[0030]

According to the present invention, a V groove is formed on the surface of a Si substrate, and the longitudinal direction of the V groove and the inclination direction from the (100) plane of the Si substrate are [011] or [01-1]. Either way, the growth temperature of the III-V group compound semiconductor is 500 ° C.
By performing the following under the condition that the incident flux ratio of the group V element to the group III element is 15 or more, the flattening of the V groove is suppressed, the reflection of incident light is reduced, and the recombination of carriers at the antiphase boundary is performed. Therefore, a highly efficient tandem hetero photoelectric conversion device can be manufactured.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a manufacturing process of a tandem hetero photoelectric conversion element according to Embodiment 1 of the present invention.

FIG. 2 is a cross-sectional view showing the manufacturing process of the tandem hetero photoelectric conversion element according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view showing a manufacturing process of a tandem hetero photoelectric conversion element according to Embodiment 2 of the present invention.

FIG. 4 is a cross-sectional view showing a manufacturing process of a tandem hetero photoelectric conversion element according to Embodiment 2 of the present invention.

FIG. 5 is a schematic diagram showing the relationship between the direction of the atomic step sequence on the Si (100) surface and the V groove direction.

FIG. 6 shows Si (10) after high temperature annealing in ultra-high vacuum.
0) It is a vertical cross-sectional structural diagram of a substrate.

FIG. 7 is a vertical cross-sectional structural view after growing one molecular layer of GaAs on a Si (100) substrate.

FIG. 8 is a vertical cross-sectional structural diagram at the time of forming a V groove on a Si (100) just substrate formed using a conventional technique.

FIG. 9 is a vertical cross-sectional structure diagram when one molecular layer of GaAs is grown on a Si (100) just substrate in which a V groove is formed.

[Explanation of symbols]

101 ... Si (100) plane, 102 ... Si2 atomic layer atomic step, 103 ... Si {111} plane, 104 ... GaAs (10
0) plane, 105 ... GaAs atomic step, 106 ... GaAs {1
11} A-plane, 107 ... Anti-phase boundary, 121 ... n-type Si (10
0) substrate, 122 ... SiO ₂ film, 123 ... N type impurity diffusion region, 124 ... P type impurity diffusion region, 125 ... Highly doped p type G
aAs layer, 126 ... Highly doped n-type GaAs layer, 127 ... n-type GaA
s layer, 128 ... p-type GaAs layer, 129 ... n-type ohmic electrode, 130 ... p-type ohmic electrode.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Yoko Uchida 1-280 Higashi Koikekubo, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Inventor Mitsunori Warako 1-280 Higashi Koikeku, Kokubunji, Tokyo Hitachi Ltd. (56) Reference JP-A-62-237768 (JP, A) JP-A-59-124772 (JP, A) JP-A-61-255074 (JP, A) JP-A-58-180071 (JP) , A) Actual development Sho 62-163974 (JP, U)

Claims (1)

[Claims] 1. [011] or [0] from the (100) plane
1-1] S having a surface inclined in the direction of 2 to 5 degrees
After forming a V-shaped groove having a longitudinal direction in the same direction as the inclination direction from the (100) plane of the Si substrate on the i substrate, the Si substrate is formed.
Formation of pn junction on substrate and III- on the Si substrate
Perform epitaxial growth of a V group compound semiconductor, and the top
Note that epitaxial growth of III-V group compound semiconductors is
Long temperature is 500 ℃ or less, and V group to III group element
A method for manufacturing a tandem hetero photoelectric conversion element, which is performed under a condition that an incident flux ratio of elements is 15 or more .