JPH0792522A - Battery check device for camera - Google Patents

Abstract

PURPOSE:To precisely check a battery by actuating a load resistance, turning off a boosting circuit and turning off the load resistance during the time when the boosting circuit is actuated, when the battery of the camera incorporating the boosting circuit is checked. CONSTITUTION:The R101 is the load resistance when the battery is checked and it is switched by a transistor TR102 based on an output PNPB from an interface IC16. Besides, the boosting circuit is constituted of an inductor L103, a diode D104, a transistor TR105 and a capacitor C106 and controlled based on an output DCCLK from the IFIC16. Then, the backup of the power source VCC of the IFIC16 and a CPU 10 is executed by the boosting circuit. By the CPU 10, the battery is checked based on a voltage for checking a battery BCOUT outputted from the IFIC 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improved battery check device for a camera, and more particularly to a battery check device capable of performing an accurate battery check in a camera having a built-in booster circuit for stabilizing a power supply voltage. It relates to the device.

[0002]

2. Description of the Related Art Conventionally, a battery check device for a camera having a built-in booster circuit for stabilizing the power supply voltage is synchronized with a power switch as disclosed in, for example, Japanese Patent Publication No. 63-23750. To start the boost operation, and after a predetermined time, that is, after the output of the boost circuit has stabilized, the battery check is performed.

[0003]

However, in the battery check in which the booster circuit is in an operating state after the boosting operation is stabilized as in the conventional case, there is a problem that an accurate battery check cannot be performed due to the load of the booster circuit. Had.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a battery check device capable of performing an accurate battery check in a camera incorporating a booster circuit.

[0005]

SUMMARY OF THE INVENTION A battery check device for a camera according to the present invention comprises a power supply voltage detecting means for detecting the power supply voltage of the camera, a booster circuit for stabilizing the power supply voltage of a camera control circuit, and a battery The load means is activated at the time of checking, and the load means is operated and the operation of the booster circuit is stopped during the operation of the power supply voltage detecting means. Further, the operation of the load means is stopped while the booster circuit is operating.

[0006]

According to the present invention, the power supply voltage detecting means for detecting the power supply voltage of the camera, the boosting circuit for stabilizing the power supply voltage of the control circuit of the camera, and the load means activated at the time of checking the battery are provided. When the power supply voltage detecting means operates, the load means is activated and the operation of the booster circuit is stopped. The operation of the load means is stopped while the booster circuit is operating.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram showing an electric circuit when the battery checking device according to the present invention is applied to a camera. In the figure, the CPU 10 has its internal RO
The programs stored in M are sequentially executed to control peripheral ICs and the like. In this CPU 10,
Autofocus IC (hereinafter abbreviated as AFIC) 1
1, EEPROM 12, liquid crystal display panel 13, data bag 14, strobe unit 15, interface I
C (hereinafter abbreviated as IFIC) 16, motor driver I
C22 and C23 and various switches described later are connected.

The AFIC 11 is an IC for autofocus, and the camera of the embodiment employs a TTL phase difference detection method for autofocus. The subject light is
The light passes through the taking lens 17, the AF optical system 20 including the condenser lens 18 and the separator lenses 19L and 19R, and reaches the photosensor arrays 21L and 21R arranged on the upper surface of the AFIC 11. Then, AFIC11
Inside, processing such as light quantity integration and quantization is performed.
This distance measurement information is transferred from the AFIC 11 to the CPU 10.

By the way, if the characteristics of the respective elements of the photosensor array vary, accurate distance measurement information cannot be obtained as it is. Therefore, the variation information of the photosensor array is stored in advance in the EEPROM 12, which is a non-volatile storage element, and the CPU 10 performs the correction calculation of the distance measurement information obtained from the AFIC 11. In addition, the EEPROM 12 stores various adjustment values such as mechanical variations and variations in electrical characteristics of various elements. These adjustment values are C
It is sent to the PU 10 and various calculations are performed. Incidentally, CPU1
Data is exchanged among the 0, the AFIC 11, and the EEPROM 12 by serial communication.

The liquid crystal display panel 13 displays the number of film frames, the photographing mode, the strobe mode, the aperture value, the remaining battery level, etc. in response to the signal sent from the CPU 10. In addition, the data bag 14 is controlled by the control signal from the CPU 10.
It is for imprinting the date on the film.
The light intensity of the projection lamp changes stepwise depending on the ISO sensitivity of the film. Furthermore, the strobe unit 15 is
This is for giving a required brightness to the subject by causing the arc tube to emit light when the brightness of the subject is insufficient during shooting or AF distance measurement.
It is controlled by C16.

The IFIC 16 performs 4-bit parallel communication with the CPU 10 to measure the subject brightness, the temperature inside the camera, the waveform shaping of the output signal of the photo interrupter, the constant voltage drive control of the motor, the temperature stability and temperature. Generation of various constant voltage such as proportional voltage, battery residual quantity check,
Reception of infrared remote control, motor driver ICs 22 and 23
Control, various light emitting diodes (hereinafter abbreviated as LEDs)
24, control of the power supply voltage VE, control of the booster circuit, etc. are performed.

In the battery check, a low resistance is connected to both ends of the battery, the operation of the booster circuit is stopped, and the voltage across the battery when a current is passed is divided inside the IFIC 16 and output to the CPU 10. The CPU 10 performs A / D conversion to obtain a value to check. In addition,
This battery check will be described later in detail.

The IFIC1 monitors the low voltage of the power supply voltage VE.
When the power supply voltage VE input to the dedicated terminal provided in No. 6 falls below a specified value, the IFIC16
Outputs a reset signal to the CPU 10. This prevents runaway of the CPU 10 and the like. The control of the booster circuit is to operate the booster circuit when the power supply voltage VE drops below a predetermined value.

Further, the IFIC 16 is provided with a two-divided silicon photodiode (hereinafter referred to as SPD) for photometric measurement of subject brightness.
25) is connected. The light receiving surface of the SPD 25 has a central part on both sides and a peripheral part.
It is divided into two parts, that is, spot metering, which measures light only at the center of both sides, and average metering, which measures using the entire screen. From the SPD 25, a current according to the subject brightness is output to the IFIC 16. Then, the IFIC 16 converts the output from the SPD 25 into a voltage, and the CPU 1
Transfer to 0.

The CPU 10 performs exposure calculation, light-shielding judgment, etc. based on the converted voltage information. The internal temperature of the camera is measured by the circuit built in the IFIC16.
A voltage proportional to absolute temperature is output, and that signal is output to the CPU.
It is obtained by performing A / D conversion at 10. The obtained temperature measurement value is used for correction of mechanical members and electric signals whose state changes with temperature, and the like.

The IFIC 16 also has an SP for receiving light.
D26 is connected. The SPD 26 is for receiving an infrared remote controller, and is a remote controller transmission unit 2
The infrared light modulated and emitted from the LED 7 for projecting light 7 is received. The output of the SPD 26 is subjected to processing such as waveform shaping inside the IFIC 16 and transferred to the CPU 10.

Further, the AFIC 16 finishes the AF distance measurement,
An LED for displaying in the finder for a flash emission warning or an LED used for a photo interrupter or the like is connected. On / off of these LEDs and control of the amount of emitted light are controlled by the CPU 10, the EEPROM 12, and the IFI.
Communication is performed between the C16s, and the IFIC16 directly performs the communication. In addition, various motors are I
Constant voltage control is performed by the FIC 16.

The motor driver IC 22 includes a shutter charge (hereinafter abbreviated as SC) motor 29 for film feeding and shutter charging, a lens driving (hereinafter abbreviated as LD) motor 30 for focus adjustment, and a lens frame. 3 of the motor 31 for zooming (hereinafter abbreviated as ZM)
It drives one motor, booster circuit, and LED for self-timer operation display. The IFIC 16 receives a signal from the CPU 10 and controls the motor driver IC 22 to control these operations, for example, which device is to be driven, whether the motor is rotating normally or reversely, or whether control is performed. Done.

Whether the SC motor 29 is in the shutter charge, film winding, or film rewinding state is detected by a shutter charge photo interrupter (hereinafter abbreviated as SCPI) 32 using a photo interrupter and a clutch lever. The information is output to the CPU 10.

The amount of extension of the taking lens 17 is detected by a lens driving photo interrupter (hereinafter abbreviated as LDPI) 33 attached to the LD motor 30. Then, the output is subjected to waveform shaping by the IFIC 16 and then sent to the CPU 10.

The zoom-out amount of the lens frame is determined by the zooming photo interrupter (hereinafter abbreviated as ZMPI).
34 and a zooming photo reflector (hereinafter abbreviated as ZMPR) 35. When the lens frame is between the tele end and the wide end, the ZMPR 35 is configured to detect the reflection of a silver seal (not shown) attached to the lens frame. The output of the ZMPR 35 is input to the CPU 10 and the tele end and the wide end are detected. -ZMP
I34 is attached to the ZM motor 31 and its output is I
After the waveform is shaped by the FIC 16, it is input to the CPU 10 and the amount of zooming from the tele end or the wide end is detected.

The motor driver IC 23 is a stepping motor for driving the diaphragm adjusting unit, and drives the AV motor 36 by a control signal from the CPU 10. Also,
The output of the AVPI 37 is input to the CPU 10 after being waveform-shaped by the IFIC 16.

The motor driver IC 23 is a stepping motor for driving the aperture adjusting unit, and drives the AV motor 36 by a control signal from the CPU 10. Also,
The output of the AVPI 37 is waveform-shaped by the IFIC 16 and then input to the CPU 10 to detect the aperture open position.

The waveform shaping of the photo interrupter, etc.
The photocurrent of the output of the photo interrupter or the photo reflector is compared with the reference current, and the IFIC1
Output from 6. At this time, noise is removed by giving a hysteresis to the reference current. Furthermore,
The IFIC 16 can change the reference current and the hysteresis characteristic by communicating with the CPU 10. CP
Various switches coupled to U10 are provided to perform the following operations.

The first release switch R1SW is
When the release button is half pressed, it is turned on and the distance measurement operation is performed. In addition, the second release switch R2S
W is turned on when the release button is fully pressed, and the photographing operation is performed based on various measured values.

The zoom-up switch ZUSW and the zoom-down switch ZDSW are switches for zooming the lens frame. When the zoom up switch ZUSW is turned on, it moves in the long focus direction and the zoom down switch ZDSW
When is turned on, zooming is performed in the short focus direction.

When the self switch SELFSW is turned on, the self timer photographing mode or the standby state of the remote controller is set. In this state, if the second release switch R2SW is turned on, shooting is performed by the remote controller.

When the spot switch SPOTSW is turned on, the spot metering mode is set in which the metering is performed only at the center of the photographing screen (this is metering by the AF sensor). In the normal photometry with the spot switch SPOTSW off, evaluation photometry is performed by the 2-split SPD 25.

Picture switches PCT1SW to PCT4
The SW and the program switch PSW are switches for switching the program photographing mode, and the photographer selects the mode according to the photographing conditions.

When the picture switch PCT1SW is turned on, a portrait mode is set, and the aperture and shutter speed are determined so that the depth of field becomes shallow within the proper exposure range. When the picture switch PCT2SW is turned on, the night view mode is set, and the value is set to a step below the value of the proper exposure during normal shooting. Picture switch PCT3S
When W is turned on, a landscape mode is set, and the aperture and shutter speed values are determined so that the depth of field is as deep as possible within the proper exposure range. Picture switch PCT4S
When W is turned on, the macro mode is set. This mode
Used for close-up photography.

The above picture switches PCT1SW to PT
Two or more CT4SWs cannot be selected at the same time. The program switch PSW is a switch for a normal program shooting mode. By pushing the program switch PSW, the picture switches PCT1SW to PCT4SW are reset and the AV priority program mode described later is reset.

When the AV priority switch AVSW is turned on,
The shooting mode becomes the AV priority program mode. In this mode, the photographer determines the AV value, and the shutter speed is determined by a program according to the AV value. In this mode, the picture switches PCT2SW and PCT
The 4SW does not have the above-mentioned function and serves as an AV value setting switch. That is, the picture switch PCT2SW
Is a switch for increasing the AV value, and the picture switch P
CT4SW is a switch that reduces the AV value. The strobe switch STSW is a switch for changing the strobe emission mode. That is, the normal automatic light emission mode (AUTO), the red-eye reduction automatic light emission mode (AUTO-
S), forced light emission mode (FILL-IN), and strobe off mode.

The panorama switch PANSW is a switch for detecting whether the shooting state is panoramic shooting or normal shooting, and is turned on during panoramic shooting. When the shooting mode is panoramic shooting, correction calculation for photometry is performed.
This is because the upper and lower parts of the photographic screen are masked during panoramic shooting, and the negative part of the photometric sensor is also masked accordingly, so that accurate photometry cannot be performed.

The back cover switch BKSW is a switch for detecting the state of the back cover of the camera, and is in the off state when the back cover is closed. When the state of the back cover switch BKSW changes from on to off, it means that the film loading has started.

The power switch PWSW is a switch for turning on and off the power source, and the shutter charge switch SCSW is a switch for detecting shutter charge. Mirror up switch MUSW
Is a switch for detecting the mirror up, and is turned on when the mirror is up. Furthermore, DX switch DXSW
Is a switch for reading the DX code indicating the film sensitivity printed on the film cartridge, and for detecting the presence / absence of film loading, and is composed of five switch groups (not shown).

FIG. 1 is a block diagram showing the configuration of a power supply system when the battery checking device according to the present invention is applied to a camera. The power source of this power source system is a battery B107, and the plus (+) side is the power source voltage VE and the minus (-) side.
The side is GND. A resistor R101 and a transistor TR102 are connected in series at both ends of the power supply voltage VE, and the resistor R101 and the transistor TR102 are connected.
The PNPE signal end of the IFIC16 is connected to the midpoint of the connection, and the IFIC1 is connected to the base of the TR102.
6 PNPB signal ends are connected. Further, an inductor L103 and a diode D1 are provided at both ends of the power supply voltage VE.
04 through a capacitor C106, IFIC
16. The CPU 10 is connected in parallel. Further, the midpoint of connection between the inductor L103 and the diode D104 is connected to GND through the transistor TR105, and the base of the transistor TR105 has an IF
The DCCLK signal end of the IC 16 is connected. In addition, among the above-mentioned components, the inductor L103 and the diode D10
4, the transistor TR105 and the capacitor C106 form a chopper type booster circuit.

In the circuit thus constructed, R1
01 is the load resistance at the time of battery check, and IFI
Transistor TR10 by output PNPB from C16
2 is switched. Further, the booster circuit is
It operates by the rectangular wave output DCCLK from IC16.
The power supply VCC of the FIC 16 and the CPU 10 is backed up. Further, the CPU 10 causes the battery check voltage BCOUT (hereinafter BCOUT) output from the IFIC 16.
Check the battery). Here, the COM output from the CPU 10 is IFIC1.
6 is a signal for controlling 6. Further, VAD output from the IFIC 16 is a reference voltage when A / D converting BCOUT, and RST is a reset signal to the CPU 10.

FIG. 3 shows a circuit which is built in the IFIC 16 and drives a load at the time of checking the battery. As shown in FIG. 3, the PNPE signal end is connected to the negative input end of the operational amplifier OP202. The power supply voltage across the resistor R201 and the constant current source I _a of VE are connected in series, the resistor R201 and the constant current source I _a
The midpoint of the connection is connected to the positive input terminal of the operational amplifier OP202. The output terminal of the operational amplifier OP202 is connected to the PNPB signal terminal.

In the circuit thus constructed, the current I _DMY flowing through the load resistor R101 becomes a constant current regardless of the voltage of the power supply voltage VE as shown in the equation (1). I _DMY = (R201 × I _a ) / R101 (1) FIG. 4 shows a circuit for outputting a step-up rectangular wave built in the interface IC 16. Figure 4
As shown in, a resistor R304 and a resistor R305 are connected in series at both ends of the power supply VCC, and the midpoint of connection between the resistor R304 and the resistor R305 is the comparator OP30.
3 is connected to the negative input terminal. Further, the comparator O
The reference voltage VREF306 terminal is connected to the positive input terminal of P303. Further, the output terminals of the oscillator circuit 302 and the comparator OP303 are connected to the input terminals of a NAND gate (hereinafter abbreviated as NAND) 301, respectively. The output terminal of the NAND 301 is connected to the DCCLK signal terminal.

In the circuit thus constructed, the oscillation circuit 302 is controlled to operate and stop by the communication data of the CPU 10, and a rectangular wave having a predetermined frequency and duty is output to the NAND 301. Further, the comparator 303 detects a decrease in the power supply VCC and outputs a high active output to the NAND 301. Therefore, DC
The CLK output is output under the condition of the expression (2).

VREF306> {R305 / (R304 + R305)} × VCC (2) FIG. 5 shows a circuit for outputting the battery check voltage BCOUT built in the interface IC 16. As shown in FIG. 5, a resistor R401 and a resistor R402 are connected in series at both ends of the power supply voltage VE, and a connection midpoint of the resistor R401 and the resistor R402 is connected to a positive input end of a voltage follower OP403. . The negative input end of the voltage follower OP403 is connected to the output end of the voltage follower OP403.

In the circuit thus constructed, BCOUT outputs the power supply voltage VE to the resistors R401 and R401.
After the voltage is divided by 402, the voltage is output to the CPU 10 through the voltage follower OP403. The CPU 10 performs A / D conversion on the output voltage of BCOUT with reference to the constant voltage VAD output from the interface IC. A battery warning or the like is given according to the result of A / D conversion.

FIG. 6 shows a low voltage monitoring circuit built in the interface IC 16. As shown in FIG. 6, the power supply VCC terminal is connected to the positive input terminal of the comparator OP502, and the reference voltage VREF501 terminal is connected to the negative input terminal of the comparator OP502.
The output terminal of the comparator OP502 is connected to the RST signal terminal.

In the circuit thus constructed, the output of the comparator OP502 is inverted when the voltage value of the power supply VCC becomes less than the voltage value of the reference voltage VREF501. The output RST of the comparator OP502 is the CPU
This is a reset output to 10, and the operation of the CPU 10 is initialized. The voltage value of the reference voltage VREF501 is
It is set to the minimum operating voltage value of the CPU 10. That is, when the power supply VCC drops below the minimum operating voltage value of the CPU 10, the operation of the CPU 10 is initialized.

FIG. 7 is a diagram for explaining the sequence flow of the CPU 10 when the battery check is performed according to the first embodiment of the present invention. The battery check is performed by the CPU before mechanical drive (eg, auto load, rewind, continuous shutter release sequence, zoom drive, etc.).
Done on 10 main sequences to ensure that the power supply has it until the mechanical operation ends normally. If there is a risk that the mechanical operation cannot be guaranteed to the end as a result of the battery check, the mechanical operation is not executed, the release operation is locked, various operation buttons are not accepted, The user is informed by displaying on the display panel 13 or the like.

The flow of the battery check process performed by the CPU 10 will be described below step by step according to the flowchart shown in FIG. The CPU 10 has an interface I
It communicates with C16 and causes the interface IC 16 to output DCCLK when the voltage of the power supply VCC is equal to or lower than a predetermined value to operate the booster circuit <step S1>.

The CPU 10 communicates with the EEPROM 12 and reads the battery check warning voltage data and the lock voltage data stored in advance into the RAM inside the CPU 10 <step S2>.

Since the power supply voltage VE drops during the battery check and the correct battery check cannot be performed if there is another load, unnecessary peripheral ICs and circuits (for example, the EEPROM 1) are checked during the battery check.
2, AFIC 11, data back 14, strobe unit 15, etc.) are turned off <step S3>.

After the booster circuit is turned on in step S1, a stable time (for example, about 1 msec) is waited until the power supply voltage VE is boosted <step S4>. BC which is a signal obtained by dividing the power supply voltage VE into the interface IC 16.
The output of the OUT signal is instructed <step S5>.

Considering that the power supply voltage VE drops during the battery check, the machine cycle of the CPU 10 is reduced to 1/4 in advance to prevent malfunction even if the power supply VCC applied to the CPU 10 drops <step S6>. .

A PNPB signal is output from the interface IC 16, the transistor TR102 connected to the dummy resistor R101 is turned on, and a current is passed through the dummy resistor R101 <step S7>.

The booster circuit is turned off to eliminate the load on the power supply voltage VE of the booster circuit <step S8>. When the dummy resistor R101 is turned on and the booster circuit is turned off, the power supply voltage V
Wait for a time until E becomes stable (for example, about 4 msec) <step S9>.

The BCOUT signal output from the interface IC 16 is A / D converted by the CPU 10 to obtain binarized data of the power supply voltage VE. The A / D conversion is continuously performed four times, the average value thereof is obtained, and the obtained data is the power supply voltage measurement data <step S10>.

The PNPB signal output from the interface IC 16 is turned off, and the current flowing through the dummy resistor R101 is turned off <step S11>. Interface I
Instruct C16 to operate the booster circuit <step S12
>.

In order to increase the processing execution speed of the CPU 10, the machine cycle of the CPU 10 is quadrupled <step S13>. Turn on peripheral ICs and circuits (for example, EEPROM 12, AFIC 11, data back 14, strobe unit 15) necessary for camera operation <Step S
14>.

If the main condenser of the strobe (not shown, in the strobe unit 15) was being charged immediately before the battery check, the battery will be weak over time, so it will frequently fall below the battery warning level. It may end up. Therefore, in this case, the process branches to step S18 so that the battery warning level check is not performed. If the battery is not charged, go to step S16 <
Step S15>.

The power supply voltage measurement data obtained in step S10 is compared with the battery check warning voltage data read from the EEPROM 12 in step S2. If the power supply voltage measurement data is larger, the process branches to step S19 and returns. If the power supply voltage measurement data is smaller,
The process proceeds to step S17 <step S16>.

The battery check warning flag is set to "1" and a warning display is output to the liquid crystal display panel 13 when returning to the main routine <step S17>. The power supply voltage measurement data is compared with the battery check lock voltage data read from the EEPROM 12 in step S2. If the power supply voltage measurement data is larger, the process branches to step S19 and returns. On the contrary, if the power supply voltage measurement data is smaller, the process proceeds to step S20 <step S18>.

The battery check lock flag is set to "1"<stepS20>. The operation lock is displayed on the liquid crystal display panel 13 to indicate to the user that the camera has been locked by the battery check <step S2
1>.

When the operation lock is displayed for a fixed time within a predetermined time, the process proceeds to step S23. When the display reaches a predetermined time, the process branches to step S26 <step S22.
>. The operation lock display blinks <Step S23>,
A switch SW (for example, power-off processing, etc.) that is specifically received during the operation lock is detected <step S2
4>.

If the switch SW has been pressed, the process branches to step S30 to perform the power-on reset process of the main routine. If the switch SW has not been pressed, the process branches to step S22 to continue counting the time <step S25>.

Next, when the switch SW is not pressed and the operation lock display reaches a predetermined time, the booster circuit, the peripheral IC and the circuit are turned off <step S26>. When the display of the liquid crystal display panel 13 is turned off <step S27> and the CPU is set to the stop mode in step S29, the interrupt permission for rising from the stop mode is performed. For example, the interruption is a power switch PWSW, a switch BKSW that is turned ON / OFF by opening and closing the back cover, a rewind switch (not shown), etc. <step S28>.

The CPU 10 is put in the stop mode to reduce the current consumption of the entire system <step S29>. C
When the PU 10 gets up by an interrupt, the process branches to the power-on reset process of the main routine <step S
30>.

Next, a time chart for checking the battery will be described with reference to FIG. First, the booster circuit is turned on for a predetermined time to boost the power supply VCC. At this time, a current intermittently flows through R101, so that the power supply voltage VE intermittently drops (section A).

Next, after turning off the booster circuit, the base of TR 102 is turned on to start dummy loading. Then, immediately before turning off the dummy load, the CPU 10 performs A / D conversion (section B, section C). At this time, the power supply VCC is the CPU 10
And the current consumption of the interface IC 16 causes a gradual drop. During this time, since the booster circuit is stopped, the accurate power supply voltage VE can be fetched during A / D conversion. After that, the booster circuit is turned on again (section D).

FIG. 9 is a diagram for explaining the operation of the part particularly related to the battery check in the main flow of the camera using the present invention. When the power is turned on or the battery is inserted, the power-on reset is applied to the CPU 10, and the RAM and the like inside the CPU 10 are initialized <step S
71>, and turn on the booster circuit <step S72>.

Next, it is determined whether the power switch PWSW is on or off. If the power switch is off, the process branches to step 74, and if the power switch PWSW is on, the process branches to step 77 <step S73.
>.

When the power switch is off, the taking lens is housed <step S74>, the booster circuit is turned off <step S75>, and the CPU 10 is set to the low power consumption mode <
Step S76>.

When the power switch PWSW is turned on, it is determined whether or not the lens is at the photographing position. When the lens is not in the photographing position, the process proceeds to step S78, and when the lens is in the photographing position, the process branches to step S81 <step S77>.

The battery check process shown in FIG. 7 is performed <step S78>, the photographing lens is driven to the photographing possible position <step S79>, and strobe charging is performed <
Step S80>.

Next, it is determined whether or not the first release R1SW has changed from off to on. If the first release R1SW changes from off to on, the process proceeds to step S82. If the first release R1SW does not change from off to on, the process branches to step S73 <step S81>.

When the first release R1SW changes from off to on, distance measurement and focus adjustment are performed <step S82>, and photometry is performed <step S83>. Next, it is determined whether the second release R2SW is on or off. If it is on, proceed to step S85, and if it is off, step S8.
It branches to 9 <step S84>.

When the second release R2SW is on,
The battery check process shown in FIG. 7 is performed <step S85>, the exposure is performed <step S86>, the film frame is wound up <step S87>, and the flash charging is performed <step S88>.

When the second release R2SW is off,
It is determined whether the ON state of the first release R1SW has been released. If it is released, the process branches to step S88, and if not released, the process branches to step S84 <step S89>.

In the charging in steps S80 and S88, the first release R1SW is set during charging.
If is pressed, the charging is stopped and the charging subroutine is exited.

Next, a second embodiment of the present invention will be described.
FIG. 10 is a diagram illustrating a sequence flow of the CPU 10 when the battery check of the second embodiment is performed.
The points different from the first embodiment will be described below. VCC
If the current consumption is low, as shown in the first embodiment, it is not necessary to boost the power supply VCC in advance just before the battery check. This is because the operation of the CPU 10 and the interface IC 16 can be guaranteed by the charge of C106 during the battery check.

The flow of the battery check process performed by the CPU 10 will be described step by step according to the flowchart shown in FIG. The CPU 10 communicates with the EEPROM 12 so that the battery check warning voltage data and the lock voltage data stored in advance are stored in the R inside the CPU 10.
Read into AM <step S31>.

During the battery check, the power supply voltage VE is lowered, and if there is another load, the correct battery check cannot be performed.
Unnecessary peripheral ICs and circuits (eg, EEPROM1
2, AFIC 11, data back 14, strobe unit 15, etc.) are turned off <step S32>.

The interface 16 is instructed to output the BCOUT signal, which is a signal obtained by dividing the power supply voltage VE.
Step S33>. Power supply voltage V during battery check
Considering that E decreases, the machine cycle of the CPU 10 is reduced to 1/4 in advance, and the power supply VC applied to the CPU 10 is reduced.
Prevent malfunction even if C goes down <Step S34
>.

A PNPB signal is output from the interface IC 16, the transistor TR102 connected to the dummy resistor R101 is turned on, and a current is passed through the dummy resistor R101 <step S35>.

Wait for a time (for example, about 4 msec) from when the dummy resistor R101 is turned on until the power supply voltage VE becomes stable.
Step S36>. The BCOUT signal output from the interface IC 16 is A / D converted by the CPU 10 to obtain binarized data of the power supply voltage VE. The A / D conversion is continuously performed four times, and the average value thereof is obtained and used as the power supply voltage measurement data <step S37>.

The PNPB signal output from the interface IC 16 is turned off, and the current flowing through the dummy resistor R101 is turned off <step S38>. Interface I
Instruct C16 to operate the booster circuit <step S39
>.

In order to increase the processing execution speed of the CPU 10, the machine cycle of the CPU 10 is quadrupled <step S40>. Turn on peripheral ICs and circuits (for example, EEPROM 12, AFIC 11, data back 14, strobe unit 15) necessary for camera operation <Step S
41>.

If the main condenser of the strobe (not shown, in the strobe unit 15) is being charged immediately before the battery check, the battery will be weak at time, so it will frequently fall below the battery warning level. It may end up. Therefore, in this case, the process branches to step S45 so that the battery warning level check is not performed. If the battery is not charged, the process proceeds to step S43 <
Step S42>.

The power supply voltage measurement data obtained in step S37 is compared with the battery check warning voltage data read from the EEPROM 12 in step S31. If the power supply voltage measurement data is larger, the process branches to step S46 and returns. If the power supply voltage measurement data is smaller, the process proceeds to step S44 <step S43>.

The battery check warning flag is set to "1" and a warning display is output to the liquid crystal display panel 13 when returning to the main routine <step S44>. Next, the power supply voltage measurement data and EEPRO in step S31.
Compare with the battery check lock voltage data read from M12, and if the power supply voltage measurement data is larger,
It branches to step S46 and returns. If the power supply voltage measurement data is smaller, the process proceeds to step S47 <
Step S45>.

The battery check lock flag is set to "1"<stepS47>. An operation lock is displayed on the liquid crystal display panel 13 to indicate to the user that the camera has been locked by the battery check <step S4
8>.

When the operation lock display is performed for a fixed time within the predetermined time, the process proceeds to step S51, and when the display reaches the predetermined time, the process branches to step S53 <step S49.
>. In step S49, when the operation lock display is performed for a fixed time within a predetermined time, the operation lock display is displayed in blinking <step S50>, and the switch SW (for example, power-off processing, etc.) specially accepted during the operation lock is displayed. Detection is performed <step S51>.

Next, if the switch SW has been pressed, the process branches to step S57 to perform the power-on reset process of the main routine. If the switch SW has not been pressed, the process branches to step S49 to continuously count the time <step S52>.

In step S49, when the operation lock display is performed for a predetermined time, the booster circuit, the peripheral IC and the circuit are turned off <step S53>. The display of the liquid crystal display panel 13 is turned off <S54>.

Next, when the CPU is set to the stop mode in step S56, the interruption permission for waking up from the stop mode is performed. For example, the interrupt is a power switch PWSW, a switch BKSW that is turned on / off by opening and closing the back cover, a rewind switch (not shown), etc.
Step S55>.

The CPU 10 is set to the stop mode to reduce the current consumption of the entire system <step S56>. C
When the PU 10 gets up by an interrupt, the process branches to the power-on reset process of the main routine <step S
57>.

[0093]

As described above, according to the present invention, it is possible to provide a battery check device capable of performing an accurate battery check in a camera incorporating a booster circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a power supply system when a battery check device according to the present invention is applied to a camera.

FIG. 2 is a block diagram showing an electric circuit when the battery checking device according to the present invention is applied to a camera.

3 is a diagram showing a circuit for driving a load at the time of battery check, which is built in the interface IC 16 of FIG.

4 is a diagram showing a circuit for outputting a step-up rectangular wave built in the interface IC 16 of FIG.

5 is a diagram showing a circuit for outputting a battery check voltage, which is built in the interface IC 16 of FIG.

6 is a diagram showing a circuit for monitoring a low voltage built in the interface IC 16 of FIG.

FIG. 7 is a first embodiment of the present invention and is a diagram showing a sequence flow of the CPU 10 when performing a battery check.

FIG. 8 is a diagram showing a time chart during battery check according to the present invention.

FIG. 9 is a diagram for explaining the operation of the part particularly related to the battery check in the main flow of the camera using the present invention.

FIG. 10 is a second embodiment of the present invention and is a diagram showing a sequence flow of the CPU 10 when performing a battery check.

[Explanation of symbols]

1 ... CPU, 11 ... Autofocus IC (AFI
C), 12 ... EEPROM, 13 ... Liquid crystal display panel, 1
4 ... Data back, 15 ... Strobe unit, 16 ... Interface IC, 17 ... Shooting lens, 18 ... Condenser lens, 19L / 19R ... Separator lens, 20 ...
AF optical system, 21L, 21R ... Photo sensor array, 2
2, 23 ... Motor driver IC, 24 ... Light emitting diode (LED), 25 ... Photometric silicon photodiode (SPD), 26 ... Light receiving silicon photodiode,
27 ... Remote control transmission unit, 28 ... Projection LED,
29 ... Shutter charge (SC) motor, 30 ... Lens drive (LD) motor, 31 ... Zooming (ZM) motor, 32 ... Shutter charge photo interrupter (SC
PI), 33 ... Lens driving photo interrupter (LD
PI), 34 ... Photo interrupter for zooming (ZM
PI), 35 ... Zooming Photo Reflector (ZMP
R), 36 ... AV motor, 37 ... AVPI.

Claims (2)

[Claims] 1. A power supply voltage detection means for detecting a power supply voltage of a camera, a booster circuit for stabilizing the power supply voltage of a control circuit of the camera, and a load means activated at the time of checking a battery, wherein the power supply voltage is provided. A battery check device for a camera, wherein the load means is operated and the operation of the booster circuit is stopped during the operation of the detection means. 2. The battery check device for a camera according to claim 1, wherein the operation of the load means is stopped while the booster circuit is operating.