JPH0786786A - Shield structure of lsi case - Google Patents
Shield structure of lsi caseInfo
- Publication number
- JPH0786786A JPH0786786A JP5231499A JP23149993A JPH0786786A JP H0786786 A JPH0786786 A JP H0786786A JP 5231499 A JP5231499 A JP 5231499A JP 23149993 A JP23149993 A JP 23149993A JP H0786786 A JPH0786786 A JP H0786786A
- Authority
- JP
- Japan
- Prior art keywords
- lsi
- shield
- case
- wiring board
- fence
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体素子から放射され
る電磁波を遮断するＬＳＩケースのシールド構造に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a shield structure for an LSI case that shields electromagnetic waves emitted from a semiconductor device.
【０００２】[0002]
【従来の技術】従来の技術として特開昭５９−２２５５
９１号公報に図４に示すような電気・電子部品の取付、
収納用箱形ケースが提案されている。この提案では、放
熱板を兼ねた金属性箱形ケース３１に電子部品３２が収
納されることにより、電磁波ノイズが遮断されていた。
また、特開平２−１７６５９号公報には、図５に示すよ
うな回路チップを電磁障害（ＥＭＩ），静電気放電（Ｅ
ＳＤ），熱および機械的衝撃から保護するためのパッケ
ージが提案されており、プリント配線基板４１とボック
ス型ヒートシンク４２とで集積回路４３が覆われること
により、集積回路の冷却と電磁障害（ＥＭＩ）の遮蔽と
が行なわれていた。また、実開平３−１４９８号公報に
は、図６に示すように放熱板と電磁遮蔽用導体とを兼ね
備えた放熱併用形遮蔽板６３が提案されていた。2. Description of the Related Art As a conventional technique, Japanese Patent Laid-Open No. 59-2255.
No. 91 publication, mounting of electric / electronic parts as shown in FIG.
A box-shaped case for storage has been proposed. According to this proposal, electromagnetic wave noise is blocked by housing the electronic component 32 in the metallic box-shaped case 31 that also serves as a heat sink.
Further, in Japanese Laid-Open Patent Publication No. 2-17659, a circuit chip as shown in FIG. 5 is used for electromagnetic interference (EMI), electrostatic discharge (E).
SD), a package for protection from heat and mechanical shock has been proposed, and the integrated circuit 43 is covered by the printed wiring board 41 and the box-type heat sink 42, thereby cooling the integrated circuit and electromagnetic interference (EMI). Was shielded. Further, Japanese Utility Model Laid-Open No. 3-1498 proposes a heat radiation combined type shield plate 63 having both a heat radiator plate and an electromagnetic shielding conductor as shown in FIG.
【０００３】[0003]
【発明が解決しようとする課題】特開昭５９−２２５５
９１号公報や特開平３−１４９８号公報で提案された構
造では、放熱用部材が電磁遮蔽用部材を兼ねており、ヒ
ートシンクの形状が複雑かつ大型になるという欠点があ
る。Problems to be Solved by the Invention JP-A-59-2255
In the structures proposed in Japanese Patent Publication No. 91 and Japanese Patent Application Laid-Open No. 3-1498, the heat dissipation member also serves as an electromagnetic shielding member, and there is a drawback that the shape of the heat sink becomes complicated and large.
【０００４】また、特開昭５９−２２５５９１号公報や
特開平２−１７６５９号公報で提案された構造では、配
線基板上のある特定のＬＳＩのみを遮蔽することが困難
であり、複雑かつ大型化する欠点がある。Further, in the structure proposed in Japanese Patent Laid-Open No. 59-225591 and Japanese Patent Laid-Open No. 2-17659, it is difficult to shield only a specific LSI on the wiring board, which is complicated and large in size. There is a drawback to
【０００５】さらに、半導体素子の発熱量やＬＳＩケー
スの実装状態に応じて、それぞれに製作する必要がある
という欠点もある。Further, there is a drawback that it is necessary to manufacture each of them according to the heat generation amount of the semiconductor element and the mounting state of the LSI case.
【０００６】なお、実開平３−１４９８号公報で提案さ
れた構造では、特定の半導体素子のみが遮蔽されてい
る。しかし、半導体素子全面が遮蔽されていないため遮
蔽の効果が低いという欠点があった。In the structure proposed in Japanese Utility Model Publication No. 3-1498, only a specific semiconductor element is shielded. However, there is a drawback that the shielding effect is low because the entire surface of the semiconductor element is not shielded.
【０００７】[0007]
【課題を解決するための手段】本発明のＬＳＩケースの
シールド構造は、基準電位の電源層に接続されたグラン
ドパッドを有する配線基板と、この配線基板に搭載され
半導体素子を収納し、ネジにより着脱可能なヒートシン
ク取付構造を有するＬＳＩケースと、このＬＳＩケース
を覆う箱型で、該ＬＳＩケースとヒートシンクとの間に
狭持固定される際、一部が前記配線基板の前記グランド
パッドと接触する位置に固定されるシールドフェンスと
を含む。A shield structure for an LSI case according to the present invention includes a wiring board having a ground pad connected to a power supply layer of a reference potential, a semiconductor element mounted on the wiring board, and a screw. An LSI case having a detachable heat sink mounting structure, and a box type that covers the LSI case. When sandwiched and fixed between the LSI case and the heat sink, a part of the LSI case contacts the ground pad of the wiring board. Including a shield fence fixed in position.
【０００８】[0008]
【実施例】次に本発明の一実施例について図面を参照し
て詳細に説明する。An embodiment of the present invention will now be described in detail with reference to the drawings.
【０００９】図１および図２を参照すると、本発明の一
実施例は、基準電位の電源層を有する配線基板３，この
配線基板３上に搭載されたＬＳＩケース２，このＬＳＩ
ケース２に収納された半導体素子１，この配線基板３上
にＬＳＩケース２を取り囲むように設けられ基準電位の
電源層に接続されたグランドパッド５，および端部が弾
性を有するバネ状のコンタクト１１を有しグランドパッ
ド５と電気的に接触するシールドフェンス４を含む。Referring to FIGS. 1 and 2, an embodiment of the present invention is a wiring board having a power supply layer of a reference potential 3, an LSI case mounted on this wiring board 3, and this LSI.
A semiconductor element 1 housed in a case 2, a ground pad 5, which is provided on the wiring board 3 so as to surround the LSI case 2 and is connected to a power supply layer of a reference potential, and a spring-like contact 11 having elastic ends. And a shield fence 4 having electrical contact with the ground pad 5.
【００１０】シールドフェンス４は金属板でつくられて
おり、箱型でＬＳＩケース２を覆う形状となっている。The shield fence 4 is made of a metal plate, has a box shape, and covers the LSI case 2.
【００１１】ＬＳＩケース２上には、ネジ穴を有する取
付板６が接着剤７にて固定されている。この取付板６の
上にヒートシンク８をネジ９で固定されうる。シールド
フェンス４には取付板６のネジ穴と対応した位置に穴が
設けられている。取付板６とヒートシンク８との間にシ
ールドフェンスが狭持される。さらに、シールドフェン
ス４と取付板６との間、およびシールドフェンス４とヒ
ートシンク８との間に放熱シート１０がはさまれて固定
されている。放熱シート１０は、例えばシリコーンラバ
ーでつくられている。このため、シールドフェンス４と
ＬＳＩケース２との間は電気的に絶縁されている。A mounting plate 6 having a screw hole is fixed on the LSI case 2 with an adhesive 7. The heat sink 8 can be fixed on the mounting plate 6 with screws 9. Holes are provided in the shield fence 4 at positions corresponding to the screw holes of the mounting plate 6. A shield fence is sandwiched between the mounting plate 6 and the heat sink 8. Further, the heat dissipation sheet 10 is sandwiched and fixed between the shield fence 4 and the mounting plate 6 and between the shield fence 4 and the heat sink 8. The heat dissipation sheet 10 is made of, for example, silicone rubber. Therefore, the shield fence 4 and the LSI case 2 are electrically insulated from each other.
【００１２】次に本発明の一実施例の組立て動作につい
て図面を参照して詳細に説明する。Next, the assembling operation of the embodiment of the present invention will be described in detail with reference to the drawings.
【００１３】図１および図２を参照すると、グランドパ
ッド５を備えた配線基板３上に半導体素子１の収納され
たＬＳＩケース２が実装される。Referring to FIGS. 1 and 2, an LSI case 2 in which a semiconductor element 1 is housed is mounted on a wiring board 3 having a ground pad 5.
【００１４】次に半導体素子１に接着剤７が取付けられ
る。この接着剤７の付着後、取付板６が実装される。こ
の実装の際グランドパッド５にコンタクト１１が電気的
に接触する位置にシールドフェンス４が実装されなけれ
ばならない。このシールドフェンス４のネジ穴に合う位
置に、取付板６，放熱シート１０およびヒートシンク８
が取付けられる。これらの部品が取付けられたあとネジ
穴にネジ９がさしこまれ、回転により固定される。Next, the adhesive 7 is attached to the semiconductor element 1. After the adhesive 7 is attached, the mounting plate 6 is mounted. At the time of this mounting, the shield fence 4 must be mounted at a position where the contact 11 electrically contacts the ground pad 5. The mounting plate 6, the heat radiating sheet 10 and the heat sink 8 are provided at positions that match the screw holes of the shield fence 4.
Is installed. After these parts are attached, screws 9 are inserted into the screw holes and fixed by rotation.
【００１５】このネジ９によりシールドフェンス４がＬ
ＳＩケース２に固定され、配線基板３上のグランドパッ
ド５とシールドフェンス４のコンタクト１１とが接触さ
れ電気的に接触される。従って、グランドパッド５を介
して配線基板３の基準電位が導電体であるシールドフェ
ンス４全体に伝わる。この結果、シールドフェンス４の
全体および配線基板３の電源層でＬＳＩケース２を囲む
基準電位の囲みが形成される。With this screw 9, the shield fence 4 becomes L
Fixed to the SI case 2, the ground pad 5 on the wiring board 3 and the contact 11 of the shield fence 4 are brought into contact with each other and electrically contacted with each other. Therefore, the reference potential of the wiring board 3 is transmitted to the entire shield fence 4 which is a conductor through the ground pad 5. As a result, the entire shield fence 4 and the power supply layer of the wiring board 3 form a reference potential enclosure surrounding the LSI case 2.
【００１６】ＬＳＩケース２内に収納された半導体素子
１の動作により生じ放射される電磁波は、シールドフェ
ンス４と配線基板３内の基準電位電源層からなる囲みで
吸収，遮蔽され、外部への放射をおさえられる。また、
半導体素子１の動作により発する熱は、ＬＳＩケース２
または、接着剤７，取付板６および放熱シート１０から
シールドフェンス４，放熱シート１０およびヒートシン
ク８を介して空気中へ放熱される。Electromagnetic waves generated and radiated by the operation of the semiconductor element 1 housed in the LSI case 2 are absorbed and shielded by the enclosure composed of the shield fence 4 and the reference potential power supply layer in the wiring board 3, and radiated to the outside. Can be suppressed. Also,
The heat generated by the operation of the semiconductor element 1 is generated by the LSI case 2
Alternatively, heat is radiated from the adhesive 7, the mounting plate 6, and the heat dissipation sheet 10 into the air through the shield fence 4, the heat dissipation sheet 10 and the heat sink 8.
【００１７】このように本発明のＬＳＩケースのシール
ド構造は配線基板３上の特定のＬＳＩのみを遮蔽し、か
つ十分な放熱を行なうことが可能である。また、ヒート
シンク８とシールドフェンス４とが独立した部品として
構成されるため、ＬＳＩの発熱量にあわせてヒートシン
ク８の選定を容易にできる。As described above, the shield structure of the LSI case of the present invention can shield only a specific LSI on the wiring board 3 and can sufficiently radiate heat. Further, since the heat sink 8 and the shield fence 4 are configured as independent parts, the heat sink 8 can be easily selected according to the heat generation amount of the LSI.
【００１８】この実施例では、シールドフェンス４を金
属板で構成したが、電磁遮蔽に問題のないサイズの開口
部を有する金属メッシュやパンチングメタルでも形成で
きる。In this embodiment, the shield fence 4 is made of a metal plate, but it can also be made of a metal mesh or punching metal having an opening of a size that does not cause electromagnetic shielding problems.
【００１９】次に本発明の一実施例の変形例について図
面を参照して詳細に説明する。Next, a modification of the embodiment of the present invention will be described in detail with reference to the drawings.
【００２０】図３（Ａ）を参照すると、本発明の一実施
例の第１の変形例では、配線基板３上のグランドパッド
５に接触されたシールドフェンス４は導電性プラスチッ
クで形成される。Referring to FIG. 3A, in the first modification of the embodiment of the present invention, the shield fence 4 in contact with the ground pad 5 on the wiring board 3 is made of conductive plastic.
【００２１】図３（Ｂ）を参照すると、本発明の一実施
例の第２の変形例では、シールドフェンス４は配線基板
３上のグランドパッド５に接触される面に金属箔１２を
付着したプラスチック製の本体を有する。Referring to FIG. 3B, in the second modification of the embodiment of the present invention, the shield fence 4 has the metal foil 12 attached to the surface of the wiring board 3 which is in contact with the ground pad 5. It has a plastic body.
【００２２】図３（Ｃ）を参照すると、本発明の一実施
例の第３の変形例では、シールドフェンス４は、プラス
チック製のボディに金属メッキ１３して形成される。こ
の結果、配線基板３の基準電位はグランドパッド５を介
してシールドフェンス４の金属メッキ１３に流される。Referring to FIG. 3C, in a third modification of the embodiment of the present invention, the shield fence 4 is formed by metal plating 13 on a plastic body. As a result, the reference potential of the wiring board 3 is passed through the ground pad 5 to the metal plating 13 of the shield fence 4.
【００２３】図３（Ｄ）を参照すると、本発明の一実施
例の第４の変形例では、シールドフェンス４は、配線基
板３上のグランドパッド５に接触される面に導電性塗装
膜１４を塗装したプラスチック製本体を有する。Referring to FIG. 3D, in a fourth modification of the embodiment of the present invention, the shield fence 4 has a conductive coating film 14 on the surface of the wiring board 3 which is in contact with the ground pad 5. It has a painted plastic body.
【００２４】[0024]
【発明の効果】本発明はＬＳＩケース２を覆う箱型で、
ＬＳＩケース２とヒートシンク８との間にはさんで固定
することにより配線基板３上のグランドパッド５と接触
し、ＬＳＩケース８を囲む基準電位の囲みを形成するシ
ールドフェンス４を有することにより、半導体素子１の
放射する電磁波を吸収，遮蔽し、外へ放射させないよう
におさえ、かつ、ヒートシンク８から放熱を行なうこと
ができる。また、シールドフェンス４は配線基板３上の
特定のＬＳＩのみを覆うことが可能なため、構造を小型
化できるという効果がある。さらに、本発明はシールド
フェンス４とヒートシンク８とが独立した部品として構
成されるため、ＬＳＩの電力などに応じてシールドフェ
ンスやヒートシンク８の形状を自由に選択できるという
効果もある。The present invention is a box type that covers the LSI case 2.
The semiconductor device is provided with the shield fence 4 that is fixed between the LSI case 2 and the heat sink 8 to come into contact with the ground pad 5 on the wiring board 3 and form a reference potential enclosure surrounding the LSI case 8. Electromagnetic waves emitted from the element 1 can be absorbed and shielded so as not to be emitted to the outside, and heat can be dissipated from the heat sink 8. Further, since the shield fence 4 can cover only a specific LSI on the wiring board 3, there is an effect that the structure can be downsized. Further, in the present invention, since the shield fence 4 and the heat sink 8 are configured as independent components, there is an effect that the shapes of the shield fence and the heat sink 8 can be freely selected according to the power of the LSI.
【図１】本発明の一実施例を示す図。FIG. 1 is a diagram showing an embodiment of the present invention.
【図２】本発明の一実施例を示す図。FIG. 2 is a diagram showing an embodiment of the present invention.
【図３】本発明の一実施例の変形例を示す図。FIG. 3 is a diagram showing a modification of the embodiment of the present invention.
【図４】従来技術の一例を示す図。FIG. 4 is a diagram showing an example of a conventional technique.
【図５】従来技術の一例を示す図。FIG. 5 is a diagram showing an example of a conventional technique.
【図６】従来技術の一例を示す図。FIG. 6 is a diagram showing an example of a conventional technique.
１ 半導体素子 ２ ＬＳＩケース ３ 配線基板 ４ シールドフェンス ５ グランドパッド ６ 取付板 ７ 接着剤 ８ ヒートシンク ９ ネジ １０ 放熱シート １１ コンタクト １２ 金属箔 １３ 金属メッキ １４ 導電性塗装膜 1 Semiconductor Element 2 LSI Case 3 Wiring Board 4 Shield Fence 5 Ground Pad 6 Mounting Plate 7 Adhesive 8 Heat Sink 9 Screw 10 Heat Dissipating Sheet 11 Contact 12 Metal Foil 13 Metal Plating 14 Conductive Coating Film
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 23/40 Ｚ ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI technical display location H01L 23/40 Z
Claims (6)
パッドを有する配線基板と、 この配線基板に搭載され半導体素子を格納し、ネジによ
り着脱可能なヒートシンク取付構造を有するＬＳＩケー
スと、 このＬＳＩケースを覆う箱型で該ＬＳＩケースとヒート
シンクとの間に狭持固定される際、一部が前記配線基板
の前記グランドパッドと接触する位置に固定されるシー
ルドフェンスとを含むことを特徴とするＬＳＩケースの
シールド構造。1. A wiring board having a ground pad connected to a power supply layer of a reference potential, an LSI case having a heat sink mounting structure in which a semiconductor element is mounted on the wiring board and can be attached and detached with a screw, and the LSI case. A box fence covering the case, and a shield fence fixed at a position where a part of the LSI case and the heat sink are held in contact with the ground pad of the wiring board when sandwiched and fixed between the LSI case and the heat sink. LSI case shield structure.
で形成されたことを特徴とする請求項１記載のＬＳＩケ
ースのシールド構造。2. The shield structure for an LSI case according to claim 1, wherein the shield fence is formed of a metal mesh.
ックで形成されたことを特徴とする請求項１記載のＬＳ
Ｉケースのシールド構造。3. The LS according to claim 1, wherein the shield fence is made of a conductive plastic.
I case shield structure.
配線基板の前記グランドパッドに電気的に接続するよう
に表面に金属箔を付着させたプラスチックで形成された
ことを特徴とする請求項１記載のＬＳＩケースのシール
ド構造。4. The LSI case according to claim 1, wherein the shield fence is formed of plastic having a metal foil attached to a surface thereof so as to be electrically connected to at least the ground pad of the wiring board. Shield structure.
キを施したプラスチックで形成されたことを特徴とする
請求項１記載のＬＳＩケースのシールド構造。5. The shield structure for an LSI case according to claim 1, wherein the shield fence is formed of plastic whose surface is plated with metal.
配線基板の前記グランドパッドに電気的に接続するよう
に表面に導電性の塗装を行ったプラスチックで形成され
たことを特徴とする請求項１記載のＬＳＩケースのシー
ルド構造。6. The LSI according to claim 1, wherein the shield fence is formed of plastic whose surface is electrically conductive so as to be electrically connected to at least the ground pad of the wiring board. Case shield structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5231499A JP2586389B2 (en) | 1993-09-17 | 1993-09-17 | LSI case shield structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5231499A JP2586389B2 (en) | 1993-09-17 | 1993-09-17 | LSI case shield structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0786786A true JPH0786786A (en) | 1995-03-31 |
| JP2586389B2 JP2586389B2 (en) | 1997-02-26 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5231499A Expired - Lifetime JP2586389B2 (en) | 1993-09-17 | 1993-09-17 | LSI case shield structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2586389B2 (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0927576A (en) * | 1995-07-11 | 1997-01-28 | Nec Corp | Package for semiconductor integrated circuit |
| JP2003502853A (en) * | 1999-06-23 | 2003-01-21 | エリクソン インコーポレイテッド | Gel structures for combined EMI shielding and thermal control of microelectronic assemblies |
| KR100452999B1 (en) * | 2002-07-22 | 2004-10-15 | 엘지전자 주식회사 | Radiated noise reduction structure of power element |
| JP2006303255A (en) * | 2005-04-21 | 2006-11-02 | Alps Electric Co Ltd | Mounting structure of high-frequency apparatus |
| WO2007125718A1 (en) * | 2006-04-27 | 2007-11-08 | Kyocera Corporation | Electronic device |
| JP2007299813A (en) * | 2006-04-27 | 2007-11-15 | Kyocera Corp | Electronic apparatus |
| JP2008072153A (en) * | 2003-01-30 | 2008-03-27 | Internatl Business Mach Corp <Ibm> | Semiconductor package and its manufacturing method |
| US20100126764A1 (en) * | 2008-11-24 | 2010-05-27 | Seagate Technology, Llc | die ground lead |
| CN102651962A (en) * | 2011-02-28 | 2012-08-29 | 鸿富锦精密工业（深圳）有限公司 | Electric device |
| WO2017176521A1 (en) * | 2016-04-04 | 2017-10-12 | Commscope Technologies Llc | Systems and methods for thermal management for high power density emi shielded electronic devices |
| WO2023074547A1 (en) * | 2021-10-28 | 2023-05-04 | 株式会社小糸製作所 | Electronic unit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4896541A (en) * | 1972-03-04 | 1973-12-10 | ||
| JPS58153721A (en) * | 1982-03-08 | 1983-09-12 | Nippon Kokan Kk <Nkk> | Controlling method of end carbon content in vod process |
| JPH0582994A (en) * | 1991-09-20 | 1993-04-02 | Fujitsu Ltd | Box type unit structure |
-
1993
- 1993-09-17 JP JP5231499A patent/JP2586389B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4896541A (en) * | 1972-03-04 | 1973-12-10 | ||
| JPS58153721A (en) * | 1982-03-08 | 1983-09-12 | Nippon Kokan Kk <Nkk> | Controlling method of end carbon content in vod process |
| JPH0582994A (en) * | 1991-09-20 | 1993-04-02 | Fujitsu Ltd | Box type unit structure |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0927576A (en) * | 1995-07-11 | 1997-01-28 | Nec Corp | Package for semiconductor integrated circuit |
| JP2003502853A (en) * | 1999-06-23 | 2003-01-21 | エリクソン インコーポレイテッド | Gel structures for combined EMI shielding and thermal control of microelectronic assemblies |
| KR100452999B1 (en) * | 2002-07-22 | 2004-10-15 | 엘지전자 주식회사 | Radiated noise reduction structure of power element |
| JP2008072153A (en) * | 2003-01-30 | 2008-03-27 | Internatl Business Mach Corp <Ibm> | Semiconductor package and its manufacturing method |
| JP2006303255A (en) * | 2005-04-21 | 2006-11-02 | Alps Electric Co Ltd | Mounting structure of high-frequency apparatus |
| JP2007299813A (en) * | 2006-04-27 | 2007-11-15 | Kyocera Corp | Electronic apparatus |
| WO2007125718A1 (en) * | 2006-04-27 | 2007-11-08 | Kyocera Corporation | Electronic device |
| JP4657972B2 (en) * | 2006-04-27 | 2011-03-23 | 京セラ株式会社 | Electronics |
| US8325483B2 (en) | 2006-04-27 | 2012-12-04 | Kyocera Corporation | Electronic device including a heat conduction member |
| US20100126764A1 (en) * | 2008-11-24 | 2010-05-27 | Seagate Technology, Llc | die ground lead |
| CN102651962A (en) * | 2011-02-28 | 2012-08-29 | 鸿富锦精密工业（深圳）有限公司 | Electric device |
| WO2017176521A1 (en) * | 2016-04-04 | 2017-10-12 | Commscope Technologies Llc | Systems and methods for thermal management for high power density emi shielded electronic devices |
| US10772245B2 (en) | 2016-04-04 | 2020-09-08 | Commscope Technologies Llc | Systems and methods for thermal management for high power density EMI shielded electronic devices |
| WO2023074547A1 (en) * | 2021-10-28 | 2023-05-04 | 株式会社小糸製作所 | Electronic unit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2586389B2 (en) | 1997-02-26 |
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Legal Events
| Date | Code | Title | Description |
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| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19961008 |