JPH0786784B2 - RMS detection circuit - Google Patents
RMS detection circuitInfo
- Publication number
- JPH0786784B2 JPH0786784B2 JP62075580A JP7558087A JPH0786784B2 JP H0786784 B2 JPH0786784 B2 JP H0786784B2 JP 62075580 A JP62075580 A JP 62075580A JP 7558087 A JP7558087 A JP 7558087A JP H0786784 B2 JPH0786784 B2 JP H0786784B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- effective value
- circuit
- charging
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Control Of Voltage And Current In General (AREA)
- Measurement Of Current Or Voltage (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は例えば負荷に交流電力を供給する電源装置の出
力を実効値で検出するようにしたものに関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to, for example, a device for detecting the output of a power supply device that supplies AC power to a load with an effective value.
負荷に交流電力を供給する電源装置例えば無停電電源装
置（以下UPSという）等に用いられるインバータには、
半導体によるスイッチング素子が使用されており、これ
ら半導体デバイスはタコジェネレータ等の発電機に比べ
て、過負荷に弱いため、適切な保護装置を必要としてい
る。Inverters used in power supplies that supply AC power to loads, such as uninterruptible power supplies (hereinafter referred to as UPS),
Switching elements made of semiconductors are used, and these semiconductor devices are more susceptible to overload than generators such as tachogenerators, and thus require appropriate protection devices.
一方、近時のFA・OA化に伴いUPSの負荷には、いわゆる
コンデンサインプット形整流回路の電源回路を備えた機
器が多くなってきた。このコンデンサインプット形整流
回路の電源回路を備えた機器にあっては、入力電流波形
が電源電圧波形のピーク値近傍で高いピーク値となる歪
んだ電流波形となり（第４図）、これの的確な検出によ
る保護が必要である。On the other hand, with the recent trend toward FA / OA, UPS loads have become more and more equipped with so-called capacitor input type rectifier power supply circuits. In the equipment equipped with the power supply circuit of this capacitor input type rectifier circuit, the input current waveform becomes a distorted current waveform with a high peak value near the peak value of the power supply voltage waveform (Fig. 4), and the accurate Detection protection is required.
他方、UPS等の電源装置における定格出力電流は実効値
で規定されている。これは装置の発熱が実効値によるた
めであり、従って、装置の出力電流は実効値で検出する
必要がある。On the other hand, the rated output current of power supply devices such as UPS is regulated by the effective value. This is because the heat generation of the device depends on the effective value, and therefore the output current of the device needs to be detected as the effective value.
ところが、実効値検出回路は、自乗回路、平均化（積
分）回路、開平回路等を組合せて形成したアナログ実効
値検出回路やアナログ値をデジタル変換して、上記演算
をデジタルで行うデジタル実効値検出回路もあるが、構
成が複雑で高価となり、一般には平均値検出回路が用い
られている。However, the effective value detection circuit is an analog effective value detection circuit formed by combining a square circuit, an averaging (integration) circuit, a square root circuit, etc. and a digital conversion of the analog value to digitally perform the above calculation. Although there is a circuit, the structure is complicated and expensive, and an average value detection circuit is generally used.
上述した平均値検出回路としては、第３図に示すよう
に、交流入力を全波整流する整流回路RECの出力端に、
充放電用抵抗Rdと平滑用コンデンサCsとを直列に挿入
し、上記コンデンサの端子間から入力を平均値で検出し
た出力を送出するよう構成されている。この場合、負荷
の入力波形が常に正弦波であれば問題はないが、上述し
たように負荷がコンデンサインプット形であると検出し
た出力は実効値より小さい出力となり過電流が検出でき
ないという問題がある。したがって、UPSの過電流検出
レベルを正弦波で設定すれば、コンデンサインプット形
負荷においてはかなりの過電流が流れないと過負荷とし
て検出せず、装置を破壊するということになり、上記過
電流検出レベルをコンデンサインプット形負荷で設定す
れば、小電流で過負荷と検出してしまう不都合を生じ
る。As the average value detection circuit described above, as shown in FIG. 3, at the output end of the rectifier circuit REC for full-wave rectifying the AC input,
A charging / discharging resistor Rd and a smoothing capacitor Cs are inserted in series, and an output obtained by detecting the input as an average value is sent out between the terminals of the capacitor. In this case, there is no problem if the input waveform of the load is always a sine wave, but as described above, the output detected when the load is the capacitor input type becomes an output smaller than the effective value, and there is a problem that the overcurrent cannot be detected. . Therefore, if the UPS overcurrent detection level is set with a sine wave, a capacitor input type load will not be detected as an overload unless a significant overcurrent flows, and the device will be destroyed. If the level is set with a capacitor input type load, there is a disadvantage that a small current is detected as an overload.
これを電流の実効値と平均値及び波高率の関係において
説明すると、今、電流の実効値をIrms、平均値をIave、
波高値（ピーク値）をIp、波高率をCFとすると、波高率
CFはCF＝Ip/Irmsで示され、この波高率CFは、入力電流
波形が矩形波であればCF＝1.0、正弦波でCF＝1.4、OA負
荷の場合、CF＝2.0〜3.0と通常考えられている。そこで
上記OF負荷の電流を第４図に示すように近似してながめ
ると、電流波形の1/2周期をT,パルス幅をｔとおけば、
実効値Irms、平均値Iave、波高率CFはそれぞれ、 と示される。したがって、上記Irms,IaveをCFで表らわ
すと、 Irms＝Ip/CF Iave＝Ip/CF2 と示すことができ、ここでIave/Irmsを考えると、上式
から Iave/Irms＝1/CF となる。これをグラフで示せば第５図のようになる。即
ち、平均値検出形では、CF＝2.0で実効値の50％、CF＝
3.0では実効値の33％にしかならず、このことはCF＝3.0
において例えば実効値で10Aの場合でも平均値検出形で
は3.3Aしか流れないように検出することを意味し、的確
な検出ができないという不都合を生ずることになる。Explaining this in relation to the effective value of the current, the average value, and the crest factor, now, the effective value of the current is Irms, the average value is Iave,
If the crest value (peak value) is Ip and the crest factor is CF, the crest factor
CF is indicated by CF = Ip / Irms, and this crest factor CF is usually considered to be CF = 1.0 if the input current waveform is a square wave, CF = 1.4 for a sine wave, and CF = 2.0 to 3.0 for an OA load. Has been. Therefore, if the current of the OF load is approximated as shown in Fig. 4, and if the half cycle of the current waveform is T and the pulse width is t,
The effective value Irms, average value Iave, and crest factor CF are Is shown. Therefore, if Irms and Iave are expressed by CF, it can be shown that Irms = Ip / CF Iave = Ip / CF 2. Considering Iave / Irms, Iave / Irms = 1 / CF Becomes This can be shown in a graph as shown in FIG. That is, in the average value detection type, CF = 2.0 and 50% of the effective value, CF =
At 3.0, it is only 33% of the effective value, which means CF = 3.0.
For example, even if the effective value is 10 A, it means that the average value detection type detects so that only 3.3 A flows, which causes a disadvantage that accurate detection cannot be performed.
本発明は上述した点にかんがみてなされたもので、その
目的とするところは、簡単な構成で交流入力を実効値で
検出することができるようにしたものを提供することに
ある。The present invention has been made in view of the above points, and an object thereof is to provide an apparatus capable of detecting an AC input with an effective value with a simple configuration.
本発明は上記目的を達成するため、交流入力を全波整流
する整流回路の出力端に、充放電用抵抗と平滑用コンデ
ンサを直列に挿入し、上記抵抗の端子間にダイオードと
充電用抵抗を直列に挿入し、上記２つの抵抗の比（充電
用抵抗／充放電用抵抗）を波高率に応じて設定して、交
流入力の実効値を近似した直流出力で上記コンデンサか
ら送出するように構成したものである。In order to achieve the above object, the present invention inserts a charging / discharging resistor and a smoothing capacitor in series at the output terminal of a rectifying circuit for full-wave rectifying an AC input, and a diode and a charging resistor between the terminals of the resistor. It is configured to be inserted in series and set the ratio of the two resistances (charging resistance / charging / discharging resistance) according to the crest factor, and to output from the capacitor with a DC output that approximates the effective value of the AC input. It was done.
本発明の理解を容易にするために、上述した波効率CFと
Iave/Irms及びIp/Irmsの関係をさらに説明すると、Ip/I
rmsはCFであり、CFが大きくなれば大きくなり、一方Iav
e/IrmsはCFが大きくなると小さくなる。これを図示した
のが第６図で、同図において特性曲線Ａは上記Ip/Irms
を、またＢは上記Iave/Irmsを示したもので、両特性曲
線A,Bから特性曲線ｃを得るように構成すれば、波高率C
Fがある範囲で変化しても略一定の値を得ることができ
ることになる。言換えれば、特性曲線Ａはピーク値検出
の場合であり、特性曲線Ｂは平均値検出の場合である。
従って、ピーク値検出と平均値検出の回路を組合せれば
誤差の小さい実効値検出が可能となる。In order to facilitate understanding of the present invention, the above-mentioned wave efficiency CF
To further explain the relationship between Iave / Irms and Ip / Irms, Ip / Irms
rms is CF, which increases as CF increases, while Iav
e / Irms decreases as CF increases. This is shown in FIG. 6, in which the characteristic curve A is the above Ip / Irms.
And B is the above Iave / Irms. If the characteristic curve c is obtained from both characteristic curves A and B, the crest factor C
Even if F changes within a certain range, a substantially constant value can be obtained. In other words, the characteristic curve A is for peak value detection, and the characteristic curve B is for average value detection.
Therefore, if the circuits for peak value detection and average value detection are combined, effective value detection with a small error becomes possible.
そこで、交流入力を全波整流する整流回路RECの出力端
に、充放電用抵抗Rdと平滑用コンデンサCsを直列に挿入
した平均値検出回路の上記抵抗Rdの端子間にダイオード
と充電用抵抗Rcを直列に挿入して形成し、上記抵抗Rcと
Rdの比Rc/Rdをｋとすると、ｋが小さい場合は上記特性
曲線Ａに近付き、ｋが大となると特性曲線Ｂに近付く、
即ち、抵抗RcとRdの組合せによって、上記特性曲線Ｃを
種々選定することができる。したがって、UPS等では出
力電流の波高率の範囲に応じて上記ｋの値を適宜設定す
ることにより電源装置の出力電流を実効値で的確に検出
することができることになる。Therefore, at the output end of the rectifier circuit REC that performs full-wave rectification of the AC input, the diode and the charging resistor Rc are connected between the terminals of the resistor Rd of the average value detection circuit in which the charging / discharging resistor Rd and the smoothing capacitor Cs are inserted in series. Formed by inserting in series with the resistor Rc and
When the ratio Rc / Rd of Rd is k, when k is small, the characteristic curve A approaches, and when k becomes large, the characteristic curve B approaches.
That is, the characteristic curve C can be variously selected depending on the combination of the resistors Rc and Rd. Therefore, in a UPS or the like, the output current of the power supply device can be accurately detected as an effective value by appropriately setting the value of k in accordance with the range of the crest factor of the output current.
以下、本発明の実施例をUPSに適用した第１図によって
説明する。１は交流電源、２は上記交流電源１に接続さ
れた充電器（図示せず）と、これにより充電されるバッ
テリを備えた直流電源、３は上記交流電源１と直流電源
２から接続されて負荷４に交流電力を供給するインバー
タ回路である。これは交流電源１に接続されて直流に変
換して出力する直流変換器と、これに接続されてトラン
ジスタ等のスイッチング素子をブリッジ状に結線したイ
ンバータと、出力の高周波（スイッチング周波数）をカ
ットして良好な正弦波交流を出力するフィルタとを備
え、上記直流変換器の出力端に、直流電源２の出力端を
常時開路し、交流電源１が停電したとき閉路する切換ス
イッチを介して接続して、上記インバータの複数のスイ
ッチング素子を、後述のPWM制御回路９のパルス幅変調
信号（以下PWM信号という）により順次オンオフ制御し
フィルタを通して、直流入力を商用正弦波の交流出力に
変換して送出するようになっている。５は、上記インバ
ータ回路３の出力回路に挿入した変流器CTとこれの２次
側端子間に挿入した抵抗R1とを備え、上記抵抗R1の一端
を回路接地し、上記出力回路に流れる電流に比例した電
流を抵抗R1から電圧として出力するようにした電流検出
回路である。６は、上記電流検出回路５から接続され
て、インバータ回路３の出力電流を実効値で検出して出
力する実効値検出回路である。これは、上記抵抗R1から
接続されて交流入力を全波整流する整流回路RECの出力
端と回路接地間に、充放電用抵抗Rdと、入力の脈流を十
分に平滑する平滑用コンデンサCsを直列に挿入し、上記
抵抗Rdの端子間に、ダイオードD1と充電用抵抗Rcとを直
列に挿入し、上記抵抗RdとコンデンサCsの接続点に、反
転入力端子を出力端に接続して、高入力インピーダンス
バッファに形成した演算増幅器A1の非反転入力端子を接
続し、この増幅器A1の出力端から入力電圧の実効値を近
似した直流電圧で出力するようになっている。７は、上
記実効値検出回路６の出力電圧V6と基準電圧設定器８が
出力する基準電圧Vrefとの偏差を出力する差動増幅回路
である。そして、上記基準電圧Vrefは、過電流検出レベ
ルから設定されている。An embodiment of the present invention will be described below with reference to FIG. 1 applied to a UPS. 1 is an AC power supply, 2 is a DC power supply provided with a charger (not shown) connected to the AC power supply 1 and a battery charged by the charger, and 3 is connected from the AC power supply 1 and the DC power supply 2. It is an inverter circuit that supplies AC power to the load 4. This is a DC converter that is connected to the AC power supply 1 and converts it to DC, and outputs it, an inverter that is connected to this and connected switching elements such as transistors in a bridge shape, and cuts the high frequency (switching frequency) of the output. And a filter for outputting a good sine wave AC, and the output end of the DC converter is connected to the output end of the DC power supply 2 via a changeover switch that is normally opened and closed when the AC power supply 1 is cut off. Then, a plurality of switching elements of the inverter are sequentially turned on / off by a pulse width modulation signal (hereinafter referred to as a PWM signal) of a PWM control circuit 9 which will be described later, and a DC input is converted to an AC output of a commercial sine wave and transmitted through a filter. It is supposed to do. 5 includes a current transformer CT inserted in the output circuit of the inverter circuit 3 and a resistor R 1 inserted between the secondary side terminals thereof, and one end of the resistor R 1 is grounded to the output circuit. It is a current detection circuit that outputs a current proportional to the flowing current as a voltage from the resistor R 1 . An effective value detection circuit 6 is connected from the current detection circuit 5 and detects the output current of the inverter circuit 3 as an effective value and outputs it. This is between the output terminal of the rectifier circuit REC for full-wave rectifying the AC input connected from the resistor R 1 and the circuit ground, and the charging / discharging resistor Rd and the smoothing capacitor Cs for sufficiently smoothing the pulsating current of the input. Is inserted in series, between the terminals of the resistor Rd, a diode D 1 and a charging resistor Rc are inserted in series, at the connection point of the resistor Rd and the capacitor Cs, the inverting input terminal is connected to the output end. The non-inverting input terminal of the operational amplifier A 1 formed in the high input impedance buffer is connected, and the output end of the amplifier A 1 outputs a DC voltage that approximates the effective value of the input voltage. 7 is a differential amplifier circuit for outputting a deviation between the reference voltage Vref output voltage V 6 and the reference voltage setting unit 8 of the effective value detection circuit 6 outputs. The reference voltage Vref is set from the overcurrent detection level.
９は、上記インバータの各スイッチング素子にPWM信号
を送出するPWM制御回路である。これは一定の周波数で
三角波信号を発生する三角波信号発生器と、正弦波信号
を発生する正弦波信号発生器と、この正弦波信号発生器
の正弦波信号の振幅を上記差動増幅回路７の出力によっ
て制御する例えば上記基準電圧Vrefと、実効値検出回路
６の出力電圧V6とがVref＜V6の関係になったときの差動
増幅回路７の出力に応じて、正弦波信号の振幅が小さく
なるよう制御する出力リミッタと、上記三角波、正弦波
両信号発生器の出力を比較してパルス幅を変調した出力
信号（PWM信号）を送出する比較器と、これの出力と分
配器の出力とによりPWM信号を送出するドライバーとか
らなっている。Reference numeral 9 is a PWM control circuit that sends out a PWM signal to each switching element of the inverter. This is a triangular wave signal generator that generates a triangular wave signal at a constant frequency, a sine wave signal generator that generates a sine wave signal, and the amplitude of the sine wave signal of this sine wave signal generator of the differential amplifier circuit 7. and for example, the reference voltage Vref is controlled by the output in accordance with the output of the differential amplifier circuit 7 when it is the relationship of the output voltage V 6 and is Vref <V 6 of the effective value detection circuit 6, the sine wave signal amplitude The output limiter that controls so that becomes smaller, the comparator that compares the output of the above-mentioned triangular wave and sine wave signal generators and sends the output signal (PWM signal) with the pulse width modulated, and the output of this and the distributor It consists of a driver that sends out a PWM signal depending on the output.
次に、その動作について説明する。交流電源１をうけた
インバータ回路３がPWM制御回路９のPWM信号により、イ
ンバータのスイッチング素子が順次オンオフ制御され
て、負荷４に交流電力が供給される。この負荷４に対す
る出力電流は電流検出回路５を介して実効値検出回路６
により検出される。即ち、電流検出回路５の抵抗R1に流
れる上記出力電流に比例した電流を電圧としてうけた実
効値検出回路６は、入力電圧を全波整流する整流回路RE
Cの出力電圧によってコンデンサCsが充放電し、このコ
ンデンサCsの端子間電圧が増幅器A1を介して、該回路６
の出力電圧V6として送出される。そして、整流回路REC
の出力電圧がコンデンサCsの充電電圧より高いときは、
ダイオードD1が導通して抵抗RcRdとコンデンサCsとの
CR時定数で定まる時限で、コンデンサCsが充電され、反
対に整流回路RECの出力電圧がコンデンサCsの充電電圧
より低いときは、ダイオードD1が不導通となり、コンデ
ンサCsは抵抗Rdを通して放電される。従って、充電時定
数と放電時定数が異なることとなり、コンデンサCsはピ
ーク値と平均値との中間の電圧、すなわち実効値に対応
した端子間電圧となる。これをうけた差動増幅回路７
は、基準電圧Vrefと上記出力電圧V6との偏差を出力す
る。これをうけたPWM制御回路９の出力リミッタは、上
記偏差の出力が基準電圧Vrefと出力電圧V6がV6≦Vrefの
関係にあるときの出力であれば、正弦波信号発生器の正
弦波信号の振幅を制御せず、従ってUPSの出力は定格電
圧となり、またV6＞Vrefの関係にあるときは正弦波信号
の振幅を小さくするよう、すなわちUPSの出力を定格電
圧よりさげるべく制御する。Next, the operation will be described. The inverter circuit 3 receiving the AC power supply 1 sequentially turns ON / OFF the switching elements of the inverter by the PWM signal of the PWM control circuit 9, and the AC power is supplied to the load 4. The output current to the load 4 is passed through the current detection circuit 5 and the effective value detection circuit 6
Detected by. That is, the effective value detection circuit 6, which receives a current proportional to the output current flowing through the resistor R 1 of the current detection circuit 5 as a voltage, is a rectifier circuit RE for full-wave rectifying the input voltage.
The capacitor Cs is charged and discharged by the output voltage of C, and the voltage between the terminals of this capacitor Cs passes through the amplifier A 1 and the circuit 6
Is output as the output voltage V 6 . And the rectifier circuit REC
When the output voltage of is higher than the charging voltage of the capacitor Cs,
The diode D 1 becomes conductive and the resistance RcRd and the capacitor Cs
When the output voltage of the rectifier circuit REC is lower than the charging voltage of the capacitor Cs, on the contrary, the capacitor Cs is charged for the time period determined by the CR time constant, the diode D 1 becomes non-conductive, and the capacitor Cs is discharged through the resistor Rd. . Therefore, the charging time constant and the discharging time constant are different, and the capacitor Cs has an intermediate voltage between the peak value and the average value, that is, the inter-terminal voltage corresponding to the effective value. Differential amplifier circuit 7 that received this
Outputs the deviation between the reference voltage Vref and the output voltage V 6 . The output limiter of the PWM control circuit 9 which receives this is the sine wave of the sine wave signal generator if the output of the deviation is the output when the reference voltage Vref and the output voltage V 6 have a relationship of V 6 ≤ Vref. The amplitude of the signal is not controlled, so the output of the UPS is at the rated voltage, and when V 6 > Vref, the amplitude of the sine wave signal is reduced, that is, the output of the UPS is controlled to be lower than the rated voltage. .
そして、正弦波信号発生器の正弦波信号と三角波信号発
生器の三角波信号とを比較してPWM信号が作成され、こ
のPWM信号によりインバータ回路３の出力が制御され
る。このようにして形成されたUPSの出力電圧電流特性
は第２図に示すように垂下特性となり、出力リミッタの
機能により出力電流は定格リミッタ電流I0で保護され
る。もし、上記実効値検出回路６に代わって、平均値検
出回路で形成した場合、正弦波I0で設定してもCFが大き
い場合、第２図のI0′で示すようにリミッタレベルが大
きくなって、インバータの素子を破壊させることにな
る。Then, the PWM signal is created by comparing the sine wave signal of the sine wave signal generator with the triangle wave signal of the triangle wave signal generator, and the output of the inverter circuit 3 is controlled by this PWM signal. The output voltage-current characteristic of the UPS thus formed has a drooping characteristic as shown in FIG. 2, and the output current is protected by the rated limiter current I 0 by the function of the output limiter. If, instead of the effective value detection circuit 6, when formed by the average value detecting circuit, when setting it on the sine wave I 0 CF is large, the limiter level at I 0 'of the second view larger As a result, the elements of the inverter will be destroyed.
上記動作において、入力の実効値を１として実効値検出
回路６の出力をIxとすると、上述した関係式から、 となる。In the above operation, when the effective value of the input is 1 and the output of the effective value detection circuit 6 is Ix, from the above relational expression, Becomes
但し、上記コンデンサCsは入力の脈流を十分平滑できる
値に選定しておく。However, the capacitor Cs is selected so that the input pulsating flow can be sufficiently smoothed.
そして、今、波高率CF＝1.4〜2.5の範囲で誤差が最小と
なるよう選定したｋ値が、例えば0.28とすると、第６図
の特性曲線Ｃのように示され、この場合の本発明による
実効値検出と従来の平均値検出の誤差を比較すると、 （Ａ）本発明による実効値検出の場合 Ixmax＝1.207,Ixmin＝1.156 （Ｂ）これに対し、平均値検出の場合 Ixmax＝0.714,Ixmin＝0.400 したがって誤差は、 即ち、出力Ixは波高率が1.4〜2.5の範囲で入力の実効値
に対して本発明による実効値検出によれば、誤差は±２
％であるのに比し、従来の平均値検出では±28％の誤差
が生ずることになり、検出精度を平均値検出形に対して
著しく向上することができる。Then, when the k value selected so that the error is minimized in the range of the crest factor CF = 1.4 to 2.5 is, for example, 0.28, it is shown as a characteristic curve C in FIG. 6, and according to the present invention in this case. Comparing the error between the effective value detection and the conventional average value detection, (A) In the case of the effective value detection according to the present invention, Ix max = 1.207, Ix min = 1.156 (B) On the other hand, in the case of the average value detection, Ix max = 0.714, Ix min = 0.400 Therefore, the error is That is, according to the effective value detection of the present invention, the error of the output Ix is ± 2 with respect to the effective value of the input in the crest factor range of 1.4 to 2.5.
In contrast to the average value, the conventional average value detection causes an error of ± 28%, and the detection accuracy can be significantly improved as compared with the average value detection type.
上記試算例では、ｋ＝0.28の場合を示したが、波高率CF
の範囲に応じてｋ＝0.1〜1.0の範囲で上記IxmaxとIxmin
の差が小さくなるよう最適値に設定することによって、
上記試算例同様、従来に比し、極めて小さい誤差で検出
することができることは勿論である。In the above calculation example, the case of k = 0.28 was shown, but the crest factor CF
Ix max and Ix min in the range of k = 0.1 to 1.0 depending on the range of
By setting the optimum value so that the difference between
As in the case of the above trial calculation example, it is needless to say that the detection can be performed with an extremely small error as compared with the conventional case.
尚、上記実施例において、実効値検出回路６の出力部に
は高入力インピーダンスバッファに形成した演算増幅器
A1を設けるよう説明したが、平滑用コンデンサCsが大き
く、かつ抵抗Rc,Rdが小さい場合はこれを省略すること
ができる。In the above embodiment, the output of the effective value detection circuit 6 has an operational amplifier formed in a high input impedance buffer.
Although it has been described that A 1 is provided, this can be omitted when the smoothing capacitor Cs is large and the resistors Rc and Rd are small.
上述したように、本発明によれば、交流入力を全波整流
する整流回路の出力端に、充放電用抵抗と平滑用コンデ
ンサを直列に挿入し、上記充放電用抵抗の端子間に、ダ
イオードと充電用抵抗を直列に挿入して、交流入力の実
効値を検出するようにしてあるので、極めて簡単な回路
で、かつ極めて小形、安価に構成することができる。し
かも、波高率に応じて、上記充電用抵抗と充放電用抵抗
の比とを設定するようにしてあるので、交流入力の実効
値の検出精度を著しく向上させることができる。又、本
発明をUPS等の電源装置のコンデンサインプット形整流
回路を負荷としたものの出力電流検出回路に用いて過負
荷検出とした場合は、電源装置側の半導体デバイスの保
護を的確に行うことができる。さらに交流入力の実効値
を精度を高めて検出できるので、実効値メータにも応用
でき、サイリスタによる位相制御回路の電流検出回路に
用いれば、実効値電流制御を高精度で行うことができる
等、適用範囲を拡大して著しい効果を有するものであ
る。As described above, according to the present invention, the charging / discharging resistor and the smoothing capacitor are inserted in series at the output terminal of the rectifying circuit for full-wave rectifying the AC input, and the diode is provided between the terminals of the charging / discharging resistor. Since the charging resistor and the charging resistor are inserted in series to detect the effective value of the AC input, the circuit can be constructed with a very simple circuit, a very small size, and a low cost. Moreover, since the ratio of the charging resistance to the charging / discharging resistance is set according to the crest factor, the detection accuracy of the effective value of the AC input can be significantly improved. Further, when the present invention is used as an output current detection circuit of a capacitor input type rectifier circuit of a power supply device such as UPS as a load and overload detection is performed, the semiconductor device on the power supply device side can be accurately protected. it can. Furthermore, since the effective value of the AC input can be detected with higher accuracy, it can also be applied to an effective value meter, and if it is used in the current detection circuit of the phase control circuit using a thyristor, the effective value current control can be performed with high accuracy. It has a remarkable effect by expanding the application range.
第１図は本発明をUPSに適用した実施例を示すブロック
図、第２図は第１図の出力特性図、第３図は従来の平均
値検出回路を示すブロック図、第４図は波形説明図、第
５図は実効値に対する平均値の比と波高率の関係を示す
特性図、第６図は本発明の出力を入力の実効値に対する
出力の比と波高率の関係で示す特性図。 3:インバータ回路、6:実効値検出回路 REC:整流回路、Rd:充放電用抵抗 Rc:充電用抵抗、Cs:平滑用コンデンサFIG. 1 is a block diagram showing an embodiment in which the present invention is applied to a UPS, FIG. 2 is an output characteristic diagram of FIG. 1, FIG. 3 is a block diagram showing a conventional average value detection circuit, and FIG. 4 is a waveform. Explanatory diagram, FIG. 5 is a characteristic diagram showing the relationship between the average value ratio to the effective value and the crest factor, and FIG. 6 is a characteristic diagram showing the output of the present invention as the relationship between the output ratio to the input effective value and the crest factor. . 3: Inverter circuit, 6: Effective value detection circuit REC: Rectifier circuit, Rd: Charging / discharging resistor Rc: Charging resistor, Cs: Smoothing capacitor
Claims (1)
に、充放電用抵抗と平滑用コンデンサとを直列に挿入
し、充放電用抵抗の端子間にダイオードと充電用抵抗を
直列に挿入し、波高率に応じて上記充電用抵抗と充放電
用抵抗の比とを設定して、上記平滑用コンデンサから交
流入力の実効値を近似した直流出力で送出するようにし
たことを特徴とする実効値検出回路。1. A charging / discharging resistor and a smoothing capacitor are inserted in series at an output end of a rectifying circuit for full-wave rectifying an AC input, and a diode and a charging resistor are connected in series between terminals of the charging / discharging resistor. It is characterized in that the charging resistance and the charging / discharging resistance ratio are set in accordance with the crest factor, and the smoothing capacitor sends out the effective value of the AC input as a DC output that approximates the effective value. Effective value detection circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62075580A JPH0786784B2 (en) | 1987-03-27 | 1987-03-27 | RMS detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62075580A JPH0786784B2 (en) | 1987-03-27 | 1987-03-27 | RMS detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63240608A JPS63240608A (en) | 1988-10-06 |
| JPH0786784B2 true JPH0786784B2 (en) | 1995-09-20 |
Family
ID=13580271
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62075580A Expired - Fee Related JPH0786784B2 (en) | 1987-03-27 | 1987-03-27 | RMS detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0786784B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10886859B2 (en) | 2016-04-13 | 2021-01-05 | Rohm Co., Ltd. | Alternating-current power supply device with windings wound in different directions |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS627567A (en) * | 1985-07-03 | 1987-01-14 | Sony Corp | Thermal head |
-
1987
- 1987-03-27 JP JP62075580A patent/JPH0786784B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10886859B2 (en) | 2016-04-13 | 2021-01-05 | Rohm Co., Ltd. | Alternating-current power supply device with windings wound in different directions |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63240608A (en) | 1988-10-06 |
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