JPH0786453A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0786453A JPH0786453A JP5232112A JP23211293A JPH0786453A JP H0786453 A JPH0786453 A JP H0786453A JP 5232112 A JP5232112 A JP 5232112A JP 23211293 A JP23211293 A JP 23211293A JP H0786453 A JPH0786453 A JP H0786453A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- resin
- holes
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
Landscapes
- Structure Of Printed Boards (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は２層構造のインテリジ
ェントパワーモジュールに係わり、特にプリント配線基
板の構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a two-layer intelligent power module, and more particularly to a printed wiring board structure.
【０００２】[0002]
【従来の技術】図２に基づいて説明する。図２は従来例
を示す構成図であり、（ａ）は樹脂部を除いた平面図、
（ｂ）はＢ−Ｂ線断面図である。金属ベース１ａの上面
に複数個の半導体チップ２を絶縁板を介してはんだ等で
固着し、その上層部に制御回路基板３（以下制御回路基
板とは図示しない電子部品を実装しているものを称す）
を配置し、この制御回路基板３と半導体チップ２との間
の配線をし、その後シリコーン系ゲル状樹脂あるいはそ
れに類するゲル状樹脂を樹脂注入孔６より注入してい
る。金属ベース１ａの上面と制御回路基板３との間に樹
脂が十分充填した後に、さらに制御回路基板３の全面が
埋没するまでシリコーン系ゲル状樹脂を注入し、その後
１２０℃で２時間加熱し樹脂を硬化している。なお金属
ベース１ａは半導体チップ２あるいは制御回路基板３よ
り発生する熱の放熱をする役目もしている。2. Description of the Related Art A description will be given with reference to FIG. FIG. 2 is a configuration diagram showing a conventional example, (a) is a plan view excluding a resin portion,
(B) is a BB line sectional view. A plurality of semiconductor chips 2 are fixed to the upper surface of the metal base 1a with solder or the like through an insulating plate, and a control circuit board 3 (hereinafter, a control circuit board on which electronic components not shown are mounted is mounted on the upper layer portion thereof). Name)
Is arranged, wiring is provided between the control circuit board 3 and the semiconductor chip 2, and then a silicone gel resin or a gel resin similar thereto is injected from the resin injection hole 6. After the resin is sufficiently filled between the upper surface of the metal base 1a and the control circuit board 3, a silicone gel resin is further injected until the entire surface of the control circuit board 3 is buried, and then the resin is heated at 120 ° C. for 2 hours. Has been cured. The metal base 1a also has a role of radiating heat generated from the semiconductor chip 2 or the control circuit board 3.
【０００３】[0003]
【発明が解決しようとする課題】前述の方法によれば、
金属ベースの上面と制御回路基板との間に樹脂が充填さ
れる時に空気の逃げ場がなく、図２に示すように制御回
路基板下部に空洞が発生し熱伝導率の悪い空気が残るた
め、制御回路基板より発生する熱の放熱が十分行われな
いという問題が発生している。According to the method described above,
When the resin is filled between the upper surface of the metal base and the control circuit board, there is no escape area for the air, and as shown in FIG. 2, a cavity is generated under the control circuit board and air with poor thermal conductivity remains, so that the control is performed. There is a problem that heat generated from the circuit board is not sufficiently dissipated.
【０００４】この発明は前記の問題点に鑑みてなされた
ものであり、その目的は制御回路基板下部に空洞が発生
しない半導体装置を提供することにある。The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device in which no cavity is formed under the control circuit board.
【０００５】[0005]
【課題を解決するための手段】この発明によれば前述の
目的は、半導体装置に用いるプリント配線基板に複数個
の貫通孔を設け、ケース側面の内周部とプリント配線基
板の外周部が対向する多辺のうち少なくとも一か所の辺
に、全面にわたり樹脂注入部を形成し、前記貫通孔はプ
リント配線基板製作時に形成することにより達成され
る。According to the present invention, the above-mentioned object is to provide a plurality of through holes in a printed wiring board used for a semiconductor device, and an inner peripheral portion of a side surface of the case and an outer peripheral portion of the printed wiring board are opposed to each other. This is achieved by forming a resin injection portion over the entire surface at least at one side of the multiple sides, and forming the through hole at the time of manufacturing the printed wiring board.
【０００６】[0006]
【作用】この発明の構成によれば、プリント配線基板に
複数個の貫通孔を設けたため、シリコーン系ゲル状樹脂
を注入する場合空気がこの貫通孔から容易に逃げれるた
め空洞が発生しない。また近年マウントチップによる電
子部品の種類が多くなりかつ小型化されているので、プ
リント配線基板の実装密度が高まりプリント配線基板の
形状を小さくすることができ、このためにケース側面の
内周部とプリント配線基板の外周部が対向する多辺のう
ち少なくとも一か所の辺に、全面にわたり樹脂注入部を
形成することが可能になり、また貫通孔を設ける余裕も
できる。According to the structure of the present invention, since the printed wiring board is provided with a plurality of through holes, air is easily escaped from the through holes when the silicone gel resin is injected, so that no cavity is generated. In addition, since the number of types of electronic components by mounting chips has increased and the size has been reduced in recent years, the mounting density of the printed wiring board can be increased and the shape of the printed wiring board can be made smaller. It is possible to form a resin injection portion over the entire surface on at least one side of the multiple sides facing the outer peripheral portion of the printed wiring board, and it is also possible to provide a through hole.
【０００７】さらに貫通孔はプリント配線基板製作時に
形成することにより、実装作業に悪影響を与えることが
ない。Further, since the through hole is formed at the time of manufacturing the printed wiring board, the mounting work is not adversely affected.
【０００８】[0008]
【実施例】図１に基づいて説明する。図１はこの実施例
を示す構成図であり、（ａ）は樹脂部を除いた平面図、
（ｂ）はＡ−Ａ線断面図である。なお従来例と同一機能
要素のものには同一符号を付してある。また従来例と同
様な部分については説明を省略してある。EXAMPLE An explanation will be given with reference to FIG. FIG. 1 is a configuration diagram showing this embodiment, (a) is a plan view excluding a resin portion,
(B) is the sectional view on the AA line. The same functional elements as those in the conventional example are designated by the same reference numerals. The description of the same parts as those of the conventional example is omitted.
【０００９】この実施例では、インテリジェントパワー
モジュールの平面寸法が８０×１００ｍｍ角のもので、
プリント配線基板３ａには１．５×４ｍｍ角の貫通孔７
を１１箇所に形成した。貫通孔７の形成数はプリント配
線基板３ａの大きさにより、増減することが必要であ
る。この貫通孔７の形状はこの場合長方形としたが、電
子部品の実装に影響のない範囲で、円形、楕円形等どん
な形状でもよい。In this embodiment, the plane dimension of the intelligent power module is 80 × 100 mm square,
The printed wiring board 3a has through holes 7 of 1.5 × 4 mm square.
Were formed at 11 locations. It is necessary to increase or decrease the number of through holes 7 to be formed depending on the size of the printed wiring board 3a. The shape of the through hole 7 is rectangular in this case, but any shape such as circular or elliptical may be used as long as the mounting of electronic components is not affected.
【００１０】また図１（ａ）に示すように、樹脂注入部
８の巾は１０ｍｍ以上で長さ方向全面に設けることがで
きた。このことにより常温で粘度が高いシリコーン系ゲ
ル状樹脂あるいはそれに類するゲル状樹脂であっても、
図示しない樹脂注入ノズルを広範囲に移動可能なため、
均一に短時間で樹脂の充填ができる。なおこの構成のも
のを製作し、検査した結果空洞が発生しているものがな
いことを確認している。Further, as shown in FIG. 1 (a), the width of the resin injection portion 8 was 10 mm or more, and the resin injection portion 8 could be provided over the entire length direction. As a result, even if the silicone-based gel-like resin or a gel-like resin having a high viscosity at room temperature is used,
Since the resin injection nozzle (not shown) can be moved over a wide range,
Resin can be uniformly filled in a short time. It should be noted that this structure was manufactured and the result of the inspection confirmed that there were no cavities.
【００１１】[0011]
【発明の効果】この発明によれば、半導体装置に用いら
れるプリント配線基板に複数個の貫通孔を設けたため、
シリコーン系ゲル状樹脂を注入する場合空気がこの貫通
孔から容易に逃げれるため空洞が発生せず、熱伝導率が
よくなり制御回路基板より発生する熱が容易に放熱す
る。また樹脂注入部を大きく形成することにより図示し
ない樹脂注入ノズルを広範囲に移動可能なため、均一に
短時間で樹脂の充填ができる。さらに貫通孔はプリント
配線基板製作時に形成することにより、実装作業に悪影
響を与えることがない。According to the present invention, since a plurality of through holes are provided in the printed wiring board used in the semiconductor device,
When the silicone gel-like resin is injected, air easily escapes from the through holes, so that no cavity is generated, the thermal conductivity is improved, and the heat generated from the control circuit board is easily radiated. Further, since the resin injection nozzle (not shown) can be moved over a wide range by forming the resin injection portion large, it is possible to uniformly and uniformly fill the resin in a short time. Further, since the through holes are formed when the printed wiring board is manufactured, the mounting work is not adversely affected.
【図１】この実施例を示す構成図であり、（ａ）は樹脂
部を除いた平面図、（ｂ）はＡ−Ａ線断面図1A and 1B are configuration diagrams showing this embodiment, FIG. 1A is a plan view excluding a resin portion, and FIG. 1B is a sectional view taken along line AA.
【図２】従来例を示す構成図であり、（ａ）は樹脂部を
除いた平面図、（ｂ）はＢ−Ｂ線断面図2A and 2B are configuration diagrams showing a conventional example, FIG. 2A is a plan view excluding a resin portion, and FIG. 2B is a sectional view taken along line BB.
１ ケース １ａ 金属ベース １ｂ ケース側面 ２ 半導体チップ ３ 制御回路基板（図示しない電子部品を実装したも
のを称す） ３ａ プリント配線基板 ４ 空洞 ５ ゲル状樹脂 ６ 樹脂注入孔 ７ 貫通孔 ８ 樹脂注入部DESCRIPTION OF SYMBOLS 1 case 1a metal base 1b case side surface 2 semiconductor chip 3 control circuit board (referred to as electronic components not shown) 3a printed wiring board 4 cavity 5 gel resin 6 resin injection hole 7 through hole 8 resin injection portion
Claims (3)
成したケースの金属ベース上面に半導体チップを搭載
し、その上層部に制御回路を有するプリント配線基板を
備える２層構造のパワーモジュールにゲル状樹脂を充填
するものにおいて、前記プリント配線基板に複数個の貫
通孔を設けたことを特徴とする半導体装置。1. A gel for a two-layer structure power module comprising a semiconductor chip mounted on the upper surface of a metal base of a case having side surfaces made of resin formed on the outer periphery of the metal base, and a printed wiring board having a control circuit on the upper layer thereof. A semiconductor device in which a plurality of through-holes are provided in the printed wiring board, which is filled with a resin.
プリント配線基板の外周部とが対向する多辺のうち少な
くとも一か所の辺に、全面にわたり樹脂注入部を形成さ
せたことを特徴とする半導体装置。2. A resin injecting portion is formed over the entire surface of at least one of the sides where the inner peripheral portion of the side surface of the case and the outer peripheral portion of the printed wiring board face each other according to claim 1. A semiconductor device characterized by:
はプリント配線基板製作時に形成したことを特徴とする
半導体装置。3. The semiconductor device according to claim 1, wherein the through hole is formed when a printed wiring board is manufactured.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5232112A JP3013666B2 (en) | 1993-09-20 | 1993-09-20 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5232112A JP3013666B2 (en) | 1993-09-20 | 1993-09-20 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0786453A true JPH0786453A (en) | 1995-03-31 |
| JP3013666B2 JP3013666B2 (en) | 2000-02-28 |
Family
ID=16934199
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5232112A Expired - Lifetime JP3013666B2 (en) | 1993-09-20 | 1993-09-20 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3013666B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1355351A1 (en) * | 2001-01-23 | 2003-10-22 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
| JP2020188120A (en) * | 2019-05-14 | 2020-11-19 | 三菱電機株式会社 | Power conversion device and method of manufacturing the same |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04171969A (en) * | 1990-11-06 | 1992-06-19 | Fujitsu Ltd | Structure and method for resin sealing of mounted ic chip |
| JPH04354354A (en) * | 1991-05-31 | 1992-12-08 | Nippondenso Co Ltd | Electronic device |
-
1993
- 1993-09-20 JP JP5232112A patent/JP3013666B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04171969A (en) * | 1990-11-06 | 1992-06-19 | Fujitsu Ltd | Structure and method for resin sealing of mounted ic chip |
| JPH04354354A (en) * | 1991-05-31 | 1992-12-08 | Nippondenso Co Ltd | Electronic device |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1355351A1 (en) * | 2001-01-23 | 2003-10-22 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
| EP1355351A4 (en) * | 2001-01-23 | 2009-08-19 | Mitsubishi Electric Corp | Semiconductor device |
| JP2020188120A (en) * | 2019-05-14 | 2020-11-19 | 三菱電機株式会社 | Power conversion device and method of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3013666B2 (en) | 2000-02-28 |
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