JPH0783611B2 - Power converter control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial field of application) The present invention relates to a control device for a power converter that supplies AC power of variable voltage and variable frequency to an AC motor or the like.

(Prior Art) A self-extinguishing element such as a GTO (gate turn-off thyristor) is used as a power converter that supplies variable-voltage variable-frequency AC power to a large-capacity AC motor (induction motor, synchronous motor, or linear motor). The previously used voltage-type pulse-width modulation control inverter (called PWM inverter) has come into practical use.

Fig. 6 shows a power conversion device that combines a multiple PWM inverter with an output transformer and a PWM inverter without output transformer (directly connected PWM inverter).

In the figure, Vd is a DC voltage source, INV-1 to INV-4 are multiple PWM inverters, INV-5 is a direct PWM inverter, TR _{1 to} TR ₄ are output transformers, and LOAD is an AC load (U phase).

FIG. 7 shows a concrete structure of the PWM inverter INV-1 shown in FIG. 6, which is composed of self-extinguishing elements S _{11 to} S ₁₄ and free wheeling diodes D _{11 to} D _14. ing.

FIG. 8 is a time chart diagram for explaining the PWM control operation of the inverter of FIG.

X ₁ and Y ₁ are PWM-controlled carrier signals, and Y ₁ is the inverted value of X ₁ (or a signal with a 180 ° phase shift). Control input signals e ₁ and X ₁ are compared, and elements S ₁₁ and S of inverter INV-1 are compared.
_{Producing 12} gate signals g ₁ . That, e ₁ X ₁ when g ₁ = 1 at S _11: ON, S _12: Off e ₁ <in g ₁ = 0 when X ₁ S _11: Off, S _12: turned on. Also, compare e ₁ and Y ₁ to compare the gate signals of elements S ₁₃ and S ₁₄ .
making g ₁ ′. That, e ₁ Y ₁ when g ₁ '= 1 at S _13: Off, S _14: On e ₁ <g ₁ when Y _1' in = 0 S _13: ON, S _14: turned off.

If the output voltage V ₁ of the inverter INV-1 is taken as 1 the primary / secondary turns ratio of the transformer TR _1, when S ₁₁ and S ₁₄ are V ₁ = + Vd S ₁₂ and S ₁₃ when on is on V ₁ = -Vd V ₁ = 0 next time the other modes, the lowermost waveform of Figure 8 is obtained. The average value
₁ (indicated by a broken line) has a value proportional to the above-mentioned control input signal e ₁ .

In this way, the output voltage V ₁ of the inverter INV-1 is controlled at a frequency twice the carrier frequency of PWM control.

The other three PWM inverters INV-2 to INV-4 are also controlled in the same manner, but the carrier signals X _{2 to} X ₄ are used by shifting the phase by 45 ° in terms of electrical angle (Y ₂ ~ Y ₄ is the inverted value of X ₂ ~ X ₄ , respectively). As a result, the output transformer TR ₁ voltage sum _{V 1 + V 2 + V 3} + V 4 that occur through to Tr ₄ becomes a multiplexed voltage, with respect to the carrier frequency fc of the PWM control, 8 · fc
The voltage waveform is controlled by. Therefore, the output voltage V ₁ + V ₂
At + V ₃ + V ₄ , low-order harmonic components due to PWM control are canceled out, and only high-order harmonics appear. This higher order harmonic component can be easily removed by a filter such as a reactor.

On the other hand, the direct connection inverter INV-5 has a structure as shown in FIG. It shows the U-phase component of the 3-phase GREATS connection.
Self-extinguishing elements S ₅₁ and S ₅₂ and freewheeling diode
It is composed of D _51, D _52. The neutral line of the load is a DC voltage
Connected to the middle line of Vd.

FIG. 10 is a time chart diagram for explaining the PWM control operation of the inverter INV-5. The carrier signal X ₅ and the control input signal e ₅ are compared to _generate the gate signal g ₅ of the elements S ₅₁ and S ₅₂ . That, g ₅ = 1 at S ₁₁ when the e ₅ X _5: ON, S _52: Off e ₅ <S in g ₅ = -1 when X _{5 51:} OFF, S _52: turned on.

V ₅ = when _{V 5 = + (Vd / 2} ) S 52 when the output voltage V ₅ is S ₅₁ of the inverter INV-5 is on the on - a (Vd / 2). The average value ₅ is a value proportional to the control input signal e ₅ . Thus, the output voltage V ₅ of the inverter INV- ₅ is
It will be controlled by the carrier frequency of WM control.

The power converter shown in FIG. 6 is used for supplying electric power of variable voltage and variable frequency to an AC load.

When the output frequency is zero or very low, it is difficult to generate a voltage via the output transformer. Therefore, the voltage V ₅ is generated from the direct-coupled inverter INV-5 at the lowest stage up to the minimum frequency f _{min at} which the transformer can operate, and the multiple inverters INV-1 to INV- are provided in the region where the output frequency f ₀ is f ₀ > f _min. Operate 4. At this time, the output voltages V _{1 to} V ₄ are controlled so that the voltage / frequency ratio is almost constant so that the iron cores of the output transformers TR _{1 to} TP ₄ are not saturated.

A voltage V _U = V ₁ + V ₂ + V ₃ + V ₄ + V ₅ is applied to the load U. Multiple PW if the load requires higher voltage
It is only necessary to increase the number of serial stages of the M inverter, which has the advantage that the high voltage and capacity of the power converter can be easily increased.

(Problems to be Solved by the Invention) The conventional power conversion device described above has the following problems.

That is, the output voltage V ₁ generated from the multiple PWM inverter
+ V ₂ + V ₃ + V ₄ can be a sine wave voltage with little distortion, but since the direct-coupled inverter cannot be multiplexed for PWM control, there is a drawback that the waveform distortion of its output voltage V ₅ becomes large. Especially in the region where the output frequency f ₀ is low,
Since the inverter is operated only by the direct-coupled inverter, the current supplied to the AC load LOAD contains a large amount of pulsation, which causes torque pulsation in the case of a motor load.

Directly connected inverter INV-5 carrier frequency multiplex inverter I
If the carrier frequency of NV-1 to INV-4 is increased to about 8 times, the voltage distortion is also reduced, and a balanced current conversion device can be obtained as a whole. However, the switching frequency of GTO (gate turn-off thyristor), which is a typical current self-extinguishing element, is limited to about 500 Hz at most, and it is impossible to increase the carrier frequency of the direct-connection inverter INV-5.

Also, as the power converter becomes higher in voltage and capacity. Series connection of the elements that make up the inverter becomes essential,
In order to reduce switching loss and snubber circuit loss, it is desirable to operate with the carrier frequency as low as possible.

The present invention has been made in view of the above problems, and a power conversion device that can always supply a sine wave current with less distortion to an AC load regardless of whether the output frequency is high or low without increasing the carrier frequency of the direct connection inverter. An object is to provide a control device.

[Structure of Invention]

(Means for Solving the Problems) In order to achieve the above object, the present invention provides an output voltage of a multiple PWM inverter having an output transformer for an AC load,
In a power converter that supplies the sum of the output voltage of a direct-coupled PWM inverter without an output transformer, the multiplex PWM inverter is a deviation signal between a command value of the primary current of the output transformer and its detection value, or the output transformer. Current control compensating circuit to which a deviation signal between the command value of the exciting current and its detection value is applied, the output signal of the current control circuit, and the addition value of the signal proportional to the output frequency as the control input signal. P on the multiple PWM inverter side that compares the input signal with the carrier wave and outputs the gate signal
The WM control circuit and the direct connection PWM inverter have a current control compensation circuit on the direct connection PWM inverter side to which a deviation signal between the load current command value and the detected value is applied, and at least a current control compensation on the direct connection PWM inverter side. The output signal of the circuit is used as the control input signal and is directly connected to the control input signal.
PWM control circuit on the direct PWM inverter side that compares the carrier wave on the PWM inverter side and outputs a gate signal, and the pulsating component of the output voltage generated by the direct PWM inverter, the control input signal on the direct PWM inverter side, and the direct PWM inverter It is equipped with means for calculating from the output gate signal of the PWM control circuit on the side, and the pulsating component of the output voltage calculated by the calculation is multiplexed.
It is characterized in that it is added to the control input signal on the side of the PWM inverter so that the pulsating component of the output voltage generated by the direct PWM inverter is canceled on the side of the multiple PWM inverter.

(Operation) That is, when the PWM control input signal e _{i of} the direct connection inverter is compared with the carrier wave signal X and the gate signal g is obtained, the gate signal g (takes a value of “1” or “−1”) is obtained. By multiplying the _peak value E _max of the carrier signal X and further subtracting the input signal e _i , the pulsating component (harmonic component) of the voltage generated by the direct connection inverter is obtained, and the inverted value of the harmonic component is multiplexed. Compensation control is performed so that it is generated from the PWM inverter.

As a result, the multiplex PWM inverter will always operate regardless of whether the output frequency is high or low, and it will be superimposed on the fundamental wave voltage that is proportional to the output frequency, and the inverted value of the harmonic component generated by the direct connection inverter will be output. Like Therefore,
The pulsation of the output voltage due to the PWM control of the direct connection inverter is canceled, and it becomes possible to supply a sinusoidal current without distortion to the AC load.

As described above, according to the control device for a power conversion device of the present invention, a sinusoidal current without distortion can be supplied to an AC load without increasing the carrier frequency of the direct connection inverter. Further, even if the carrier frequency of the direct connection inverter is lowered, the same effect can be obtained, and the switching loss and the snubber circuit loss can be reduced.

(Embodiment) FIG. 1 is a configuration diagram showing an embodiment of a control circuit of a power converter according to the present invention. Refer to FIG. 6 for the main body of the power converter.

In FIG. 1, A _{1 to} A ₈ are adders, C _{1 to} C ₅ are comparators, and G _{1 is}
~ G ₄ and G _L are current control compensation circuits, PWM _{1 to} PWM ₅ are pulse width modulation control circuits, TRG ₁ and TRG ₂ are carrier wave generators, and Kn ₁ , Kn ₂ and K _H are proportional amplifiers. Note that CT ₁ to CT _{5 in} FIG. 6 are current detectors. The control operation of the device of the present invention will be described below with reference to FIGS. 1 and 6.

The load current I _U is controlled by the direct connection inverter INV-5.

That is, the input to the comparator C ₅ detects the load current I _U by the current detector CT _5. With the comparator C ₅ , the load current command value ▲ I
^* _U ▼ is compared with the above detection value I _U , and the deviation ε _U = ▲ I ^* _U ▼
− Calculate I _U. The deviation ε _U is calculated by the following current control compensation circuit
Amplified by G _L and connected directly via adder A _S
The input signal e ₅ is given to the pulse width modulation control circuit PWM ₅ of INV-5. Directly connected inverter INV-5 has a voltage proportional to the input signal e _5. Is generated as described above.

▲ For I ^* _U ▼> I _U, the deviation epsilon _U becomes a positive value, direct inverter INV-5 increases the output voltage V ₅ of the load current I _U Increase I _U ≒ ▲ I ^* _U ▼ become so Controlled by. Conversely, ▲ I ^* _U
When ▼ <I _U , the deviation ε _U becomes a negative value, and the output voltage V ₅ is reduced and the load current I _U is reduced. Therefore, I _U
≒ ▲ I ^* _U ▼ becomes calm. If the current command value I _U is changed in a sine wave shape, the actual current I _U is also controlled to follow the sine wave.

The direct-coupled inverter INV-5 basically generates the voltage R _L · I _{U corresponding} to the voltage drop due to the load resistance K _L. Therefore, a signal obtained by multiplying the current command value ▲ I ^* _U ▼ by the load resistance _RL is added to the adder A _S. The input signal e ₅ of PWM ₅ is expressed by the following equation.

e ₅ = R _L · ▲ I ^* _U ▼ + ε _U · _GL (1) That is, the direct-coupled inverter INV-5 always generates a voltage drop due to the load resistance, and in addition to it, it depends on the current deviation ε _U. Voltage is generated to control the load current. Since the voltage drop due to the resistance does not depend on the output frequency f ₀ , f ₀ =
When it is 0, multiple inverters INV-1 ~ I with output transformers
No voltage can be generated from NV-4, and it is necessary to supply it from a direct-connected inverter.

The multiple PWM inverters INV-1 to INV-4 generate a voltage proportional to the output frequency f ₀ .

That is, in the case of a motor load, the sum of the voltage of the counter electromotive force V _{CU and} the voltage drop jωL _L · I _U due to the load-side inductance L _L is supplied.

In FIG. 1, the compensation signal ▲ V ^* _CU ▼ + jωL _L obtained by the counter electromotive force compensation value ▲ V ^* _CU ▼ and the load current command value ▲ I ^* _U ▼
・ ▲ I ^* _U ▼ is input via the proportional amplifier K _N1 , the adder A ₆ and the adder A ₂ to the input signal e ₁ of the PWM control circuit PWM ₁ of the inverter INV- ₁
give. Similarly, the input signals e _{2 to} e ₄ of PWM ₂ to PWM ₄ are also given. For convenience of explanation, assuming that other signals are zero, e ₁ = e ₂ = e ₃ = e ₄ = (▲ V ^* _CU ▼ + jωL _L・ ▲ I ^* _U ▼) / n (2) ω = 2π · f ₀ , n = 4. n is the number of stages of the inverters forming the multiple inverter, and in this case, there are four stages.

As a result, the output voltage V ₁ + V ₂ + V ₃ + V ₄ of the multiple inverter becomes a voltage proportional to the sum of the above input signals e _{1 to} e ₄ , and ▲ V ^* _CU
A voltage proportional to ▼ + jωL _L ▲ I ^* _U ▼) is generated. The back electromotive force ▲ V ^* _CU ▼ has a value proportional to the output frequency f ₀ , and the second term jωL _L ▲ I ^* _U ▼ is also proportional to f ₀ .
Therefore, the output voltage V ₁ + V ₂ + V ₃ + V ₄ of the multiplex inverter becomes a value proportional to the output frequency f ₀ , and the effective values of the exciting currents I _{OU1 to} I _OU4 of the output transformers TR _{1 to} TR ₄ are almost constant.

However, in actuality, a slight DC bias or the like may be applied to the output transformer due to the drift of the control circuit or the imbalance of the switching characteristics of the elements. When a bias of DC voltage is applied to the transformer, the transformer is gradually demagnetized, and eventually the iron core is saturated and an excessive exciting current flows to the transformer, which not only burns the transformer but also the inverter. In some cases, the element that constitutes the element is destroyed by an overcurrent.

Therefore, in the embodiment shown in FIG. 1, the four inverters INV-1 to INV-4 constituting the multiple PWM inverter control the primary currents I _{U1 to} I _U4 of the respective output transformers. Inverter IN
The control operation of the primary current I _U1 for V-1 will be described below.

First, the primary current I _U1 of the transformer TR ₁ is detected by the current detector CT _1.
Is detected and input to the comparator C ₁ . In the comparator C ₁ , the primary current command value ▲ I ^* _U1 ▼ is compared with the current detection value I _U1 and the deviation ε
₁ = ▲ I ^* _U1 ▼ -I _U1 is calculated. The deviation ε ₁ is amplified by the following current control compensation circuit G _{1 and} is added to PW via the adder A _2.
Input signal e ₁ to M control circuit PWM ₁ . Therefore, e in equation (2)
₁ can be rewritten as

e ₁ = (▲ V ^* _CU ▼ + jωL _L・ ▲ I ^* _U ▼) / 4 + ε ₁・ ε ₁ …… (3) Command value of primary current ▲ I ^* _U1 ▼ is command value of load current ▲
I ^* _U ▼ and transformer TR ₁ excitation current I _OU1 command value ▲ I ^* _OU ▼
It is given as the sum of ₁ . If four transformers have the same capacity and rating, ▲ I ^* _OU1 ▼ ＝ ▲ I ^* _OU2 ▼ ＝ ▲ I ^* _OU3 ▼ ＝ ▲ I ^*
_OU4 ▼ ＝ ▲ I ^* _OU ▼. Therefore, ▲ I ^* _U1 ▼ ＝ ▲ I ^* _U ▼ ＋ ▲ I ^* _OU ▼ ＝＝ I ^* _U2 ▼ ＝ ▲ I ^* _U3 ▼ ＝ ▲ I ^* _U4 ▼ ………… (4).

When ▲ I ^* _U1 ▼> I _U1 , the deviation ε ₁ has a positive value, the input signal e _{1 of the} equation (3) is increased, the primary current I _U1 is increased, and I _U1 ≈ ▲ I ^* _U1 Control so that it becomes ▼. At this time, the load current I _U is I _U ≈ ▲ I ^* by the direct connection inverter INV-5
Since it is controlled to _U ▼, as a result, the exciting current I _OU1 of the transformer TR ₁ is controlled to match the above-mentioned command value ▲ I ^* _OU ▼.

On the contrary, when ▲ I ^* _U1 ▼ <I _U1 , the deviation ε ₁ becomes a negative value and the input signal e ₁ , that is, the output voltage of the inverter INV-1 is decreased, and I _U1 ≈ ▲ I ^* _U1 ▼ again. Control so that.

In this way, the primary current I _U1 of the transformer TR ₁ is the command value ▲ I ^*
Controlled to match _U1 ▼, resulting in transformer TR ₁
Also, the exciting current I _OU1 of becomes to match the command value ▲ I ^* _OU ▼. Excitation current I _OU1 ≈ ▲ I ^* _OU ▼ even when a DC bias is applied to transformer TR ₁ due to element imbalance, etc.
Therefore, the control system operates so as to finally cancel the DC bias.

The other inverters INV-2 to INV-4 are controlled similarly.

As described above, the multiple PWM inverter is basically a voltage drop j due to the back electromotive force V _CU and the load side inductance L _L.
It is necessary to generate the sum voltage of ω _{L L} I _U. Therefore, it is necessary to adjust the exciting currents I _{OU1 to} I _{OU4 of} the transformers TR _{1 to} TR ₄ to a value corresponding to it. When the mutual inductance at the rated output of each transformer is M, the command value ▲ I ^* _OU ▼ of the exciting current input to the adder A ₁ is given by the following equation.

In this way, it is possible to control the load current I _U so as to match the command value ▲ I ^* _U ▼ without the output transformers TR _{1 to} TR ₄ being biased.

However, as it is, the pulsation of the load current I _U associated with the PWM control of the direct-coupled inverter, which has been a problem in the past, cannot be reduced.

Therefore, in the embodiment of FIG. 1, the pulsating component ΔV ₅ of the voltage V ₅ generated by the inverter INV-5 is predicted and calculated from the PWM control input signal e ₅ of the direct connection inverter and the output signal g ₅ of the PWM control circuit PWM _5. Then, the inverted value −ΔV ₅ is controlled to be generated from the multiple PWM inverter.

This will be described with reference to the PWM control operation explanatory diagram of FIG.

The gate signal g ₅ is generated by comparing the carrier wave signal X _{5 of} PWM control with the input signal e ₅ .

When e ₅ X ₅ , g ₅ = + 1, and when e ₅ <X ₅ , g ₅ = −1. When the gate signal g ₅ = + 1, the element S ₅₁ is on and S
₅₂ is turned off and V ₅ = + (Vd / 2). When the gate signal g ₅ = -1, the element S ₅₁ is off and S ₅₂ is on,
V ₅ =-(Vd / 2). As a result, ₅ shown by the broken line has a value proportional to the input signal e ₅ . Direct drive inverter INV-5
There ripple component of the voltage V ₅ that occurs, [Delta] V ₅ = V ₅ - a _5.
Replacing this with the level of the PWM control input signal e ₅ gives the following.

When the peak values of the carrier signals X _{1 to} X ₅ are E _max , the gate signal g ₅ is multiplied by E _max by the proportional amplifier K _H. Then K _H
Output g ₅ · E _max of becomes a voltage proportional to the output voltage V _5, Subtracting input signal e ₅ in proportion to ₅ from that _{value, Δe 5 = g 5 · E} max -e 5 αΔV 5 ...... ( 6) is obtained. The output of the adder A ₇ becomes the inverted value of the expression (6), and is multiplied by (1 / 2n) by the proportional amplifier K _N2 to obtain the compensation control signal ▲ H ^* _OU ▼.

▲ H ^* _OU ▼ ＝ − (g ₅ · E _max −e ₅ ) / (2n) …… (7) Adder A ₆ and adder A _{2 to} A ₅
When the compensation control signal ▲ H ^* _OU ▼ is added to the control input circuits e _{1 to} e ₄ , a voltage proportional to ▲ H ^* _OU ▼ in equation (7) is applied to the inverter.
INV-1 to INV-4 will be generated. Here, for convenience of explanation, it is assumed that other signals are zero.

In Fig. ₂ , multiple PW when e ₁ = e ₂ = e ₃ = e ₄ = ▲ H ^* _OU ▼
The operation explanatory view of the M inverter is shown.

X _{1 to} X ₄ and Y _{1 to} Y ₄ represent PWM controlled carrier signals of the inverters INV- _{1 to} INV-4. Y ₁ to Y ₄ are each X ₁ to X X ₁ in the inverted value (180 ° signal phase-shifted) of _{4, X 2, X 3,} X 4 phase respectively by an electrical angle of 45 ° is shifted.

The main circuit configuration of the inverter INV-1 is as shown in FIG. 7 as described above.

The input control signal ▲ H ^* _OU ▼ is compared with the carrier wave (triangular wave) X ₁ to generate the gate signal g ₁ and the elements S ₁₁ and S ₁₂ of the inverter INV-1 are controlled to fire. That is, when ▲ H ^* _OU ▼ X ₁ , g ₁ = “1”, S ₁₁ : on, S ₁₂ : Off When ▲ H ^* _OU ▼ <X ₁ , g ₁ = “0”, S ₁₁ : off , S ₁₂ : on. Further, ▲ H ^* _OU ▼ is compared with Y ₁ to generate a gate signal g ₁ ′, and the elements S ₁₃ and S ₁₄ are controlled to fire. That is, when ▲ H ^* _OU ▼ Y ₁ , g ₁ ′ = “1”, and when S ₁₃ : off, S ₁₄ : on ▲ H ^* _OU ▼ <Y ₁ , g ₁ ′ = “0” and S ₁₃ : on, S ₁₄ : off. As a result, the output voltage V ₁ of the inverter INV- ₁ is S
₁₁ and S ₁₄ are turned on when V ₁ = + Vd, V ₁ when S ₁₂ and S ₁₃ is on
= -Vd, a waveform as shown in FIG. 2 becomes V ₁ = 0 in other modes.

Similarly, compare the input control signal ▲ H ^* _OU ▼ with the triangular waves X ₂ and Y ₂ ,
Make the gate signals g ₂ and g ₂ ′ of the inverter INV-2 ▲ H ^* _OU ▼
And X ₃ and Y ₃ are compared, and the gate signals g ₃ and g of the inverter INV-3 are compared.
Make ₃ ', compare ▲ H ^* _OU ▼ with X ₄ and Y ₄ , and use inverter INV
Generate gate signals g ₄ and g ₄ ′ of -4.

As a result, the output voltages V _{2 to} V ₄ of the inverters INV-2 to INV- ₄ are as shown in the figure.

The sum of the output voltages V _{1 to} V ₄ of the inverters INV-1 to INV- ₄ is the second
The waveform is as shown at the bottom of the figure, and the input signal ▲ H ^* _OU ▼
The value is proportional to. This sum voltage V ₁ + V ₂ + V ₃ + V ₄ = -Δ
V ₅ is a voltage that cancels the harmonic component ΔV ₅ of the voltage V ₅ generated by the direct connection inverter INV-5.

That is, the compensation control signal ▲ H ^* _OU ▼ represented by equation (7)
PWM control input signal of inverter INV-1 to INV-4 e ₁ ＝ e ₂ ＝ e
_When given as ₃ = e ₄ = ▲ H ^* _OU ▼, the average value of the output voltages V _{1 to} V ₄ of each inverter becomes a value proportional to the input signal e _{1 to} e ₄ , and the sum voltage V ₁ + V ₂ + V ₃ + V ₄ is 4 ・ ▲ H ^*
_The value is proportional to _OU ▼.

Considering equations (6) and (7) in equation (8) with n = 4 Becomes

As described above, it is possible to perform compensation control so that the harmonic voltage ΔV ₅ generated by the direct-coupled inverter INV-5 is canceled by the multiple inverters INV-1 to INV-4. As a result, the pulsation of the load current I _U due to the harmonic component of the output voltage V ₅ of the direct-coupled inverter INV-5, which has been a problem in the past, is eliminated and a sinusoidal current with less distortion can be supplied to the AC load. become. Further, the carrier frequency of the direct-coupled inverter INV-5 (switching frequency of the device) can be lowered, and the switching loss of the device and the loss of the snubber circuit can be significantly reduced.

On the other hand, the multiple inverters INV-1 to INV-4 cancel the harmonic voltage generated by the direct-coupled inverter INV-5 as described above and, at the same time, generate the voltage V _CU + jωL _L I _U proportional to the output frequency f _0. , And the primary current I _{U1 to} I of each output transformer TR _{1 to} TR _4
It controls _U4 . At this time, each inverter INV-1 to INV
Harmonic voltages -4 occur is counteracted by multiple PWM control, the output voltage of the entire multi-inverter, undistorted sinusoidal voltage V _CU + jωL _L · inverted value of the harmonic voltage [Delta] V ₅ of I _U directly coupled inverter Will be superimposed.

Therefore, the output voltage across the inverter _{V 1 + V 2 + V 3} + V 4 + V 5 = V CU + jωL L · I U -ΔV 5 + V 5 = V CU + jωL L · I U + 5 = V CU + jωL L · I U + R _L・ I _U …… (10) and balance with the voltage on the load side.

The average voltage ₅ generated by the direct connection inverter INV- ₅ is P
It is proportional to the WM control input signal e ₅ , and in steady state, e ₅ =
It is given by R _L · ▲ I ^* _U ▼.

The load current I _U is controlled as follows.

First, the load current I _U is detected by the current detector CT ₅ shown in FIG. 6 and input to the comparator C ₅ shown in FIG. The comparator C ₅ compares the current command value ▲ I ^* _U ▼ with the above detection value I _U , and the deviation ε
_{5 =} ▲ I ^* _U ▼ to enter -I _U to the next current control compensation circuit G _L. In G _L , deviation ε ₅ is proportionally amplified, and PW is added via adder A _8.
Providing an input signal e ₅ of M control circuit PWM _5.

e ₅ = G _L · ε ₅ + R _L · ▲ I ^* _U ▼ (11) The other input signal R _L · ▲ I ^* _U ▼ of the adder A ₈ is the voltage drop _RL · I due to the resistance component of the load. It is a compensation signal that generates _U in advance.

▲ I ^* _U ▼> If you became a I _U, the deviation ε ₅ becomes a positive value,
The input signal ε ₅ is increased and the output voltage V ₅ of the direct connection inverter INV- ₅ is increased. Since the harmonic component ΔV ₅ of the output voltage V ₅ is canceled by the multiple inverters INV-1 to INV- ₅ as described above, only the average voltage _{5 of} V ₅ increases and the load current
Increase I _U. As a result, it is controlled to be _{^{I U ≒ ▲ I * U ▼}} . On the contrary, when ▲ I ^* _U ▼ <I _U , the deviation ε ₅
Becomes a negative value, ₅ decreases, and the load current I _U decreases. After all, I _U ≒ ▲ I ^* _U ▼ and it settles down. When the current command value ▲ I ^* _U ▼ is changed in a sine wave shape, the load current I _U also follows it and is controlled to a sine wave current.

FIG. 3 shows the result of computer simulation of the device of the present invention. The phase output current I _U at an output frequency of 30 Hz,
I _V , I _W , U-phase output voltage V _U , back electromotive force V _CU , output voltage V ₁ of multiple P inverter, output voltage V ₄ of direct inverter. The load is an AC motor, the multiplex inverter consists of three stages, the PWM control carrier frequency of the multiplex inverter is 350Hz, and the direct connection inverter PWM control carrier frequency is 120Hz.
I am trying. It can be confirmed that the load currents I _U , I _V , and I _W of the components do not pulsate even though the carrier wave frequency of the direct connection inverter is lowered, and the sine wave current is controlled with less distortion.

In this way, the load current I _U is controlled faithfully to the command value ▲ I ^* _U ▼, but there may be one concern here. That is, when the carrier frequency f _CA of PWM control of the multiple inverter and the carrier frequency f _CB of PWM control of the direct inverter are made the same, the generation of each inverter forming the multiple inverter when compensating the harmonic voltage generated by the direct inverter The voltage may be biased to either the positive side or the negative side.

FIG. 4 shows carrier signals X _{1 to} X ₄ and Y ₁ to of the multiple inverter.
Compensation voltage for PWM control signal for Y ₄ ▲ H ^* _OU ▼
The time chart diagram in the case of complete synchronization is shown. Since the compensation voltage ▲ H ^* _OU ▼ is synchronized with the carrier signal X ₅ of the direct inverter, in other words the carrier signal X ₁ to X ₄ or Y ₁ to Y ₄
The above condition occurs when X and X ₅ have the same frequency and the PWM control input signal e ₅ of the direct connection inverter INV- ₅ is constant.

▲ H ^* _OU ▼ is compared with X ₁ , gate signal g ₁ is created, and ▲ H ^* _OU
It is the same as before that ▼ and Y ₁ are compared and g ₁ ′ is created. As a result, the output voltage V ₁ of the inverter INV-1 becomes as shown in the figure. Similarly, output voltage of inverters INV-2 to INV-4 V _{2 to} V ₄
Is as shown in the figure and the output voltage of the multiple inverter V ₁ + V ₂ +
V ₃ + V ₄ is the bottom waveform. This is the compensation voltage ▲ H ^* _OU ▼
The output voltage V ₅ of the direct-coupled inverter INV-5 is proportional to
It is the inverted value of the harmonic component ΔV ₅ of.

At this time, the integrated values of the positive side voltage and the negative side voltage of the output voltages V _{1 to} V ₄ of the respective inverters forming the multiple inverter do not match. For example, in the output voltage V ₁ , the negative voltage is higher than the positive voltage. The same applies to V ₂ . On the contrary, V ₃ and V ₄ are larger on the positive side than on the negative side. As for the multiplex inverter as a whole, V ₁ + V ₂ + V ₃ + V ₄ is balanced on the positive side and the negative side.

If the carrier signals X _{1 to} X ₄ (Y _{1 to} Y ₄ ) and the compensation voltage ▲ H ^* _OU ▼ are synchronized, this state will continue forever. Then, for example, a negative DC bias voltage is applied to the output transformer TR ₁ , and the iron core causes DC bias magnetization.
The same applies to the other output transformers TR _{2 to} TR ₄ .

The DC bias magnetism of the output transformer is finally corrected because the primary current or exciting current of each transformer is controlled by the inverters INV-1 to INV-4 as described above. However, it is not preferable to create the cause of DC bias magnetism in the first place, and it may disturb current control. Further, it may be considered that by correcting the DC bias magnetism, the compensation control operation of the harmonic voltage of the direct connection inverter is disturbed and proper compensation cannot be performed.

Therefore, in the control circuit of FIG.
Carrier signal X ₁ to X ₄ to provide the PWM control circuit PWM ₁ ~PWM ₄ (Y ₁
~ Y ₄ ) frequency f _CA and PWM control circuit PWM ₅
The frequency f _CB of the carrier signal X _{5 applied to} the carrier generators TRG ₁ and TRG ₂ is made different from each other.

If this is done, for example, one of the multiple inverters, INV-1
The voltage V ₁ generated by is increased at a certain moment in the positive side voltage or the negative side voltage, but on average, V ₁ is the input signal ▲ H ^* _OU ▼ (e ₁ = ▲ H ^* _OU ▼) and the output transformer TR ₁ will not be DC biased. The same applies to the other output transformers TR _{2 to} TR ₄ .

As a result, the primary current control (or excitation current control) of the output transformer by each inverter is not disturbed, and it becomes possible to supply a current with less waveform distortion.
Further, the harmonic voltage generated by the direct-coupled inverter can be accurately compensated by the multiplex inverter.

FIG. 5 shows another embodiment of the control circuit of the power converter of the present invention.

In the figure, C _{1 to} C ₅ are comparators, A _{1 to} A ₇ are adders, G _{1 to} G ₄ and G _L
Is a current control compensation circuit, PWM _{1 to} PWM ₅ are pulse width modulation control circuits, K _H , K _N1 and K _N2 are operational amplifiers, and TRG ₁ and TRG ₂ are carrier wave generators.

In this control circuit, the inverters INV-1 to INV-4 that make up the multiple inverter are connected to the exciting currents of the output transformers TR _{1 to} TR ₄ .
It _controls I _OU1 to I _OU4 . Excitation current of each transformer I _OU1
~ I _OU4 is the primary current I _U1 ~ I _{U4 of the} transformer and the load current
Detect I _U and ask for:

Moreover, the command value ▲ I ^* _OU ▼ of the exciting current is 4 transformers TR ₁
Assuming that ~ TR ₄ is the same, it is given as in equation (5).

1 differs from the primary currents I _{U1 to} I _U4 of the transformer in FIG. 1 in controlling the exciting currents I _{OU1 to} I _OU4 in the transformer. The effect is the same in that the magnetic bias of the output transformer is prevented. The method for compensating and controlling the harmonic voltage generated by the direct-coupled inverter INV-5 is the same as in Fig. 1.

Although the output of the inverter for one phase (U phase) has been described in both FIGS. 1 and 5, the same applies to V phase and W phase.

In addition, the harmonic voltage ΔV ₅ generated by the directly connected inverter INV- ₅
Directly obtained from the compensation signal ▲ H ^* _OU ▼ gate signal g ₅ and PWM control input signal e ₅ counteract, but to counteract all of the harmonic components, the signal g ₅ frequency analysis, specific therein The harmonic components may be extracted and compensated.

〔The invention's effect〕

As described above, according to the control device for the power converter of the present invention, since the harmonic voltage generated by the direct-coupled inverter is compensated and controlled by the multiple inverter, the carrier frequency of the direct-coupled inverter is not increased, Regardless of the level of the output frequency, it is possible to always supply a sinusoidal current with little distortion to the AC load. As a result, the switching loss of the inverter and the snubber circuit loss can be significantly reduced, and efficient operation becomes possible. Further, it becomes easy to increase the capacity. Further, by making the carrier wave frequency of the multiplex inverter different from the carrier wave frequency of the direct connection inverter, it becomes possible to prevent the DC bias magnetization of the output transformer.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of a control circuit for explaining a control device for a power converter of the present invention, and FIG. 2 is a time chart diagram for explaining the operation of the control device of the present invention. FIG. 4 is a diagram showing a computer simulation result confirming the effect of the control device of the present invention, FIG. 4 is another time chart diagram for explaining the control device of the present invention, and FIG. 5 is a control circuit of the present invention. 6 is a diagram showing the main circuit configuration of the power converter, FIG. 7 is a partial diagram of FIG. 6, and FIG. 8 is a diagram illustrating the operation of the circuit of FIG. FIG. 9 is another partial view of FIG. 6, and FIG. 10 is a time chart diagram for explaining the operation of the circuit of FIG. Vd: DC voltage source INV-1 to INV-4: Multiplexed PWM inverter INV-5: Direct PWM inverter TR _{1 to} TR ₄ : Output transformer LOAD: AC load CT _{1 to} CT ₅ : Current detector A _{1 to} A ₈ : The adder C ₁ -C _5: comparator G ₁ ~G _4, G _L: current control compensation circuit _{K N1, K N2, K H} : operational amplifier PWM ₁ ~PWM _5: pulse width modulation control circuit TRG _1, TRG ₂ : Carrier wave generator

Claims (2)

[Claims] 1. A power converter for supplying a voltage of a sum of an output voltage of a multiple pulse width modulation control inverter having an output transformer and an output voltage of a pulse width modulation control inverter having no output transformer to an AC load. The pulse width modulation control inverter is applied with a deviation signal between the command value of the primary current of the output transformer and its detection value or a deviation signal between the command value of the exciting current of the output transformer and its detection value. No. 1 current control compensation circuit, an output signal of the first current control circuit, and an addition value of a signal proportional to the output frequency as a first control input signal, the control input signal is compared with the first carrier wave, and the gate is compared. First to output a signal
And a pulse width modulation control inverter without the output transformer, a second current control compensation circuit to which a deviation signal between the load current command value and its detected value is applied, and at least the second current control compensation circuit. The second output signal of the current control compensation circuit
A second PWM control circuit that outputs a gate signal by comparing the control input signal with a second carrier wave as a control input signal, and the pulsating component of the output voltage generated by the pulse width modulation control inverter without the output transformer, A means for calculating from the second control input signal and the output gate signal of the second PWM control circuit by calculation, and adding a pulsating component of the output voltage calculated by calculation to the first control input signal The pulsating component of the output voltage generated by the pulse width modulation control inverter without the output transformer is canceled on the side of the multiple pulse width modulation control inverter. 2. The frequency of the first carrier wave and the frequency of the second carrier wave are different from each other.
A control device for the power converter described.