JPH0782704B2 - Recording / reproducing method of radar eco signal - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention records a radar echo signal using a commercially available VTR.
The present invention relates to a recording / reproducing method of a radar echo signal to be reproduced.

[Conventional technology]

Conventionally, there have been the following two methods for recording / reproducing a radar oscillation pulse (hereinafter referred to as a trigger pulse) and a radar echo signal using a VTR.

(A) Method: A waveform in which a trigger pulse and a radar echo signal are superimposed is directly input within a video input level range of a commercially available VTR.
How to input to the input terminal.

(B) Method: A method of switching the head of the VTR for each trigger pulse, recording the trigger pulse and the radar echo signal to another channel of the VTR tape, and reproducing.

[Problems to be solved by the invention]

The method (A) has the following problems, and it is impossible to faithfully record and reproduce the radar echo signal.

1) Since there is no vertical sync signal (60Hz), the rotation of the video head drum could not be synchronized, and the screen on the scope flowed during playback.

2) Since there was no horizontal sync signal (15.75kHz), the sync clamp circuit inside the VTR did not operate normally, and the recording level of the radar echo signal fluctuated, making it impossible to faithfully reproduce the level.

Further, in the method (B), the use of a special VTR is indispensable, resulting in a high price (about 50 times that of a home VTR) and a limited storage space.

It is an object of the present invention to provide a method for recording / reproducing a radar echo signal capable of solving the above-mentioned conventional problems.

[Means for solving problems]

In order to solve this problem, the following measures are taken in one embodiment of the present invention.

1) The vertical sync signal (60 Hz, pulse width 190 μs) is superimposed on the recording waveform.

2) The horizontal sync signal (15.75 kHz, pulse width 5.1 μs) is superimposed on the recording waveform.

3) Compress the radar echo signal temporally.

However, in 2), in order to operate the VCR sync clamp circuit normally, a signal of 6 kHz or more (hereinafter referred to as a pseudo horizontal sync signal) is superimposed.

That is, the method for recording / reproducing a radar echo signal according to the present invention includes a first storage circuit for storing one waveform of the radar echo and the first storage circuit for counting the effective time of the radar echo based on the radar trigger pulse. A memory write counter for generating a count signal for writing one waveform of a radar echo, and a pseudo horizontal synchronizing signal at the completion of writing to the first storage circuit, and a pseudo trigger pulse after a predetermined time. A counter for generating a count signal for reading the radar echo signal stored in the first storage circuit, a vertical synchronization signal based on a separately generated timing pulse, and prohibiting the input of a radar trigger pulse during this period. Inhibit control circuit, above pseudo horizontal sync signal, above pseudo trigger pulse, D A radar echo signal is recorded by using a circuit that combines the radar echo signal after A / A conversion and the vertical synchronization signal to obtain the recording signal of the video tape recorder (VTR), and records the VTR recording signal in the pseudo horizontal synchronization. A signal, a sync separation circuit for separating the vertical sync signal and the video signal,
A trigger pulse detection circuit for detecting the pseudo trigger pulse superimposed on the video signal, a second storage circuit for storing one waveform of the radar echo signal in the video signal, and a second storage circuit for the second storage circuit. Characterized in that the radar echo signal recorded as described above is reproduced by using a circuit for generating a read / write control signal and a circuit for outputting a signal read from the second storage circuit according to the read control signal. To do.

[Action]

 According to the present invention, it operates as follows.

1) Vertical sync signal (hereinafter V
(abbreviated as _sync ) has the following actions. (FIGS. 6 (A) and (B)) Video signal recording is performed using a signal for 1/60 seconds as one recording unit (track). When writing a video signal to the tape through the recording head, it is necessary to alternately switch the recording head for each track, and this switching control is performed by V _sync superimposed on the video signal. That is, the recording head drum is rotated in synchronization with V _sync .

On the other hand, this V _sync is recorded at the lower end of the tape, and the playback head drum is synchronized in rotation in the same manner during playback to prevent the screen flow.

2) Horizontal sync signal (hereinafter, H
(abbreviated as _sync ) has the following actions.

Generally, in the VTR, the DC component of the video signal is removed by capacitor coupling, so the black level of the video signal is not constant. (FIG. 7) If this is left as it is, a part of the video signal component is missing or an accurate level (luminance) cannot be obtained.

Therefore, and black level constant for each H _sync intervals using the H _sync superimposed on the video signal (clamping operation). Actually, H separated from the video signal as shown in FIG.
The delayed differential pulse of _sync is triggered to operate the clamp circuit.

3) Temporal compression of the radar echo signal works as follows.

If the H _sync is simply superimposed on the radar echo signal for the purpose of the item 2), the radar echo signal is lost by the pulse width of the H _sync . To eliminate the defects of the radar echo signal, a radar echo signal temporally compressed, H _sync
The signal for one waveform is contained in the period of.

〔Example〕

 An embodiment of the present invention will be described with reference to the drawings.

(1) Recording Circuit FIG. 1 is a diagram showing the configuration of a recording circuit used in one embodiment of the present invention. In FIG. 1, 1 is an A / D converter of a radar echo signal, and 2 is a radar echo signal. A buffer memory that stores data for one waveform, 3 is a D / A converter for the data read from the buffer memory 2, 4 is an inhibit for stopping the trigger pulse, and 5 is the effective time of the radar echo (calculated from the radar detection ability. memory write counter for counting that value), 6 memory control circuit for controlling the read / write buffer memory 2, 7 abbreviated as a pseudo horizontal sync signal (hereinafter H _'sync) and pseudo generation of the trigger pulse and the buffer memory 2 , A counter for counting the read time of the counter, 8 an inhibit control circuit for generating a trigger pulse prohibition signal, 9
Is a video mix for synthesizing _H'sync , pseudo trigger pulse, radar echo signal after D / A conversion and V _sync signal to produce a VTR recording signal.

The function of the circuit shown in FIG. 1 will be described with reference to FIGS. 2 and 3.

(1) _{Superposition} of H'sync (FIG. 2) The memory write counter 5 is operated by the trigger pulse, and the data for the effective section T _w of the radar echo signal is stored in the buffer memory 2. Next, _H'sync (cycle T _H ,
A pulse width of 5.1 μs) is generated, and then a pseudo trigger pulse (pulse width n ₂ μs) is generated n ₁ μs after that.

These processes are executed by the circuit of the counter 7 within a fixed time T _c μs. Finally, the data of the radar echo signal stored in the previous buffer memory 2 is read out within the time T _R.

Since all of the recording data for one waveform is read during one cycle T _H of H ′ _sync , the read time T _R from the buffer memory 2 is set to (T _H −T _c ) μs or less.

Further, processing of one waveform of the radar echo signal requires at least (T _w + T _c + T _R ) μs or more, and a trigger pulse may be input at a shorter cycle than this, Two buffer memories 2 are prepared and used alternately.

(2) superimposing the V _sync (FIG. 3) V _sync if superimposed (pulse width T _v = 190μs), radar return signals of this section must be pulled out. At this time, in order to facilitate the timing control, it generates timing pulses of 1/60-second period, from this trigger _{(T w + T H + T} v) μs interval stop trigger pulse, this interval the The input radar echo signal is ignored.

Note that (T _w + T _H ) μs is the time required to process the radar echo signal of one waveform, and for the trigger pulse (that is, the radar echo signal that follows) that comes immediately before the timing pulse, The processing described in the item (1) can be performed.

(2) Reproducing circuit FIG. 4 is a diagram showing the structure of a reproducing circuit used in an embodiment of the present invention. In FIG. 4, 10 is a signal output from the VTR, _H'sync , V _sync and video. A sync separation circuit for separating the signal and a signal, 11 is an A / D converter of the video signal, and 12 is a buffer memory for storing data corresponding to one waveform of the radar echo signal in the video signal (data for T _R μs) , 13 is a D / A converter of the data read from the buffer memory 12, 14 is a clock synchronization circuit for synchronizing the clock with the separated _H'sync , and 15 is a buffer memory
Reference numeral 12 is a memory control circuit for controlling reading / writing, and 16 is a trigger pulse detection circuit for detecting a pseudo trigger pulse superimposed on a video signal.

The function of the circuit shown in FIG. 4 will be described with reference to FIG.

The video reproduced by the VTR is input to the sync separation circuit 10 and separated into _H'sync and a video signal. _H'sync
Is input to the clock synchronization circuit 14 and is reproduced faithfully with the range information, so that it is synchronized with the clock signal used internally. On the other hand, the video signal is input to the trigger pulse detection circuit 16 and detects the pseudo trigger pulse superimposed on the video signal. As a result, the memory control circuit 15 starts its operation, writes the data for T _w μs to the buffer memory 12, and after the time T _D μs has elapsed after the end of writing (T _D is arbitrary), for T _R μs. The data written in the buffer memory 12 is read by. Note that the ratio of T _w and T _R is the same as when recording.

Also, the warp of one waveform requires a time of (T _w + T _D + T _R ) μs or more, and the VTR output signal may arrive at a cycle shorter than this, so two buffer memories 12 are prepared. And use them alternately.

〔The invention's effect〕

As described above, it superimposes the V _sync and H _'sync radar return signals, the following effects are Sose by further temporally compress the radar echo signal.

1) It is possible to eliminate the screen flow on the scope during playback.

2) The level of the radar echo signal can be faithfully analyzed during reproduction.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of a recording circuit used in an embodiment of the present invention, and FIG. 2 is H'in FIG.
Timing chart for superimposing _sync , Fig. 3 shows the first
Timing chart diagram to superimpose V _sync in the figure,
FIG. 4 is a block diagram showing the structure of a reproducing circuit used in an embodiment of the present invention, FIG. 5 is a timing chart at the time of reproducing in FIG. 4, and FIGS. 6 (A) and 6 (B) are commercially available VTRs. FIG. 7 is a diagram showing the principle of recording, FIG. 7 is a diagram of a video signal waveform in which the black level is not constant, and FIG. 8 is a diagram showing the principle of the synchronous clamp circuit. 1 ... A / D converter, 2 ... buffer memory, 4 ... inhibit, 5 ... memory write counter, 6 ... memory control circuit, 7 ... counter, 9 ... video mix, 10 ... sync separation Circuit, 12 ... Buffer memory, 13
... D / A converter, 15 ... Memory control circuit, 16 ...
… Trigger pulse detection circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshikatsu Teramoto 1-15-1, Nishishinbashi, Minato-ku, Tokyo Within Japan Avionics Co., Ltd. (72) Inventor Osamu Kobayashi 1-1-15-1, Nishishinbashi, Minato-ku, Tokyo Japan Within Avionics Co., Ltd. (56) Reference JP-A-48-64907 (JP, A) JP-A-57-130209 (JP, A)

Claims (1)

[Claims] 1. A first memory circuit for storing one waveform of a radar echo, and a valid time of the radar echo is counted based on a radar trigger pulse, and one waveform of the radar echo is written in the first memory circuit. A memory write counter that generates a count signal, and a pseudo horizontal synchronizing signal when writing to the first storage circuit is completed and a pseudo trigger pulse after a predetermined time, and then stored in the first storage circuit. A counter that generates a count signal that reads the generated radar echo signal, an inhibit control circuit that generates a vertical synchronization signal based on a separately generated timing pulse, and prohibits the input of a radar trigger pulse during this period, and the pseudo horizontal synchronization signal,
The radar echo signal is recorded by using the circuit for obtaining the recording signal of the video tape recorder (VTR) by synthesizing the pseudo trigger pulse, the radar echo signal after D / A conversion, and the vertical synchronizing signal, respectively, and recording the VTR. A sync separation circuit that separates a signal into the pseudo horizontal sync signal, the vertical sync signal, and the video signal,
A trigger pulse detection circuit for detecting the pseudo trigger pulse superimposed on the video signal, a second storage circuit for storing one waveform of the radar echo signal in the video signal, and a second storage circuit for the second storage circuit. Characterized in that the radar echo signal recorded as described above is reproduced by using a circuit for generating a read / write control signal and a circuit for outputting a signal read from the second storage circuit according to the read control signal. Recording / reproducing method of radar echo signal.