JPH0782597B2 - Time division multiplex transmission system for measurement information - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a central control room side (panel side) processing device for a plurality of measuring devices installed at a site (field) via a pair of transmission lines. The present invention relates to a measurement information multiplex transmission system which is connected in parallel with each other and digitally multiplexes and transmits the measurement information.

[Prior art and its problems]

Generally, in a measuring system, a large number of sensors or measuring devices are installed on the field side, and the measurement data from these devices are transmitted to a device on the remote panel side to monitor and control the field. Since most of these systems use the 2-wire type analog transmission system, they are susceptible to fluctuations due to noise, temperature, and other disturbances, and therefore the measurement accuracy is poor and the transmission quality deteriorates. There is a point.

[Object of the Invention]

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a measurement information multiplex transmission system having improved measurement accuracy and transmission quality and high reliability.

[Main points of the invention]

The main point of the present invention is that the host processor is provided with a transmission / reception means including a transmission voltage changeover switch for switching the voltage of the power supply circuit based on transmission information including at least an address, a reception comparator and a reception current detection resistor (for example, A transmission transistor TCR, a reception comparator CPT, a reception current detection resistor R, etc.) are provided, and a plurality of measuring devices for measuring a physical quantity are provided with a constant current DC signal corresponding to a measurement value. Means for transmitting to the transmission line (for example, a transmission transistor TCR), a power holding means (for example, a capacitor C) connected to the transmission line in parallel with a control circuit inside the device, and a connection point of the power holding means. Receiving means that is connected to the higher-level processing device side and that detects the on / off of the power supply current and receives information from the higher-level processing device (eg, By providing a receiving photocoupler HC) and connecting a host processor and a group of measuring devices in parallel with each other via a two-wire type transmission line, digital transmission is possible, and noise and disturbance due to temperature or the like also occur. While reducing the effect, the addressed measuring device sends out a signal in which the current I _s corresponding to the measured value is added to the constant current I _B flowing through its control circuit, while the host processing device detects the received current. The resistance is used to detect a current obtained by adding the above current I _s to the constant current nI _B for n measuring devices, and the current value (nI _B + I _s ) and the constant current n
And I _B by configuring the system to receive information transmitted from the measuring apparatus by comparing by the comparator, and allows easy and high-quality transmission of the reception operation of the processing apparatus It is characterized by

Example of Invention

1 is an overall configuration diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a schematic configuration of a measuring device, FIG. 3 is a circuit configuration diagram showing the measuring device in detail, and FIG. 4 is a mechanical diagram. FIG. 5 is a principle diagram for explaining the principle of detecting a displacement amount by converting it into an electrostatic capacitance. FIG. 5 is a time chart for explaining the measurement operation.
FIG. 9 is a circuit diagram showing another embodiment of the capacitance detecting section.

In FIG. 1, CE is a central control room side device (panel side device), which includes a transmission transistor TCR and a reception comparator CP.
A transmission / reception circuit including T and a reception current detection resistor R,
It is composed of a control circuit (CPU) and a power supply E. TR ₁ ~
TR _n is a digital measuring device (hereinafter, also referred to as “transmitter”) that digitally measures various physical quantities, and is a control that includes a transmission / reception circuit (transmission circuit) including a transmission transistor TRS, a reception photocoupler HC, and a microcomputer. It is composed of a circuit (μ-COM). L is a transmission line for connecting a central control room side device (hereinafter, also referred to as a high-order processing device or a CPU) and a plurality of transmitters TR _{1 to} TR _n in parallel with each other. Incidentally, D is a protection diode, C is a power source holding capacitor, and CC1 and CC2 are constant current circuits.

Here, assuming that the data transmission between the host processor and the transmitter is performed by the half-duplex bit serial transmission system, for example, in order to transmit information or data from the CPU to the transmitter TRi, the transmission on the CPU side is required. Credit transistor TC
This is done by turning R on and off according to the information or data to be transmitted. That is, the power supply E on the CPU side is turned on / off by the transistor TCR and a signal is transmitted. As a result, on the transmitter TRi side, ON / OFF of the power supply current, that is, ON / OFF of the current of the receiving photocoupler HC is appropriately detected and received. At this time, on the transmitter TRi side, even if the power supply E from the CPU side is intermittent,
The holding is performed by the capacitor C, but it goes without saying that a backup battery may be used instead of the capacitor C.

On the other hand, from the transmitter side, the constant current nI ₁
A constant current I ₂ is added to (n is the number of transmitters, I is a constant current flowing through the control circuit) to turn on and off the transmission transistor TRS, and a signal is transmitted. That is, since a plurality of (n) transmitters are connected to one CPU side device, each transmitter receives signals from the CPU side at the same time, but from the CPU side, the desired transmitter is transmitted. Address is specified and a transmission request signal (polling signal) is issued, so that only the transmitter having the specified address responds. As a result, on the CPU side, the signal current I ₂ of the designated transmitter TRi is added to the current nI ₁ for n transmitters when there is no signal and received. Therefore, on the CPU side, the constant current when there is no signal n × I
By detecting ₁ and the I ₂ current for the signal by the comparator CPT, the signal from the transmitter side can be received.

In this way, CPU side and n transmitters TR _{1 to} TR
_{By connecting n} to each other via a pair of transmission lines, bidirectional time division multiplex transmission can be performed.

In the above, the number of CPUs is one and the number of transmitters is n. However, this relationship is reversed, that is, the system with one transmitter and n CPUs is the same as above. Information can be similarly transmitted.

Hereinafter, the configuration and operation of each unit will be described in detail.

The measuring apparatus TR has a detection unit 1, a detection unit selection circuit 2, a frequency conversion circuit 3, a counter 4, a timer 5, a reference clock generation circuit 6, a microprocessor 7 (hereinafter Also referred to as a μ-COM arithmetic circuit), a transmission circuit 8, a power supply circuit 9, a keyboard 10 and the like. As shown in FIG. 3, this measuring apparatus further comprises a detecting section 1 which is composed of capacitors C ₁ and C ₂ , and a detecting section selecting circuit 2 which includes capacitors C ₁ and C ₂ and a temperature measuring unit. capacitor C _S, C-MOS (complementary MOS) type analog switch SW2 for selecting the thermistor R _S (S
W21, SW22), and the capacitance-frequency conversion circuit 3 switches the charging and discharging of capacitors C ₁ and C ₂ and flip-flop Q.
Analog switch SW1 to clear or reset 1
(SW11, SW12) and capacitor C ₁ or C ₂ is set when the charging voltage exceeds a predetermined voltage level (threshold level), and a predetermined time constant (resistor R _f , capacitor C 2
_f ) and a flip-flop Q1 (D type) which is reset after a fixed time. When using the conventional general D type flip flop,
A circuit (for example, a shift circuit) for discriminating the threshold level is required in the preceding stage.
When a MOS type flip-flop is used, such a circuit is not necessary, and its switching voltage can be used as it is as a threshold voltage. Similarly, the timer 5 is composed of two-stage counters CT2 and CT3, and by releasing the reset signal P03 from the μ-COM operation circuit 7, the counting of the clock signal given from the reference clock generation circuit 6 is started, Counting is stopped by the count-up signal from the counter (CT1) 4. The μ-COM operation circuit 7 is driven by the clock signal from the reference clock generation circuit 6 to perform various operations and control operations. For example,
The mode selection signals PO1 and PO2 are sent to the analog switch SW2 of the detection unit selection circuit 2 to select the capacitor C ₁ measurement mode, the capacitor C ₂ measurement mode or the temperature measurement mode (measurement by the resistance R _S and the capacitor C _S ). At the time of non-measurement, the reset signal PO3 is applied to the counter 4 and the timer 5 to perform these resets, and at the time of measurement, the reset signal PO3 is released to perform the counting operation, and the count-up signal from the counter 4 is divided. The count signal output from the timer 5 is received via the terminals PI0 to PI15 as a built-in signal IRQ, and predetermined arithmetic processing is performed. The μ-COM arithmetic circuit 7 includes a keyboard 10 for instructing an operation for adjusting a zero point or a span to avoid a measurement error, or a reference clock generation circuit 6 or a μ-COM arithmetic circuit for power saving. A standby mode circuit 11 for intermittently operating 7 itself, a transmission circuit 8 for exchanging information with the host computer on the management room side, and the like are connected. Reference numeral 9 is a power supply circuit for supplying power to required parts.

Since the measuring device in this embodiment converts a mechanical displacement amount such as pressure into a capacitance value and detects it, and converts the detection result into a digital amount for measurement, the detection principle will be described here. This will be described with reference to FIG.

The drawing (A) is arranged movable electrode EL _V between two fixed electrodes EL _F, moves the movable electrode EL _V, depending on the mechanical displacement of the pressure, etc. to the left and right (arrow R see) direction in FIG. To do. in this case,
The capacitances CA ₁ and CA ₂ between the electrodes decrease when one increases, that is, they change differentially. Here, the area of each electrode is S, the dielectric constant between the electrodes is ε, the movable electrode EL _V and the fixed electrode EL _F
Capacity CA ₁ when the distance is d, for example, the movable electrode EL _V as shown by a dotted line in FIG. (A) is displaced by Δd between, CA ₂
Is calculated as CA ₁ = εA / d−Δd CA ₂ = εA / d + Δd. Considering the sum and difference of these capacities, CA ₁ + CA ₂ = εA · 2d / d ² −Δd ² CA ₁ + CA ₂ = εA · 2Δd / d ² −Δd ² , and thus the ratio is Then, CA ₁ -CA ₂ / CA ₁ + CA ₂ = Δd / d is obtained, and the displacement Δd can be obtained by the capacitance value CA ₁ -CA ₂ / CA ₁ + CA ₂ .

Similarly, in FIG. 4 (B), the movable electrode EL _V is arranged with respect to the two fixed electrodes EL _{F as} shown in the figure, and when the movable electrode EL _V is displaced by Δd to the dotted line position in the figure due to displacement of external pressure or the like, It looks like this: In this case, the capacitance CA ₁ is fixed and CA ₂ is variable, and the respective values can be expressed as CA ₁ = εA / d, CA ₂ = εA / d + Δd in the same manner as above. Therefore, considering these differences, CA ₁ −CA ₂ = εA · Δd / d (d + Δd), and thus the ratio of CA ₁ −CA ₂ to CA ₂ is CA ₁ −CA ₂ / CA ₂ = Δd / d, and the displacement amount Δd can be detected as a change in capacitance value. As is clear from these equations, the displacement amount is a function of only the electrostatic capacitance, so it is not affected by the dielectric constant between electrodes or the stray capacitance, and therefore the mechanical displacement amount can be accurately determined by the capacitance. Can be detected.

Next, the measurement operation based on such a detection principle will be described mainly with reference to FIGS. 3 and 5.

In the initial state, the mode selection signals PO1 and PO2 are not given from the μ-COM operation circuit 7, and the counter (CT1) 4 and the timer 5 are in the reset state by the reset signal PO3. Here, when the measurement mode signal of the capacitor C ₁ as shown in FIG. 5 (a) is given and the reset signal PO3 is released as shown in FIG. 5 (b), the capacitor C ₁ , the switch SW21,
Since the path of SW11, resistor R and power supply V _DD is formed, the capacitor C ₁ is charged as shown in FIG.
If the charging voltage exceeds the threshold voltage V _TH of the flip-flop Q1 after _one hour t, the flip-flop Q
1 is set and an output is obtained from its output terminal Q.
This output is given to the resistor R _f and the capacitor C _f , and is also given to the analog switch SW1. As a result, the switch SW12 is opened to form a charging circuit with the resistor R _f and the capacitor C _f . At this time, switch SW
11 is switched to the position indicated by the dotted line, and the capacitor C ₁ is discharged. As shown in FIG. 5 (e), when the charging constant pressure of the capacitor C _f reaches a predetermined value after a predetermined time t _c , the flip-flop Q1 is cleared, and as a result, the flip-flop Q1 starts from FIG. 5 (d). An output pulse having a constant width (t _C ) such as Since the analog switch SW1 is also turned off by the reset of the flip-flop Q1, the switch SW12 returns to the state shown in FIG. 3 and forms the discharging circuit of the capacitor Cf. Since the above time t ₁ is proportional to the sizes of the capacitor C ₁ and the resistor R, the flip-flop Q 1
A pulse signal having a frequency proportional to the capacitance of the capacitor C ₁ can be obtained from the output of. This pulse signal is counted by the counter 4, and when it reaches a predetermined number, a pulse (count UP output) as shown in FIG. 5 (f) is issued to stop the timer 5 counting as shown in FIG. 5 (g). . The timer 5 counts the clock pulses from the pulse generating circuit 6 together with the release of the reset signal PO3, and the counting result indicates that the count UP signal from the counter 4 has been received.
It is read by the COM operation circuit 7 through the terminals PI0 to PI15.

If the threshold voltage of the flip-flop Q1 is V _TH , Expressed as the charging time of but the connexion capacitor C ₁ t ₁
(See Fig. 5 (d)) It is expressed as.

Also, the above time t _c Is represented as The values of R _f and C _f are known, so t _c is a constant value.

Was but connexion, charging the capacitor C _1, by teaching clock pulse of the discharging operation from the reference clock generating circuit 6 until the count n times, i.e. the charge and discharge time T ₁ by Yotsute capacitor C ₁ to the output from the timer 5 Can be asked. As is clear from FIG. 5 (d), this charging / discharging time T ₁ is n (n) times of charging (t ₁ ) and (n−1) times of discharging (t _c ). _{1 = nt 1 + (n-} 1) can be obtained as t _c ...... (I). It should be noted that the reason for counting n times in this way is to increase the resolution of the time measurement counters (CT2, CT3), and the number n is the output frequency of the reference clock generation circuit 6, the resistance value of the resistor R or the capacitor C ₁ Is appropriately selected according to the capacitance value of

Thus, after determining the charging and discharging time T ₁ of the capacitor C _1, μ-COM operation circuit 7 as a detection mode of the capacitor C ₂ by switching the Yotsute switch SW21 to the signal PO1 or PO2,
Measuring the charging and discharging time T ₂ of the capacitor C _2. The operation mode in this case is exactly the same as that described above, and its time chart is shown in the right half of FIG. The charging / discharging time T ₂ is T ₂ = nt ₂ + (n−1) t _c (II) as in the formula (I).

The μ-COM arithmetic circuit 7 performs the following arithmetic operations from the expressions (I) and (II).

This formula III is proportional to the displacement, as is clear from the explanation in the above-mentioned principle diagram, so that the displacement can be measured by performing the above-mentioned calculation in the μ-COM arithmetic circuit 7.

In the above description, the mechanical displacement amount, for example, the differential pressure ΔP is measured by changing the capacitances of the capacitors C ₁ and C ₂ differentially. However, as shown in FIG. It is clear from the above explanation of the principle diagram that the same can be applied to the case where one (C ₂ ) is fixed and the other (C ₁ ) is variable. However, in this case, the pressure P is obtained instead of the above differential pressure ΔP, and the calculation formula thereof is expressed as follows in the same manner as above.

In the above-mentioned embodiment, the mechanical displacement amount is converted into the capacitance value for detection, but it may be converted into resistance, frequency or voltage for detection.

7 to 9 are circuit diagrams showing other embodiments of the detecting section.
FIG. 8 shows the case of conversion into a resistance value, FIG. 8 shows the case of conversion into a frequency, and FIG. 9 shows the case of conversion into a voltage value for detection.

In these figures, the capacitance value of the capacitor C and the resistance
Both R _c resistance values are constant, and the switches SW11, SW21
The flip-flop Q1 is similar to that shown in the embodiment of FIG.

The detection principle in FIGS. 7 (a) and 7 (b) is exactly the same as the detection principle based on the capacitance, and the charging / discharging time is proportional to the product of the resistance and the capacitor. Is detected. That is,
In the case shown in FIG. 7A, the switch SW21 is tilted to the R _x side to measure its charge / discharge time T ₁ (note that strictly, only the charge time is measured), and then R _{Tilt to the c} side and similarly obtain the charge / discharge time T ₂ , The resistance value of R _x is obtained by the following calculation.

Similarly, the one shown in FIG. 7C corresponds to the one in which the capacitors C ₁ and C ₂ in the previous embodiment are replaced by the resistors R ₁ and R ₂ , and therefore the calculation formula is also It will be expressed similarly.

The one shown at the same time (b) is the case where the line resistance R ₁ changes. Therefore, by sequentially switching the switch SW21, the respective charge / discharge times T ₁ , T ₂ and T ₃ by R _x + 2R ₁ , 2R ₁ and R _c are obtained, Measure the resistance value R _{x according} to the following formula.

In FIG. 8, since the frequency has already been converted in the detecting section, the frequency converting circuit as in the embodiment of FIG. 3 becomes unnecessary, and the output from the detecting section is appropriately amplified and directly introduced into the counter. . In this case, the frequency (N / T) can be obtained by calculating how long the time T is until the counter counts the predetermined number N.

FIG. 9 shows a case where the voltage is converted into the voltage E ₁ for detection, and a constant current (I) is passed through the capacitor C for charging, and the voltage due to the charging is applied to one of the operational amplifiers OP 2 and on the other hand, is obtained by so as to excisional the flip-flop Q1 when introducing an input voltage E ₁ had it occurred up width to the arithmetic increase width unit OP1, the input voltage E ₁ is charged people pressure exceeds. While the charging by the capacitor C is performed in a constant manner, the input voltage level E ₁ changes, so that a time signal corresponding to the voltage value can be obtained. Here, when the time measurement output when the switch SW21 is in the illustrated state is T ₂ , and when it is switched to the opposite side to the illustrated state is T ₁ , T ₂ −T ₁ = C _x / I by the E ₁ becomes operational can be obtained connexion voltage value E _1. Here, E ₁ is the measured voltage, I is the current given to the capacitor C, and C _x is the capacitance value of the capacitor C.

The information transmission between the measuring device thus configured and the central processing unit (see FIG. 1) will be further described.

FIG. 10 is a configuration diagram showing a format of information exchanged between the measuring device and the central processing unit CPU, (a) shows control information CS, and (b) shows a measuring range from the CPU to the measuring device. Indicates the information format when setting (hereinafter also referred to as range setting mode). (C) shows the measured data from the measuring device to CP.
The information format when sending to U (also called measurement mode), (d) shows the information format when sending back to the measuring device CPU for the purpose of checking that the range setting information has been received from the CPU. . In addition, FIG. 11 shows the measuring device.
FIG. 12 is a waveform diagram showing the information transmitted to and from the CPU in relation to the current level, and FIG. 12 is a flow chart for explaining the sending and receiving operations of the measuring device.

As shown in FIG. 10 (a), the control information CS is the start bit ST (D ₀ ), the address information AD (D _{1 to} D ₃ ), which indicates the number unique to each measuring device, and the measurement mode or range. Mode information MO (D ₄ ) indicating the setting mode, preliminary information AU (D ₅
~ D ₆ ) and validity PA (D ₇ ).
In the measurement mode, by sending the information shown in FIG. 7A from the CPU to the measuring device, the control information CS and the measurement data DA as shown in FIG. 7C are sent from the specified measuring device to the CPU. Sent. It should be noted that the start bit ST simultaneously activates all the measuring devices, but the measuring devices that do not receive the address designation stop operating after a predetermined time.
Further, in the range setting mode, after the control information CS as shown in FIG. 7B is given to the measuring device, zero point information ZE including the start bit ST and span information SP are given after a predetermined time. Then, the measuring device returns the same information as shown in FIG. 9D to inform the CPU that the range setting information has been correctly received.

The information transmitted as described above is shown in FIG. 11 in relation to the current level. That is, regarding the levels of the currents I ₁ and I ₂ as described in FIG. ₁ , for example, I ₁ is 4 mA, I ₂
Is set to 12 mA, and the detection level is set appropriately on the CPU side and the transmitter side, so that information from the CPU side to the transmitter side and CP from the transmitter side can be set.
It is possible to reliably transmit information to the U side.

The details of the operation including the sending and receiving operations in the measuring device are as follows.

The operation of the measuring device (transmitter) will be described below with reference to FIG.

The processing unit μ-COM in the transmitter is activated by the interrupt signal (start signal) of the host computer CPU (),
The input signal (control information) as shown in FIG. 10 is read (), and it is checked whether or not the own address is designated by the input signal (). If it is not the own address, it is given to another transmitter. A predetermined time is secured () and the next interrupt waiting state is set () so as to prevent malfunction by receiving the range setting information. On the other hand, if the user's own address is designated by the input signal, it is checked whether the measurement mode is set (). If the measurement mode is not set, the input data for changing the range is read (). Return the data to the CPU on the panel side to confirm the read data (), and after confirming that there is another input signal so that it does not malfunction due to other input signals (), secure a predetermined time (), And wait for interrupt ().
When it is determined that the measurement mode is in (), the previous calculation result is transmitted in series (),
The charging / discharging time T ₁ is measured to perform a predetermined calculation (), the time T ₂ is measured if necessary (), and the predetermined calculation is performed based on these measurement results (). Next, zero and span corrections are performed (), and similarly, zero and subane corrections due to temperature are performed (). afterwards,
The range is adjusted based on the range setting information already sent from the CPU on the panel side (), and if damping has occurred, the damping is corrected based on a predetermined arithmetic expression (). Next, the temperature is measured (), the power supply voltage is measured (), and it is confirmed that there is another input signal so that the transmitter does not malfunction due to another input signal as described above ( From (), a predetermined time is secured (), and then an interrupt is waited ().

〔The invention's effect〕

According to the present invention, the measuring device is digitalized and the information transmission is digitally time-division multiplexed, so that not only the measurement accuracy is improved, but also
This has the advantage that high-quality transmission is possible without being affected by noise or surge. Further, since the plurality of measuring devices and the host processing device are connected in parallel by a pair of lines, the number of transmission lines or the required length can be reduced, which is economical. The effect will be great.

Furthermore, by changing the format of information transmitted from the CPU to the measuring device, it is possible to perform measurement range setting or damping setting, and in some cases, zero and span adjustment from the CPU side.

[Brief description of drawings]

1 is an overall configuration diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a schematic configuration of a measuring device, FIG. 3 is a circuit diagram showing a detailed configuration of the measuring device, and FIG. 4 is a displacement amount. FIG. 5 is a principle diagram for explaining the detection principle of detecting by converting into a capacitance value, FIG. 5 is a time chart for explaining the operation of FIG. 3, and FIG. 6 is a circuit diagram showing another embodiment of the capacitance detection unit, FIG. 7 is a circuit diagram showing an embodiment of a resistance detection unit, FIG. 8 is a circuit diagram showing an embodiment of a frequency detection unit, FIG. 9 is a circuit diagram showing an embodiment of a voltage detection unit, and FIG. A configuration diagram showing the format of information exchanged between the device and the central processing unit, FIG. 11 is a waveform diagram showing the information transmitted between the measuring device and the central processing unit in relation to the current level, FIG. 12 is a flow chart showing the overall operation of the measuring device. Explanation of symbols 1 ... Detecting unit, 2 ... Detecting unit selecting circuit, 3 ... Frequency converting circuit, 4 ... Counter, 5 ... Timer, 6 ... Reference clock generating circuit, 7 ... μ-COM arithmetic circuit, 8 ... Transmission circuit, 9 ... Power circuit, 10 ... Keyboard, 11 ... Standby mode circuit, HC ... Photocoupler, TRS, TCR ...
... Transistor, D ... Protection diode, CE ... Central control room side device, CPU ... Central processing unit, L ... Transmission line, CPT
…… Comparator, TR (TR _{1 to} TR _n ) …… Measuring device, Q1…
… Flip flops, SW1, SW2 …… Analog switches, C
T1 to CT3 …… Counter, EL _F , EL _V …… Electrode, OP1, OP2 ……
Arithmetic amplifier

Claims (1)

[Claims] 1. A transmission system comprising a plurality of n two-wire measuring devices for digitally measuring a physical quantity and a host processor equipped with at least a power supply, wherein the host processor is arranged in parallel with the host processor. In a system in which a group of measuring devices is connected via a two-wire transmission line and power is supplied from the upper processing device to each of the measuring devices via the transmission line, the upper processing device is at least an address. And a transmission / reception means composed of a transmission voltage changeover switch for switching the voltage of the power supply circuit on the basis of transmission information including, a reception comparator and a reception current detection resistor, and each of the measuring devices is set to a constant current. Transmitting means for modulating a DC current into a signal according to the measured value and transmitting the signal, power holding means connected in parallel with the control line inside the device to the transmission line, and It is connected to the host processor side from the connection point of the power holding means, and is provided with receiving means for detecting ON / OFF of the power supply current and receiving information from the host processor, The addressed measuring device sends out a signal in which the constant current I _B flowing through its control circuit is added with the current I _s corresponding to the measured value, while the upper processing device is measured by the received current detection resistance. The measuring device side is obtained by detecting a current obtained by adding the current I _s to the constant current nI _B for n devices and comparing the current value (nI _B + I _s ) with the constant current nI _B in the comparator. A time-division multiplex transmission system for measurement information, characterized in that the information transmitted from is received.