JPH0228804B2 - - Google Patents

Description

[Detailed description of the invention] [Industrial application field]

This invention relates to a measuring device that converts a physical change into a change in voltage value and measures it, and in particular, a measuring device that converts a detected amount into a digital amount and calculates and processes the digital amount using a digital processing device such as a microprocessor. The present invention relates to a measuring device for measuring physical quantities.

[Conventional technology]

For example, a thermocouple formed by joining two types of metals or semiconductors at two points is used to measure the temperature from the electromotive force (voltage) generated by keeping the two points of the thermocouple at different temperatures. things are being done. When measuring the electromotive force or voltage generated by such a thermocouple, it is common to amplify this using an operational amplifier or the like and obtain the electromotive force or voltage from the output.

[Problem to be solved by the invention]

However, since such measuring devices are composed of analog circuits, measurement errors are likely to occur.
Therefore, there was a drawback that the detection accuracy decreased. The present invention has been made in view of the above, and an object of the present invention is to provide a measuring device that is capable of highly accurate measurement and that can easily perform various corrections.

[Means to solve the problem]

In order to achieve such an objective, the present invention
A voltage detection section that outputs a change in a physical quantity as a voltage change between two terminals, a zero measurement mode that measures the potential of one terminal of the voltage detection section, and a voltage measurement mode that measures the potential of the other terminal of the voltage detection section. a mode selection means for selectively switching the voltage detection section; and a mode selection means for selecting and switching the voltage detection section; In the zero measurement mode, each time the capacitor's charging voltage reaches the potential of one terminal of the voltage detection section, and in the voltage measurement mode, the capacitor's charging voltage is compared with the other terminal potential of the voltage detection section. It has a discharge circuit that discharges the capacitor for a certain period of time each time the terminal potential is reached, and the time required for charging and discharging the capacitor multiple times in zero measurement mode and voltage measurement mode. A voltage-frequency conversion circuit that converts one terminal potential and the other terminal potential of the voltage detection section into pulse signals of corresponding frequencies, and pulses from the voltage-frequency conversion circuit in zero measurement mode and voltage measurement mode, respectively. A first counter that counts the number of clock pulses and outputs a counting output when the counted value reaches a predetermined value; a second counter that starts and stops counting the clock pulses according to the count output from the first counter; and a second counter that receives the count output from the first counter in the zero measurement mode and the voltage measurement mode, respectively. Second
a digital arithmetic circuit that reads the counting result of the second counter and calculates the difference with the counting result of the second counter in the zero measurement mode, and measures a physical quantity from the arithmetic result of the digital arithmetic circuit. do.

[Effect]

In the present invention, the second
The potential at one terminal of the voltage detecting section is measured from the counting result of the second counter, and the potential at the other terminal of the voltage detecting section is similarly measured from the counting result of the second counter in the voltage measurement mode, and, A difference calculation between the one terminal potential and the other terminal potential is performed,
Thereby, the two terminal potentials of the voltage detection section, that is, the output voltage of the voltage detection section are detected, and the physical quantity is measured based on the output voltage.

【Example】

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an overview of an embodiment of the invention, FIG. 2 is a circuit diagram showing the embodiment in detail, and FIG. 3 is a time chart for explaining measurement operations. In FIG. 1, 1 is a voltage detection section, 2 is a selection circuit for the detection section 1, 3 is a frequency conversion circuit, 4 is a counter, 5 is a timer, 6 is a reference clock generation circuit,
7 is a digital processing device such as a microprocessor (hereinafter also referred to as μ-COM arithmetic circuit), 8 is an optical transmission circuit, 9 is a power supply circuit using a battery, and 10 is a keyboard. Further, as shown in FIG. 2, each of these parts includes a detection part 1 composed of, for example, a thermocouple;
The detection section selection circuit 2 includes a switch SW2 (for example, a complementary MOS analog switch or relay is used) for switching the state of the detection section 1.
It consists of In addition, the frequency conversion circuit 3 compares the capacitor C charged with a constant current from the constant current source CO, the charging voltage E _b and the detected voltage E _a amplified by the operational amplifier OP1. The voltage is set by the operational amplifier OP2 which outputs an output when the charging voltage E _b exceeds the detection voltage E _a and the output of a predetermined level (threshold level) from the operational amplifier OP2. and a given time constant (resistance R _f
Flip-flop ( _D type) that is reset after a certain period of time determined by
, and SW1 (SW11, SW12) for switching charging and discharging of capacitors C and _Cf. Note that when using a conventional general D-type flip-flop, a special circuit, such as a Schmitt circuit, for determining the threshold level described above is required in the preceding stage.
When using a MOS (complementary MOS) flip-flop, such a circuit is not necessary, and the switching voltage can be used as the threshold voltage as is. Also, switch SW1
is similar to the switch SW2 described above. The timer 5 consists of two-stage counters CT2 and CT3, and receives a reset signal from the μ-COM calculation circuit 7.
When PO3 is released, counting of the clock signal given from the reference clock generation circuit 6 is started, and the count up (counting) from counters CT1 and CT4 is started.
Counting is stopped by the UP) signal. The .mu.-COM calculation circuit 7 is supplied with power from the battery power supply circuit 9, and is driven by a clock signal from the reference clock generation circuit 6 to perform various calculations and control operations.
For example, by sending the mode selection signals PO1 and PO2 to switch SW2 of the detection section selection circuit 2, the detection voltage E ₁
A measurement mode in which no voltage is applied (hereinafter also referred to as zero measurement mode) and a detection voltage _E1 measurement mode (hereinafter also referred to as _E1 measurement mode) are selected. In addition, when not measuring, the counter 4 and timer 5 are reset by the reset signal PO3, and when measuring, the reset signal PO3 is released to make them perform counting operation, and the count UP signal of the counter 4 is sent to the interrupt signal IRQ. The counting result from the timer 5 is read through terminals PI0 to PI15, and predetermined arithmetic processing is performed based on the read information. The μ-COM calculation circuit 7 includes a keyboard 10 for instructing operations to adjust the zero point and span to avoid measurement errors;
In addition, in order to save power, the reference clock generation circuit 6
Alternatively, a standby mode circuit 12 for intermittently operating the μ-COM arithmetic circuit 7 itself, and a light emitting element LED and a light receiving element PD that exchange information by light with a host computer on the management room side (not shown). The optical transmission circuit 8 equipped with the optical transmission circuit 8 and the abnormality (full lighting) detection circuit 11 of the light emitting element LED in the optical transmission circuit 8 are connected, but these parts are not particularly relevant here, so the details are omitted. do. Note that 9 is a battery power supply circuit for supplying power to each required part in FIG. 1 or 2. The measurement operation will be explained below with reference to FIGS. 2 and 3. In the initial state, the mode selection signals PO1 and PO2 are not given from the μ-COM arithmetic circuit 7,
Counters CT1, 4 and timer 5 are in a reset state by reset signal PO3. here,
When the zero measurement mode signal as shown in Figure 3A is applied and the reset signal is released as shown in Figure 3B, the capacitor C is driven by the constant current from the constant current circuit CO to E _b in Figure 3C. It will be charged like this. In this zero measurement mode, switch SW2 is switched to the opposite side from the position shown in Figure 2, and the measurement voltage E ₁
is not applied, a predetermined voltage (K ₂ V _DD ) obtained by dividing the power supply voltage V _DD by resistors R ₁ and R ₂ is applied to the input side of the operational amplifier OP1, and its output side, that is, the input side of operational amplifier OP2.
A voltage of K ₁ K ₂ V _DD (K ₁ is the gain of the operational amplifier OP1) is applied. this voltage
If K ₁ K ₂ V _DD is E _a and the voltage charged by capacitor C is E _b , the operational amplifier OP2 compares these voltages, and when E _b ≥ E _a , outputs and switches the flip-flop Q1. (Note that the voltage E _a
The relationship between E b and E _b is shown in Figure 3 C. ). When flip-flop Q1 is set, its output is applied to counters CT1, 4 and also to switch SW1. As a result, switch SW12 is opened and a charging circuit is formed by resistor R _f and capacitor C _f . At this time, the switch SW11 is switched to the opposite side from the position shown in FIG. 2, and the capacitor C is discharged. When the charging voltage of the capacitor C _f reaches a predetermined value after a predetermined time t _c as shown in FIG. An output pulse of width (t _c ) will be obtained.
Furthermore, since analog switch SW1 is also turned off by resetting flip-flop Q1, switches SW11 and SW12 return to the positions shown in FIG. Thus, a discharge circuit for capacitor C _f is formed. Since the time t ₁ for the charging voltage to reach the input measurement voltage (see d in Figure 3) is proportional to the input measurement voltage, the output of flip-flop Q1 generates a pulse signal with a frequency proportional to the measurement voltage. You will get it. This pulse signal is counted by the counter 4, and when it reaches a predetermined value, a count up output (count up) as shown in FIG. 3 is issued, and the timer 5 stops counting as shown in FIG. 3. When the reset signal PO3 is released, the timer 5 stops counting the clock pulses from the pulse generating circuit 6, and the counting result is sent to the μ-COM arithmetic circuit 7 via the terminals PI0 to PI15, which receives the count up signal from the counter 4. be read. Here, if the voltage applied to the + side input terminal of operational amplifier OP2 is E _a and the voltage applied to the - side input terminal (charge voltage of capacitor C) is E _b ,
The voltages E _a and E _b are each expressed as E _a =K ₁ K ₂ V _DD E _b =1/C∫Idt=I/Ct. Here, I is the current value (constant) supplied to the capacitor C, and K ₁ and K ₂ are constants as described above. Therefore, if t ₁ is the time when E _a = E _b , I/C・t ₁ = K ₁ K ₂ V _DD , so t ₁ is t ₁ = C/IK ₁ K ₂ It can be obtained as V _DD ......(). On the other hand, the discharge time t _c due to capacitor C _f and resistor R _f
is constant, and if the capacitor C is discharged within this time, the clock pulses from the reference clock generation circuit 6 can be counted until the capacitor C is charged and discharged n times. Thus, the charging and discharging time T ₁ of the capacitor C can be measured (note, strictly speaking, only the charging time is measured). This charging/discharging time T ₁
As is clear from Figure 3D, charging (t ₁ ) is n times, while discharging (t _c ) is n-1 times, so T ₁ = nt ₁ + (n-1) It can be obtained as t _c ......(). In addition, in this way, n
The time measurement counter CT2, CT counts the times.
The number n is selected as appropriate depending on the output frequency of the reference clock generating circuit 6, the capacitance value of the capacitor C, etc. In this way, the charging and discharging time of capacitor C is T ₁
After determining , the μ-COM arithmetic circuit 7 switches the switch SW2 to the _E1 measurement mode using the mode selection signals PO1 and PO2, and measures the charging/discharging time _T2 of the capacitor C in the same manner as described above. The operating mode in this case is exactly the same as above, and the time chart is shown in the right half of FIG. 3 as _E1 measurement mode. In this case, the operational amplifier OP
Since the measurement voltage E ₁ will be applied to the input side voltage E _a of 2, the charging time t ₂ will be as shown in () above.
Similar to the formula, it is expressed as t ₂ =C/IK ₁ (K ₂ V _DD +E ₁ ) (). Therefore, its charging and discharging time
Similarly to formula (), T ₂ becomes T ₂ = nt ₂ + (n-1) t _c ...... (), and the difference between the charging and discharging times T ₂ and T ₁ expressed by formulas () and () above is Then, T ₂ −T ₁ =nC/IK ₁ E ₁ =KE ₁ . In other words, the difference in charging and discharging time of capacitor C in E ₁ measurement mode and zero measurement mode T ₂
It can be seen that the input measurement voltage can be found from −T ₁ . The μ-COM arithmetic circuit 7 calculates the difference as described above, and also measures the voltage value, that is, the physical quantity, by performing a predetermined conversion.

【Effect of the invention】

As described above, according to the present invention, in a device that performs measurement by converting a physical change into a voltage change, the voltage value is converted into a frequency signal corresponding to the voltage value, and then further converted into a predetermined digital signal. Since physical quantities are measured by performing predetermined calculations based on digital quantities, measurement accuracy is improved, and various correction calculations such as temperature correction as well as zero/span adjustment can be performed by simply changing the program. This has the advantage that it can be achieved easily by using only one method. Furthermore, in the present invention, in the zero measurement mode, one terminal potential of the voltage detection section is measured from the counting result of the second counter, and in the voltage _E1 measurement mode, the voltage is similarly measured from the counting result of the second counter. The potential of the other terminal of the detection section is measured, and the difference between the one terminal potential and the other terminal potential is calculated, thereby detecting the potential between the two terminals of the voltage detection section, that is, the output voltage of the voltage detection section. be done. By calculating the difference in this way, measurement errors caused by temperature fluctuations can be avoided. That is, theoretically, in the above equation (), everything except the charging time t ₂ is constant, so if the charging time t ₂ is measured by a clock pulse, the detection voltage E ₁ can be measured from the above equations () and (). It should be possible. However, in reality the capacitor C
The circuit constant of the discharge circuit that sets the discharge time t _c changes due to temperature fluctuations, and therefore the discharge time t _c changes, so the charge/discharge time T ₂ expressed by equation () is not involved in the measurement. This includes error factors that vary due to variations in the discharging time _tc , regardless of the charging time _t2 . Therefore, in the present invention,
As mentioned above, in the zero measurement mode, one terminal potential of the voltage detection section is measured from the counting result of the second counter, and in the voltage _E1 measurement mode, the potential of the voltage detection section is similarly measured from the counting result of the second counter. The other terminal potential is measured, and the difference between the one terminal potential and the other terminal potential is calculated, and the term of the discharge time t _c , which is affected by temperature fluctuation, is eliminated from the calculation result. Thereby, the influence of temperature can be minimized.

[Brief explanation of drawings]

FIG. 1 is a block diagram schematically showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing the embodiment in detail, and FIG. 3 is a time chart for explaining the measurement operation. Description of symbols, 1...detection section, 2...detection section selection circuit, 3...frequency conversion circuit, 4, CT1 to CT3...
...Counter, 5...Timer, 6...Reference clock pulse generation circuit, 7...μ-COM calculation circuit,
8... Optical transmission circuit, 9... Battery power supply circuit, 1
0...Keyboard, 11...LED abnormality detection circuit,
12...Standby mode circuit, E ₁ ...Measurement voltage, SW1, SW2...Switch, OP1, OP2
...Operation amplifier, CO...Constant current circuit, R ₁ , R ₂ ,
R _f ...Resistor, C, C _f ...Capacitor, Q1...Flip-flop.

Claims (1)

[Scope of Claims] 1. A voltage detection section 1 that outputs a change in a physical quantity as a change in voltage between two terminals, a zero measurement mode that measures the potential of one terminal of the voltage detection section, and the other of the voltage detection section. mode selection means 2 for selectively switching the voltage detection section to a voltage measurement mode in which the terminal potential of the terminal is measured; a capacitor whose charging voltage is compared with the potential of the other terminal of the voltage detecting section in the voltage measurement mode, and a charging voltage of the capacitor reaching the potential of one terminal of the voltage detecting section in the zero measurement mode. and a discharging circuit that discharges the capacitor for a certain period of time each time the charging voltage of the capacitor reaches the other terminal potential of the voltage detection section in the voltage measurement mode; In the measurement mode, each of the capacitors is charged and discharged a plurality of times, and from the time required for the plurality of charges and discharges, one terminal potential and the other terminal potential of the voltage detection section are respectively detected as a pulse signal with a frequency corresponding to the time required for the multiple charging and discharging operations. a voltage-frequency conversion circuit 3 for converting into a voltage-frequency conversion circuit; and counting the number of pulses from the voltage-frequency conversion circuit in each of the zero measurement mode and voltage measurement mode, and counting when the counted value reaches a predetermined value (n). a first counter 4 that outputs an output, and starts counting clock pulses from a clock signal source when charging of the capacitor starts in each of the zero measurement mode and voltage measurement mode, and outputs a count output from the first counter; The second counter 5 thus stops counting the clock pulses.
and, receiving count outputs from the first counter in the zero measurement mode and voltage measurement mode, respectively, and reading the count results of the second counter, and reading the count results of the second counter in the zero measurement mode. and a digital calculation circuit 7 for calculating the difference between the calculation result of the second counter in the voltage measurement mode, and measuring the physical quantity from the calculation result of the digital calculation circuit.