JPH0782480B2 - Computer connection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a method for connecting a plurality of computers in a composite computer system.

[Outline of Invention]

When a dedicated transmission line is provided for each computer, it is necessary to add the transmission line when adding the computer. Therefore, by allowing each computer to transmit to a plurality of transmission lines without providing a dedicated transmission line to each computer, it is not necessary to add a transmission line even if the number of computers is increased, and it is complicated. Since it requires no hardware or software, it is particularly effective for networks of control devices that include small computers, personal computers, and microcomputers.

[Conventional technology]

As a conventional technique, for example, there is a "computer connection system" disclosed in Japanese Patent Publication No. 60-51145.

The conventional method is a method of providing a dedicated transmission line corresponding to each computer, the details of which will be described below with reference to the drawings.

FIG. 4 shows a computer network according to the conventional method. In the figure, L ₁ , L ₂ , L ₃ , and L ₄ are links having buffers for transmission and / or reception, ports, and logic having some judgment function. C ₁ , C ₂ , C ₃ is computer, M ₁ , M ₂ , M
₃ is a memory and P ₁ , P ₂ , P ₃ , ... P ₁₃ are peripherals (peripheral devices).

The links L ₁ , L ₂ , and L ₃ are connected to the computers C ₁ , C ₂ , and C ₃ , and the link L ₄ is connected to the peripheral groups P _{7 to} P ₁₃ . Also, l ₁ , l ₂ , l ₃ and l ₄ represent lines.

The insides of the links L ₁ , L ₂ , L ₃ , L ₄ are configured as shown in FIG. 5, for example.

Here, S ₁ and S ₂ are buffer memories CE ₁ and
CE ₂ is an input / output port for the line and the computer, respectively.

The link has the following functions.

Now, when there is a request from computer C ₁ to computer C ₃ , the port of link L ₁ connected to computer C ₁
The message is stored in the buffer memory S ₁ via CE ₂ together with the address. When there is a message to be transmitted in the buffer memory S ₁ , the transmission signal including the address is transmitted from the transmission port CE ₁ to the line l ₁ . The link L ₃ of the addressed computer C ₃ can receive and receive the above transmission signal unless the receiving buffer memory S ₂ contains information, in other words if the computer is not receiving. Send back a signal that there is.

Similarly, control signals and data are exchanged between computers.

[Problems to be Solved by the Invention]

In the above-mentioned conventional technique, a dedicated transmission line is required for each computer. Therefore, when adding computers, the transmission lines must be expanded and the transmission lines must be connected to all links on the network. There are problems that must be addressed.

In order to solve the above problems, it is an object of the present invention not to add a transmission line even if a computer is added.

[Means for Solving the Problems]

To achieve the above object, the present invention enables each computer to transmit to a plurality of transmission lines without providing a dedicated transmission line to each computer. In this case, each computer must be empty (not used) before transmitting, in order to prevent multiple computers from duplicating one transmission line.
It is equipped with a means to detect the transmission line and send it out only to the empty transmission line.

[Action]

As a result, a transmission line corresponding to each computer becomes unnecessary, so that when a computer is added to connect to a network, it is not necessary to add a transmission line, and complicated software control can be omitted.

〔Example〕

 Hereinafter, examples of the present invention will be described in detail.

FIG. 1 shows an embodiment of a computer network configured by the computer connection system according to the present invention. In FIG. 1, the computer A20 is connected to the transmission line 01 through the link 10. The link 10 includes a communication interface circuit 11, a transmission selector circuit 13, and a reception selector circuit.
It consists of 12. The communication interface circuit 11 is
The data type of the computer A20 and the data type of the transmission line 01 are converted. This is because the transmission line 01 performs serial format data transfer in contrast to bus format data transfer that the computer A20 can easily understand. Transmit selector circuit
13 selects a transmission line from the transmission data from the communication interface circuit 11 according to an instruction from the computer A20 and outputs the transmission data to the selected transmission line. The reception selector 12 outputs the reception data from the transmission line selected by the computer A20 to the communication interface 11.
The other computers B to E30, 40, 50, 60 are also computer A2
Similar to 0, it is connected to the transmission line 01 through the link 10. Each transmission line 01 is connected to each link 10 in the same way,
The data flowing through each transmission line has the same data type,
If a transmission line is used, be sure to periodically output data to the transmission line.

This operation will be described below. When data is transferred from computer A20 to computer C40, computer A
20 is a transmission line by controlling the reception selector circuit 12.
Select one 01, and through the communication interface circuit 11,
The data flowing through the selected transmission line 01 is received. If the received data does not occur even after one fixed period or more, the selected transmission line 01 is not used by another computer, and the computer A20 passes the communication interface circuit 11 and the transmission selector 13 to the computer 40. The transmission request signal including the address information to the transmission line 01
Is repeatedly sent to the system at regular intervals. If the received data occurs within a certain period, the transmission line
It is assumed that 01 is used by another computer, the reception selector 12 is controlled to select another transmission line 01, and it is checked whether or not another computer is using 01. When used, the above operation is repeated to find an unused transmission line 01, and then the transmission request signal is output to the transmission line 01.

The computer C40 repeatedly selects all the transmission lines by controlling the link 10 connected to the computer C40, and checks the presence / absence of a transmission request signal to itself. If there is a transmission request signal to itself, the computer C40 sends back a response signal to the computer A20 by using the transmission line that has received the transmission request signal, and thereafter the transmission line 01 is transferred between the computer A20 and the computer C40. Use to transfer data.

In Fig. 1, when adding a new computer,
Only adding the link 10 to the transmission line 01 does not require addition of the transmission line 01 and modification of the existing link 10 and software.

FIG. 2 is a block diagram showing in detail the link 10 of FIG. 1 and its periphery. In FIG. 2, the transmission selector circuit
The output of 13 is connected to the output gate 14 and the signal detection circuit 110. The signal detection circuit 110 constantly monitors the transmission signal from the transmission selector circuit 13, and when detecting the transmission signal, sets the flip block 130 and enables the output gate 14 to output the transmission signal to the transmission line 01. . In the delay circuit 120, the set signal of the flip-flop 130 is delayed for a predetermined time, the flip-flop 130 is reset, and the output gate 14 is disabled.

Hereinafter, this operation will be described. Computer A20
Outputs fixed length transmission data to the communication interface circuit 11. The transmission data is input to the output gate 14 through the communication interface 11 and the transmission selector 13, and at the same time, the signal detection circuit 110 sets the flip-flop 130 and outputs it to the transmission line 01.

The flip-flop 130 is set, and after the fixed length transmission data is transmitted to the transmission line 01, the flip-flop 130 is reset by the delay circuit 120, the output gate 14 opens the transmission line 01, and the response from the computer of the communication partner. Is possible.

The fixed length transmission data can be made variable by limiting the maximum length. In this embodiment, control of the output gate to the transmission line can be easily realized.

FIG. 3 is a block diagram of an embodiment of the present invention by a method different from the embodiment shown in FIG. In the embodiment shown in FIG. 2, there is a method of delaying the set signal of the flip-flop 130 by the delay circuit 120 to disenable the output gate 14, but in the embodiment shown in FIG. 3, the timing generation circuit 300 is used. The flip-flop 130 is reset at regular intervals. In this case, the computer A20 needs to send data so that the flip-flop 130 is not reset during transmission. Therefore, the timing generation circuit 300 outputs the transmission timing signal to the computer A20. The computer A20 sends fixed-length transmission data or variable-length transmission data with the maximum length limited, in accordance with the transmission timing signal. The transmission data of the computer A20 is output to the transmission line in the same manner as the embodiment shown in FIG. The timing generation circuit 300 resets the flip-flop 130 and disables the output gate 14 after a time required to transmit the fixed length transmission data or the variable maximum data length. According to the present embodiment, a corresponding timing generation circuit is added to each transmission line instead of the required delay circuit corresponding to each transmission line of the embodiment shown in FIG. Can be realized with various hardware. Furthermore, when using a microcomputer chip with a built-in communication interface circuit as a computer,
Since it can be realized by several ICs including a computer and a link, it is effective for a small and low-cost system.

〔The invention's effect〕

According to the present invention, a computer network can be configured without requiring complicated hardware and software, and successive additions can be easily performed. Therefore, a network of control devices including a small computer, a personal computer, and a microcomputer can be easily realized.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing in detail the link and its periphery in FIG. 1, and FIG. 3 is an embodiment different from that of FIG. Block diagram, FIG. 4 is a block diagram showing a conventional method, and FIG.
The block diagram which showed the inside of the link of the conventional system in the figure. 01 …… Transmission line, 10 …… Link, 11 …… Communication interface circuit, 12 …… Reception selector, 13 …… Transmission selector, 20 ・ 3
0 ・ 40 ・ 50 ・ 60 …… Computer A to E, 14 …… Output gate, 110 …… Signal detection circuit, 120 …… Delay circuit, 130 …… Flip-flop, 300 …… Timing generation circuit.

Claims (4)

[Claims] 1. An interconnection of a plurality of computers (including peripherals), a plurality of computers each having a link having an input / output port and a transmission / reception buffer, and a plurality of computers having the same number or different numbers from the computers. Transmission lines are provided and the plurality of transmission lines are connected to the respective links, and each computer selects an empty transmission line that does not detect a periodic data signal from another computer from the plurality of transmission lines. Using this, the transmission data including the address signal and the transmission request signal is transmitted to another computer, and the other computer receiving the transmission data through the transmission line transmits the receivable signal to the address signal. The transmission data including the request signal is sent back using the transmission line, and after that, the transmission line including A computer which sends the transmission data and a computer which sends back the receivable signal back to each other, and during interconnection, the computer connected to each other periodically outputs data to the transmission line. Connection method. 2. The transmission data according to claim 1, wherein the transmission data has a fixed length, and the link detects the transmission data from the computer to open a gate for outputting from the link to the transmission line to transmit the transmission data. A computer connection system comprising: means for outputting data to a transmission line; and means for closing the gate after a predetermined time has elapsed from the start of output to the transmission line. 3. The transmission data according to claim 1, wherein the transmission data has a fixed length, and the link gives the computer a timing for outputting the transmission data to the transmission line at regular intervals, and the transmission data of the computer is present. In that case, the computer outputs the transmission data to the link at that timing, and the link opens the gate that outputs to the transmission line by detecting the transmission data from the computer.
A computer connection system comprising: a means for outputting the transmission data to a transmission line; and a means for closing the gate after a predetermined time from the timing. 4. A computer connection system according to any one of claims 2 and 3, wherein transmission data has a variable length and a maximum length thereof is limited.