JPH0779136A - Voltage controlled oscillator - Google Patents

Abstract

PURPOSE:To provide a voltage controlled oscillator in which high speed response is attained, the effect of dispersion in an Early voltage of transistor(TR) is avoided and a highly accurate oscillating frequency is obtained. CONSTITUTION:The voltage controlled oscillator is provided with a 1st current path connecting to a 1st constant current source Q13 whose current is I, a 2nd current path connecting to the 1st constant current source Q13 in pairs with the 1st current path, a 3rd current path connecting to the 2nd constant current source Q14 whose current is nearly equal to the current I, a 4th current path connecting to the 2nd constant current source Q14 in pairs with the 3rd current path, an oscillation capacitor C1 connected between the 1st current path and the 3rd current path, and bypass current supply means Q5, Q6 supplying a bypass current to a current path in pairs with a current path having a high potential at a connecting point of the oscillation capacitor C1 in either of the 1st current path and the 3rd current path when the direction of the charging current to the oscillation capacitor C1 is switched.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a voltage controlled oscillator circuit, and more particularly to a voltage controlled oscillator circuit used in a PLL (Phase Locked Loop) circuit.

[0002] A PLL circuit is a circuit for controlling an oscillation frequency of an input signal input to the PLL circuit and an oscillation frequency of an output signal output from the PLL circuit so as to maintain a constant phase relationship, and an FM demodulator and a stereo demodulator. It is used in many applications such as instruments and frequency synthesizers.

In recent years, it has been used in a hard disk device, a control circuit for keeping the number of rotations of a magneto-optical disk constant, and a signal processing circuit for reproducing a signal read from the disk, and these circuits are used. In order to meet the demand for higher operating speed, there is a demand for higher operating speed of the voltage controlled oscillator circuit.

[0004]

2. Description of the Related Art FIG. 3 shows a circuit configuration example of a conventional voltage controlled oscillator circuit. The voltage controlled oscillator circuit is roughly classified into an input voltage control circuit that generates an oscillation control current based on the input voltage V _IN and a mono-multivibrator circuit that controls the charging / discharging timing of the oscillation capacitor based on the oscillation control current. And are provided.

[0005] Input voltage V _IN to the input voltage control circuit is applied, in the initial state, the transistor Q _'12, the transistor Q' When ₉ is on the high potential side power source V
Zener diode from _CC, transistor Q _'12, the transistor Q' ₉ and B 'through the point oscillator capacitor C' to charge the _1.

[0006] After that, 'the higher the potential of the point, A' B when the potential of the point is lower, in turn, gradually transistor Q _'11
And the transistor Q _'1 is turned on, conversely transistor Q' ₁₂ and transistor cormorants Q _'9 is in the OFF state, the Zener diode from the high potential side power source V _CC, transistor Q' _11, the transistor Q _'1 and so that the charging in ₁ 'for oscillation capacitor C through a point' a.

[0007] oscillation frequency f of the voltage controlled oscillator at this time ', the oscillator capacitor C' the capacity of ₁ and CC, transistor Q _'1 or transistor Q' ₉ based upon conduction - emitter voltage V _{BE (on)} and the charging current of the oscillation capacitor C ′ ₁ is I _{CC 1} , then f ′ = I _CC1 / (4 · CC · V _{BE (on)} ).

By the way, the input in the input voltage control circuit
Voltage to V_INAnd transistor Q ' ₃Collector current of
I ’₃And transistor Q '₈The collector current of
₈Then, the transistor Q’at this time_FiveCollector of
Flow I '_FiveAnd transistor Q '₆Collector current I '₆
Is I = I '₃+ I '₈+ I '_Five+ I '₆ Therefore, the input voltage V_INCorresponding to 0 ≦ I ′_Five, I ’₆It changes within the range of ≤I / 2.

Accordingly, the oscillation capacitor C 'charging current I _{CC1 1} also, I _CC1 = (I' because it is _{5 + I '6) / 2} + I, in response to the input voltage _{V IN, I ≦ I CC1 ≦} I + I It will change in the range of / 2.

As a result, the oscillation frequency f'of the voltage controlled oscillation circuit changes in accordance with the input voltage V _IN ,
By setting the input voltage V _IN appropriately, a desired oscillation frequency can be obtained.

[0011]

[SUMMARY OF THE INVENTION] In the above-described conventional voltage controlled oscillator, the transistor Q _'5, Q' _6,
Q _'13, Q' _{for 14} parasitic capacitance between the collector substrate occurs, switches the charging direction, since would develop gradually, rising and falling of the oscillation waveform is delayed,
There is a problem that high-speed oscillation operation cannot be performed.

Further, the transistor Q _'1 and the transistor Q' ₅ operates in pairs in FIG. 3, but operates a transistor Q _'9 and the transistor Q' ₆ pairs, off-state or off from the on state when switching from the state to the oN state, the collector potential of the transistor Q _'5 and transistor Q' ₆ becomes unstable, transistor Q - collector of 'the collector of _5-emitter voltage V _CE5 the transistor Q' ₆ - emitter voltage There will be a difference with V _CE6 .

For this reason, when the Early voltage is small due to the process variation at the time of manufacturing the transistor, as shown in the equations (10) and (11), the current I'is taken into consideration in consideration of the Early voltage V _A. it is necessary to obtain the ₄ and the current I _'7.

I ′ ₄ = I _S (1 + ((V _CE4 −R ₃ 'I _y ) / V _A )) × exp (V _IN / V _T ) ... (10) I ′ ₇ = I _S (1+ ( (V _CE7 + R ₃ 'I _y ) / V _A )) × exp (V _IN / V _T ) ... (11) Therefore, the oscillation frequency f ₄ based on the equation (10) is f ₄ = (1 / (4R ' ₂ -C' ₁ )) (1-((I ' ₄
+ ΔI) / I), and the oscillation frequency f ₇ based on the equation (11) is f ₇ = (1 / (4R ′ ₂ · C ′ ₁ )) (1-((I ′ ₇
−ΔI) / I), and f ₄ ≠ f _7, and the oscillation frequency varies depending on the charging direction of the oscillation capacitor C ′ ₁ .
There is a problem that it is impossible to generate a rectangular wave of%.

Therefore, an object of the present invention is to provide a voltage-controlled oscillator capable of high-speed response, eliminating the influence of variations in the Early voltage of transistors due to variations in the manufacturing process, and obtaining a highly accurate oscillation frequency. To do.

[0016]

[Means for Solving the Problems]
Therefore, the first aspect of the invention is to provide an output of a frequency according to the input control voltage.
In a voltage controlled oscillator that outputs a signal,
1 constant current source (Q₁₃) Connected to the first current path,
1 constant current source (Q₁₃) And is paired with the first current path.
Second current path and a second constant current source (Q₁₄)
A third current path that is continued and flows substantially the same current as the first current path;
The second constant current source (Q₁₄) Connected to the third current path
The first current that is paired with and flows the same current as the second current path.
4 current paths and between the first current path and the third current path.
Continued oscillation capacitor (C₁) And the oscillation controller
Densa (C₁) When the charging current direction to
Either the first current path or the third current path
The oscillation capacitor (C ₁) Has a high potential at the connection point
Supply bypass current to the current path paired with the current path
Bypass current supply means (Q_Five, Q₆) And
To achieve. Output an output signal with a frequency according to the input control voltage
In the voltage controlled oscillator,
ND) connected to the first constant current source (Q₁₃) And one end is low
Second constant current source connected to potential side power supply (GND)
(Q₁₄) And the first constant current source (Q₁₃) To the other end
The input terminal is connected and the base terminal is connected to the first input terminal.
First input stage transistor (Q₂) And the first constant current
Source (Q₁₃) Has an emitter terminal connected to the other end
Second input stage transistor with base terminal connected to input terminal
(Q_Four) And the second constant current source (Q₁₄) To the other end
Is connected to the base terminal and the first input terminal is connected to the base terminal
3rd input stage transistor (Q_Ten) And the second constant
Current source (Q₁₄) Is connected to the other end of the
4th input stage transition with base terminal connected to input terminal
Star (Q₇) And the first input stage transistor (Q₂)
The emitter terminal is connected to the collector terminal of the
Source (V _CC) With the collector terminal connected to
(Q₁) And the second input stage transistor (Q_Four)of
An emitter terminal is connected to the collector terminal,
Register (Q₁) Is connected to the collector terminal
Second transistor (Q₃) And the third input stage
Langista (Q_Ten) The emitter terminal is connected to the collector terminal
The high-potential side power source (V_CC) Is connected to the collector terminal
The third transistor (Q₉) And the fourth input stage tiger
Register (Q₇) The emitter terminal is connected to the collector terminal
The third transistor (Q₉) To the collector terminal
The fourth transistor (Q₈)
And the first input stage transistor (Q ₂) And the first
Langista (Q₁) Intermediate connection point with the third input stage
Transistor (Q_Ten) And the third transistor (Q₉)
And an oscillation capacitor (C
₁), And the first transistor (Q
₁) Collector terminal and the second transistor (Q₃)of
One end is connected to an intermediate connection point with the collector terminal,
4 transistors (Q₈) And the fourth input stage transistor
(Q₇The other end is connected to the intermediate connection point of
Capacitor (C₁) When the charging current direction to
Therefore, the first input stage transistor (Q₂) Collector
The potential level of the terminal is the third input stage transistor
(Q_Ten) Is higher than the collector terminal potential level
The first bypass switch that is closed and supplies the bypass current.
Touch (Q_Five) And the third transistor (Q₉) This
Connector terminal and the fourth transistor (Q₈) Collector end
One end is connected to an intermediate connection point with the child, and the second transition
Star (Q₃) And the second input stage transistor (Q_Four)of
The other end is connected to the intermediate connection point, and the oscillation capacitor C
₁When the direction of the charging current to the
Input stage transistor (Q_Ten) Collector terminal potential level
Is the first input stage transistor (Q₂) Collector end
Closed and bypassed when higher than the child's potential level
Second bypass switch (Q₆) And
Configure.

[0017]

According to the first aspect of the present invention, the bypass current supply means (Q ₅ , Q ₆ ) is provided in the first current path or the third current path when the charging current direction to the oscillation capacitor (C ₁ ) is switched. A bypass current is supplied to a current path paired with a current path having a high potential at the connection point of the oscillating capacitor (C ₁ ) of either one.

More specifically, bypass current supply means
(Q_Five, Q₆) Is an oscillation capacitor (C₁) Charging
Oscillation capacitor for the first current path when the current direction changes
Service (C ₁The potential at the connection point of) is the oscillation capacitor of the third current path.
Sensor (C₁) Is higher than the potential at the connection point, the first
Supply bypass current to the second current path that is paired with the current path.
To pay.

Therefore, the amount of current flowing through the second current path increases by the amount of the bypass current, and the first current path and the second current path are connected to the same first constant current source. The electric current flowing through it will decrease sharply.

Further, when the charging current direction to the oscillation capacitor (C ₁ ) is switched, the potential at the connection point of the oscillation capacitor of the third current path is set to the oscillation capacitor (C 1 of the first current path).
When it is higher than the potential of the connection point of ₁ ), the bypass current is supplied to the fourth current path paired with the third current path.

Therefore, the amount of current flowing through the fourth current path increases by the amount of the bypass current, and the third current path and the fourth current path are connected to the same second constant current source. The electric current flowing through it will decrease sharply.

As a result, according to the first aspect of the invention, in any case, switching of the charging current direction becomes fast, and a high-speed voltage controlled oscillator can be constructed. According to the second aspect of the invention, the first bypass switch (Q ₅ ) is the collector of the first input stage transistor (Q ₂ ) when the charging current direction to the oscillation capacitor (C ₁ ) is switched. If the potential level of the terminal is higher than the potential level of the collector terminal of the third input stage transistor (Q ₁₀ ), it will be in the closed state, so supply a bypass current to the collector terminal of the second input stage transistor (Q ₄ ). Therefore, the amount of current flowing through the second input stage transistor (Q ₄ ) increases by the amount of the bypass current.

In this case, the first input stage transistor
(Q₂) And a second input stage transistor (Q _Four) Are the same
First constant current source (Q₁₃) Is connected to the
1-input stage transistor (Q₂) Current is drastically reduced
It will be less.

The second bypass switch (Q ₆ ) is
When the charging current direction to the oscillation capacitor (C ₁ ) is switched, the potential level of the collector terminal of the third input stage transistor (Q ₁₀ ) is the potential of the collector terminal of the first input stage transistor (Q ₂ ). since the closed state when higher than the level, the fourth can supply bypass current to the collector terminal of the input stage transistor (Q _7), the current amount flowing through the fourth input stage transistor (Q ₇₎ bypass current Increase by minutes.

In this case, the third input stage transistor
(Q_Ten) And a fourth input stage transistor (Q ₇) Are the same
First constant current source (Q₁₄) Is connected to the
3-input stage transistor (Q_Ten) Current is drastically reduced
It will be less.

As a result, according to the second aspect of the invention, in any case, the switching of the charging current direction becomes fast, and a high-speed voltage controlled oscillator can be constructed. The charge current direction is switched to the collector terminals of the second input stage transistor (Q ₄ ) and the fourth input stage transistor (Q ₇ ) via the first bypass switch (Q ₅ ) or the second bypass switch (Q ₆ ). At this time, a predetermined collector voltage is applied and a stable state is achieved, so that an accurate oscillation waveform having a predetermined duty ratio can be obtained without considering the Early voltage.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will now be described with reference to the drawings. FIG. 1 shows a block diagram of the voltage controlled oscillator circuit.

The voltage control circuit has a bias voltage applied to the base terminal.
Voltage is applied and the emitter terminal is connected to the low potential side power supply GND.
A transistor Q that is connected and functions as a first constant current source.₁₃
And a bias voltage is applied to the base terminal,
The child is connected to the low-potential-side power supply GND, and the second constant current source
Functioning transistor Q₁₄And transistor Q₁₃The
The emitter terminal is connected to the collector terminal and the
First input stage transistor Q with one input terminal connected
₂And transistor Q₁₃Collector terminal to emitter terminal
Is connected, and the base terminal is connected to the second input terminal.
2-input stage transistor Q_FourAnd transistor Q₁₄This
The emitter terminal is connected to the connector terminal and the
Third input stage transistor Q connected to the source terminal_TenWhen,
Transistor Q₁₄The emitter terminal is connected to the collector terminal of
And the fourth input with the base terminal connected to the second input terminal
Stage transistor Q₇And the first input stage transistor Q₂of
The emitter terminal is connected to the collector terminal, and the first resistor R₁
High potential side power source V_CCThe collector terminal was connected to
First transistor Q₁And the second input stage transistor Q_Four
The emitter terminal is connected to the collector terminal of the first resistor R
₁And the first transistor Q ₁Collector end at the intermediate connection point with
Child is connected to the base terminal of the first transistor
Second transistor Q whose terminals are commonly connected₃And the third
Power stage transistor Q_TenThe emitter terminal to the collector terminal of
Connected, the second resistor R₂High potential side power source V_CCTo
Third transistor Q connected to a collector terminal₉And the fourth
Input stage transistor Q₇Collector terminal to emitter terminal
Is connected to the second resistor R₂And the third transistor Q₉in
The collector terminal is connected to the connection point, and the third transistor
Q₉No. 4 with the base terminal commonly connected to the base terminal of
Langista Q₈And the first input stage transistor Q₂And the first
Transistor Q₁Intermediate connection point A and third input stage tiger
Register Q_TenAnd the third transistor Q₉Intermediate connection point B with
Oscillation capacitor C connected between₁And the collector end
The power source V is the high potential side_CCAnd the base terminal is connected to the resistor R
₁And the first transistor Q₁Connected to the intermediate connection point of
Mitter terminal is the third transistor Q₉And the fourth transistor
Q₈Output stage transition connected to the common base terminal of the
Star Q₁₁And the collector terminal is the high potential side power supply V_CCConnected to
And the base terminal has a resistance R₂And the third transistor Q₉in
Is connected to the connection point and the emitter terminal is the first transistor
Q₁And the second transistor Q₃Connected to the common base terminal of
Second output stage transistor Q₁₂And the first transistor
Q₁And the second transistor₃Common connection with the collector terminal
The collector terminal is connected and the first transistor Q₁And the second
Transistor₃Common connection with
Connected, the fourth transistor Q₈And the 4th input stage transition
Star Q₇The emitter terminal is connected to the intermediate connection point of
First bypass transistor that functions as an epass switch
Q_FiveAnd the third transistor Q₉And the fourth transistor Q
₈Common connection with the collector terminal is connected to the collector terminal.
And the third transistor Q₉And the fourth transistor Q₈With
The base terminal is connected to the common connection base terminal,
Register Q₃And the second input stage transistor Q_FourIntermediate connection of
The emitter terminal is connected to the point and it becomes the second bypass switch.
Second bypass transistor Q that functions as₆And with
It is configured.

In this case, the second output stage transistor Q ₁₂ is connected to the first output terminal, and the first output stage transistor Q ₁₁ is connected to the second output terminal. Next, the operation will be described.

The input voltage V _IN is a DC voltage, and the current I ₂ and the current I ₂ are calculated based on the difference voltage, for example, the difference between the base potential of the first input stage transistor Q _{2 and} the base potential of the second input stage transistor Q _4. The magnitude of I ₄ is determined, and the magnitudes of the currents I ₇ and I ₁₀ are determined based on the difference between the base potential of the fourth input stage transistor Q _{7 and} the base potential of the third input stage transistor Q ₁₀ .

Here, the relationships among the currents I ₂ , I ₄ , I ₇ , and I ₁₀ are as follows. I ₂ = I ₁₀ I ₄ = I ₇ I = I ₂ + I ₄ = I ₇ + I ₁₀ Now, as shown in the equivalent circuit of FIG. 2, the current I _x flows through the oscillation capacitor C ₁ and the charging is completed. (Connection point B
The operation will be described with the initial state being a state in which the potential is lower than the connection point A).

At this time, the transistors Q ₁ , Q ₃ , Q ₄ ,
If Q ₅ , Q ₁₀ , and Q ₁₁ are in the off state (open state) and the transistors Q ₂ , Q ₆ , Q ₈ , Q ₉ , and Q ₁₂ are in the on state (closed state), the base of the transistor Q ₁₁ Voltage V
_B becomes V _B = V _CC , and the emitter voltage V _E of the transistor Q ₁₁ becomes V _E = V _CC −V _BE .

On the other hand, since the third transistor Q ₉ is in the ON state, the emitter voltage V _E of the second output stage transistor Q ₁₂ is V _E = V _CC -2IR ₂ -V _BE .

Therefore, when the potential V _{AA at the} point A becomes V _AA = V _CC -2IR ₂ -2V _BE , the first transistor Q ₁ is turned on and the third transistor Q ₉ is turned off.

The potential difference V _C1 across the capacitor C ₁
Is V _C1 = (V _CC −2V _BE ) − (V _CC −R ₂ −2V _BE ) = R ₂ I, and the oscillation cycle T is the charging current from the high potential side power supply V _CC to the capacitor C ₁ . Is I _X , the following equation T / 2 = 2R ₂ I / I _X is satisfied. Therefore, T = 4R ₂ I / I _X. Therefore, the oscillation frequency f is f = I _X / 4R ₂ I.

By the way, in the initial state, the charging current I _X
Is a second resistor R ₂ , a third transistor Q ₉ , a capacitor C ₁ , a first input stage transistor Q ₂ , and a transistor Q _13.
Through the low potential side power supply GND.

The charging current I _X at this time, the _{I X = I-I 4 =} I 2.

When the input voltage is V _IN and the thermal voltage of the transistor is V _T , I ₂ / I ₄ = exp (V _IN / V _T ) ∴I ₂ = I ₄ exp (V _IN / V _T ) (1) However, the thermal voltage V _T is V _T = k · T / q, where q is the charge amount, k is the Boltzmann constant, and T is the absolute temperature.

Similarly, I ₁₀ = I ₇ exp (V _IN / V _T ).

From these equations, the oscillation frequency f is as follows: f = (I-I ₄ ) / (4R ₂ IC ₁ ) = 1 / (4R ₂ IC ₁ ) × (1- (I ₄ / I)) (2) Therefore, from the equations (1) and (2), f = 1 / (4R ₂ IC ₁ ) × [1- (I / (I (exp (V _IN / V _T ) +1))] = 1 / (4R ₂ IC ₁ ) × [1- (1 / (exp (V _IN / V _T ) +1))].

Similarly, the oscillation frequency f can be expressed as follows. _{f = (I-I 7)} / (4R 2 IC 1) = 1 / (4R 2 IC 1) × (1- (I 7 / I)) = 1 / (4R 2 IC 1) × [1- (I / (I (exp (V _IN / V _T ) +1))] = 1 / (4R ₂ IC ₁ ) × [1- (1 / (exp (V _IN / V _T ) +1))] As described above. In addition, the oscillation frequency f of the voltage controlled oscillator circuit is a function of the input voltage V _IN .

Oscillation for oscillating the voltage controlled oscillator circuit
Capacitor C₁When charging to the
It is lower than the potential at point B, and therefore the transistor
Q₁, Q ₃, Q_Four, Q_Five, Q₁₁Is on, Transis
Q₆, Q₈, Q₉, Q₁₂Gradually switches to the off state
Will be crossed.

At this time, in order to decrease the current I ₂ at high speed, the current I ₄ may be increased at high speed. Therefore, in the present embodiment, by supplying a bypass current to the second input stage transistor Q ₄ side through the second bypass transistor Q ₆ which is in the ON state at the time when the charging of the oscillation capacitor C ₁ is completed, the current I Increasing ₄ at high speed.

As a result, the bypass current is the high-potential-side power source V
_The current flows from _CC to the collector terminal of the second input stage transistor Q ₄ via the second resistor R ₂ and the second bypass transistor Q ₆ , and the current I ₄ increases, and the current I ₂ decreases accordingly. It will be.

After that, when the transistor Q ₃ is turned on and a current starts to flow from the high potential side power source V _CC through the first resistor R ₁ and the second transistor Q ₃ , the second bypass transistor Q _{6 is} gradually added. Turns off and the bypass current gradually decreases to almost zero.

The subsequent operation is the same as when the second bypass transistor Q ₆ is not present. Similarly, when the oscillating capacitor C ₁ is charged and the potential at the point A becomes higher than the potential at the point B again, the current I ₇ should be increased at a high speed in order to decrease the current I ₁₀ at a high speed. You can increase it.

Therefore, the first bypass transistor Q which is in the ON state at the time when the charging of the oscillation capacitor C ₁ is completed.
By supplying the bypass current to the fourth input stage transistor Q ₇ side via ₅ , the current I ₇ is increased at high speed.

As a result, the bypass current is the high-potential-side power source V
_The current flows from _CC to the collector terminal of the fourth input stage transistor Q ₇ via the first resistor R ₁ and the first bypass transistor Q ₅ , and the current I ₇ increases, and the current I ₁₀ decreases accordingly. It will be. After that, the fourth transistor Q ₈ is turned on, and the high potential side power supply V _CC
As the current starts to flow through the second resistor R ₂ and the fourth transistor Q ₈ , the first bypass transistor Q ₅ is turned off and the bypass current decreases to almost zero.

The subsequent operation is the same as when the first bypass transistor Q ₅ is not present. Therefore, the bypass current becomes maximum at the timing when the charging direction of the oscillating capacitor C ₁ is switched, and the switching becomes faster,
It is possible to configure a voltage controlled oscillator circuit having a higher rise (or fall) speed.

Further, even when the direction of the charging current is switched, the bypass current is supplied from the collector side of the second input stage transistor Q ₄ or transistor Q ₇ via the second bypass transistor Q ₆ or the first bypass transistor Q _5. Therefore, the potential of the second input stage transistor Q ₄ or the transistor Q ₇ does not become unstable, and the collector-emitter voltage of the second input stage transistor Q _{4 and} the collector-emitter of the fourth input stage transistor Q ₇ Since there is no difference in the voltage between the two, it is not necessary to consider the difference in the Early voltage due to the process variation. Even if the charging direction of the oscillation capacitor C ₁ is different, the oscillation frequency becomes the same, and an accurate rectangle with a duty ratio of 50% is obtained. Can generate waves.

In the above description, the bipolar transistor is used as the transistor, but it is also possible to use a field effect transistor or the like. Further, the same effect can be obtained even if the high-potential side power source and the low-potential side power source are exchanged and the NPN transistor is changed to the PNP transistor.

[0052]

According to the first invention or the second invention, the switching of the charging current direction to the oscillation capacitor can be performed at high speed, and a high-speed voltage controlled oscillator can be constructed. In addition, an accurate oscillation waveform can be obtained without having to consider the Early voltage difference due to the process variation at the time of manufacturing the transistor.

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing a circuit configuration of an embodiment.

FIG. 2 is an equivalent circuit explanatory diagram of the embodiment of FIG.

FIG. 3 is an explanatory diagram showing a conventional circuit configuration.

[Explanation of symbols]

C ₁ ... oscillation capacitor GND ... a low-potential-side power supply Q ₁ ... first transistor Q ₂ ... first input stage transistor Q ₃ ... second transistor Q ₄ ... second input stage transistor Q ₅ ... first bypass transistor Q ₆ ... second bypass transistor Q ₇ ... fourth input stage transistor Q ₈ ... fourth transistors Q ₉ ... third transistor Q ₁₀ ... third input stage transistor Q ₁₁ ... first output stage transistor Q ₁₂ ... second output stage transistor Q ₁₃ … Transistor (first constant current source) Q ₁₄ … Transistor (second constant current source) R ₁ … First resistance R ₂ … Second resistance V _CC … High potential side power supply

Claims (2)

[Claims] 1. A voltage controlled oscillator for outputting an output signal having a frequency according to an input control voltage (V _IN ), comprising: a first current path connected to a first constant current source (Q ₁₃ ) having a current amount I; A second current path connected to the first constant current source (Q ₁₃ ) and forming a pair with the first current path; and a second current path connected to the second constant current source (Q ₁₄ ) having a current amount I A third current path through which the same current flows, and a fourth current path that is connected to the second constant current source (Q ₁₄ ) and forms a pair with the third current path and that flows substantially the same current as the second current path; The oscillation capacitor (C ₁ ) connected between the first current path and the third current path, and the first current path or the first current path when the charging current direction to the oscillation capacitor (C ₁ ) is switched. the third current path the potential high current path of the connection point of the oscillation capacitor (C ₁₎ of one of the Bypass current supply means for supplying a bypass current to the current path in a pair (Q _5, Q ₆₎
And a voltage-controlled oscillator. 2. An input control voltage (V_IN) According to the frequency
In a voltage controlled oscillator that outputs an output signal, one end of which is a first constant current connected to a low potential power supply (GND).
Source (Q₁₃), And a second constant current whose one end is connected to the low-potential-side power supply (GND)
Source (Q₁₄) And the first constant current source (Q₁₃) Is connected to the other end of the emitter terminal
And the first input with the base terminal connected to the first input terminal
Stage transistor (Q₂) And the first constant current source (Q₁₃) Is connected to the other end of the emitter terminal
Second input with the base terminal connected to the second input terminal
Stage transistor (Q_Four) And the second constant current source (Q₁₄) Is connected to the other end of the emitter terminal
And the third input with the base terminal connected to the first input terminal
Stage transistor (Q_Ten) And the second constant current source (Q₁₄) Is connected to the other end of the emitter terminal
And the fourth input with the base terminal connected to the second input terminal
Stage transistor (Q₇) And the first input stage transistor (Q₂) To the collector terminal
The emitter terminal is connected and the high potential side power source (V_CC)
The first transistor (Q₁), And the second input stage transistor (Q_Four) To the collector terminal
The emitter terminal is connected to the first transistor
(Q₁) With the collector terminal connected to the collector terminal of
2 transistors (Q₃), And the third input stage transistor (Q_Ten) To the collector terminal
The emitter terminal is connected and the high potential side power source (V_CC)
The third transistor (Q₉) And the fourth input stage transistor (Q₇) To the collector terminal
The emitter terminal is connected to the third transistor
(Q₉) With the collector terminal connected to the collector terminal of
4 transistors (Q₈) And the first input stage transistor (Q₂) And the first tran
Dista (Q₁) Intermediate connection point and the third input stage tiger
Register (Q_Ten) And the third transistor (Q ₉) With
Oscillation capacitor (C₁)
And the first transistor (Q₁) Collector terminal and the above
2 transistors (Q₃) Intermediate connection point with collector terminal
One end of which is connected to the fourth transistor (Q ₈) And before
Note 4th input stage transistor (Q₇) The other end to the middle connection point
Is connected to the oscillation capacitor (C₁) Charging
When the flow direction is switched, the first input stage
Dista (Q₂), The potential level of the collector terminal is the third
Input stage transistor (Q_Ten) Collector terminal potential level
If it is higher than
1st bypass switch (Q_Five), And the third transistor (Q₉) Collector terminal and the above
4 transistors (Q₈) Intermediate connection point with collector terminal
Has one end connected to the second transistor (Q ₃) And before
Second input stage transistor (Q_Four) The other end to the middle connection point
Is connected to the capacitor C for oscillation.₁Charging current to
When switching the direction, the third input stage transistor
(Q_Ten) Collector terminal potential level is the first input
Stage transistor (Q₂) Collector terminal potential level
If it is higher than the
2 Bypass switch (Q₆) And a voltage-controlled oscillator.