JPH0778747A - Formation of pattern - Google Patents

Formation of pattern

Info

Publication number
JPH0778747A
JPH0778747A JP22271293A JP22271293A JPH0778747A JP H0778747 A JPH0778747 A JP H0778747A JP 22271293 A JP22271293 A JP 22271293A JP 22271293 A JP22271293 A JP 22271293A JP H0778747 A JPH0778747 A JP H0778747A
Authority
JP
Japan
Prior art keywords
resist
eth
resist film
pattern
film thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP22271293A
Other languages
Japanese (ja)
Inventor
Tomiyasu Saito
富康 齋藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP22271293A priority Critical patent/JPH0778747A/en
Publication of JPH0778747A publication Critical patent/JPH0778747A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To suppress an irregularity in the line width of a spectral line and to improve a dimensional controllability of a resist pattern. CONSTITUTION:1) When a resist film is adhered on a base, exposed and developed to form a resist pattern, the reflectivity of the base is adjusted in such a way that a difference between the maximum value and the minimum value of the minimum developable exposure (Eth) in the relational diagram between the Eth and the film thickness of the resist film is reduced. 2) The absorption coefficient of the resist film to exposure light is adjusted. 3) The adjustment in the 1) and the 2) are combined with each other.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造プロセ
ス等におけるレジストパターン形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resist pattern forming method in a semiconductor device manufacturing process or the like.

【0002】近年,半導体装置はますます高速化,高集
積化が進み,それに伴いパターンは微細化されてきた。
そのため,凹凸のある下地に対しても,微細パターンを
安定に形成することが要求される。
In recent years, semiconductor devices have become faster and more highly integrated, and accordingly, patterns have been miniaturized.
Therefore, it is required to stably form a fine pattern even on an uneven base.

【0003】[0003]

【従来の技術】従来のリソグラフィ工程におけるレジス
ト膜厚の決定は,図3,4に示される, フラットなウエ
ハ上における露光可能な最低露光量(Eth) とレジスト膜
厚との関係図においてEth の山と呼ばれるa点に対応す
る膜厚を選択している。この膜厚は最適膜厚と呼ばれ,
パターンの寸法制御性が良い。
2. Description of the Related Art The determination of the resist film thickness in a conventional lithography process is performed by the Eth film in the relationship diagram between the minimum exposure amount (Eth) that can be exposed on a flat wafer and the resist film thickness shown in FIGS. A film thickness corresponding to a point called a mountain is selected. This film thickness is called the optimum film thickness,
Good pattern size controllability.

【0004】ところが,実際のプロセスにおいては, 下
地に凹凸が存在し,上記の関係図で求めた最適膜厚で塗
布されていない箇所がある。そのため,パターンの寸法
制御も最適な条件で行われていないのが現状である。
However, in the actual process, there is a portion where the base has unevenness and is not coated with the optimum film thickness obtained from the above relational diagram. For this reason, the pattern dimension control is not performed under the optimum conditions at present.

【0005】[0005]

【発明が解決しようとする課題】従来例では, パターニ
ング後の寸法制御性の最適化ができず,パターンの寸法
がばらつくといった問題を生じていた。
In the conventional example, the dimensional controllability after patterning could not be optimized, and there was a problem that the pattern dimensions varied.

【0006】本発明は線幅のばらつきを抑え, レジスト
パターンの寸法制御性の向上を目的とする。
An object of the present invention is to suppress variations in line width and improve dimensional controllability of resist patterns.

【0007】[0007]

【課題を解決するための手段】上記課題の解決は, 1)下地の上にレジスト膜を被着し,露光,現像してレ
ジストパターンを形成する際に,現像可能な最低露光量
(Eth) とレジスト膜厚との関係図における Ethの極大値
と極小値の値の差を小さくするように, 該下地の反射率
を調整するパターン形成方法,あるいは 2)下地の上にレジスト膜を被着し,露光,現像してレ
ジストパターンを形成する際に,現像可能な最低露光量
(Eth) とレジスト膜厚との関係図における Ethの山と谷
の値の差を小さくするように, 該レジストの露光光に対
する吸収率を調整するパターン形成方法,あるいは 3)前記1)及び前記2)の調整を組み合わせるパター
ン形成方法により達成される。
[Means for Solving the Problems] To solve the above problems, 1) the minimum developable exposure amount when a resist film is formed on a base, exposed and developed to form a resist pattern.
Pattern formation method that adjusts the reflectance of the underlayer so as to reduce the difference between the maximum value and the minimum value of Eth in the relationship diagram between (Eth) and resist film thickness, or 2) resist film on the underlayer Minimum exposure that can be developed when a resist pattern is formed by depositing, exposing and developing
(Eth) and the resist film thickness The pattern formation method that adjusts the absorptance of the resist with respect to exposure light so that the difference between the peak and valley values of Eth in the diagram is reduced, or 3) above 1) and above This is achieved by a pattern forming method that combines the adjustment of 2).

【0008】[0008]

【作用】図1は本発明の原理説明図である。図1(A) 〜
(C) は Eth−レジスト膜厚の関係図で, 下地の反射率を
(A) →(C)の順に低くした場合, またはレジストの露光
光の吸収を(A) →(C) の順に大きくした場合である。
FIG. 1 is a diagram for explaining the principle of the present invention. Figure 1 (A)
(C) is a relationship diagram of Eth-resist film thickness.
This is due to the case of lowering in the order of (A) → (C) or the case of increasing the absorption of the exposure light of the resist in the order of (A) → (C).

【0009】図1(D) 〜(F) はパターンの線幅−レジス
ト膜厚の関係図で, 線幅のばらつきは(D) →(F) の順に
小さくなる。ここで,(D) は(A) に, (E) は(B) に,
(F) は(C) に対応する。
FIGS. 1D to 1F are diagrams showing the relationship between the pattern line width and the resist film thickness, and the line width variation decreases in the order of (D) → (F). Where (D) is (A), (E) is (B),
(F) corresponds to (C).

【0010】本発明は, この結果を利用して,下地の反
射率, あるいはレジストの露光光の吸収率を調整して,
Eth−レジスト膜厚の関係図における Ethの山と谷とを
近づけることにより, 線幅のばらつきを抑えることがで
きる。
The present invention utilizes this result to adjust the reflectance of the base or the absorptance of the exposure light of the resist,
By making the peaks and valleys of Eth in the relationship diagram of Eth-resist film close to each other, it is possible to suppress variations in line width.

【0011】図1の結果より明らかであるが, Ethの山
aと谷bの差が小さくなると,なぜパターンの寸法制御
性がよくなるのかを説明する。いま,反射率の高い下地
上に,光吸収率の低いレジストを選択した場合は前記図
6のような Eth−レジスト膜厚の関係図が得られる。前
記のように,一般には使用するレジストの膜厚の最適な
選択は Ethの山であるa点 (80mJ) に対応する膜厚が良
いといわれており,それに対し線幅を示現する露光量
は,通常 Eth×Kで表される。ここに,Kは Eth係数と
呼ばれる。いま仮に,通常用いられる値としてK= 2と
すると,最適な露光量は80mJ×2 =160mJ となる。
As is clear from the results shown in FIG. 1, the reason why the dimensional controllability of the pattern is improved as the difference between the peak a and the valley b of Eth becomes smaller will be described. When a resist having a low light absorptivity is selected on a base having a high reflectance, the Eth-resist film thickness relationship diagram shown in FIG. 6 is obtained. As described above, it is generally said that the optimum choice of the film thickness of the resist to be used is the film thickness corresponding to the point a (80 mJ), which is the peak of Eth, whereas the exposure dose showing the line width is , Usually expressed as Eth × K. Here, K is called the Eth coefficient. Now, assuming that K = 2 as a normally used value, the optimum exposure amount is 80 mJ × 2 = 160 mJ.

【0012】しかしながら,実デバイス上にパターンを
形成する場合, 下地の凹凸によりレジスト膜の厚さが不
揃いになる。このときレジストが厚く塗布されてしまう
箇所ができて, そのときの膜厚が Ethの谷b (60mJ) に
対応すると仮定すると, そのときの Eth係数は×2.67
(=160mJ/60mJ) となり,露光量としては大きすぎるこ
とになり,ポジレジストの場合は線幅が細くなる。従っ
て, Eth の山と谷の差をなくすることより,線幅のばら
つきを抑えることができる。
However, when forming a pattern on an actual device, the thickness of the resist film becomes uneven due to the unevenness of the base. At this time, there is a portion where the resist is thickly applied, and assuming that the film thickness at that time corresponds to the valley of Eth (b (60 mJ)), the Eth coefficient at that time is × 2.67.
(= 160mJ / 60mJ), which is too large for the exposure dose, and the line width becomes thinner in the case of positive resist. Therefore, by eliminating the difference between the peaks and valleys of Eth, the variation in line width can be suppressed.

【0013】[0013]

【実施例】【Example】

実施例(1) :下地の反射率を調整するには,反射率の異
なる被膜を成長する。例えば窒化チタン(TiN) は反射率
が〜14%, Bare-Si は〜23%, Alは〜50%であり,これ
らの3種類の膜についての Eth−レジスト膜厚の関係図
を図2,3,4に示す。
Example (1): In order to adjust the reflectance of the underlayer, a film having different reflectance is grown. For example, titanium nitride (TiN) has a reflectance of -14%, Bare-Si of -23%, and Al of -50%. The relationship between Eth-resist film thickness for these three films is shown in Figure 2. 3,4.

【0014】図2,3,4は実施例(1) の説明図で, E
thの下地依存を示す図である。図より,反射率の低い膜
ほど, Ethの山aと谷bの差がなくなっていることがわ
かる。 実施例(2) :一般にレジストは樹脂,感光剤,染料,添
加剤等から形成されている。レジストの光吸収を調整す
るには,次のようにレジストの構成成分を変える。
2, 3 and 4 are explanatory views of the embodiment (1).
It is a figure which shows the background dependence of th. From the figure, it can be seen that the lower the reflectance is, the less the difference between Eth peak a and valley b is. Example (2): Generally, a resist is formed of a resin, a photosensitizer, a dye, an additive and the like. To adjust the light absorption of the resist, the constituent components of the resist are changed as follows.

【0015】 使用する光に対して吸収率の大きい感
光剤を使用する。 使用する光に対して吸収する染料の量を調節する。 図5は実施例(2) の説明図で, Ethに対するレジストの
光吸収率依存を示す図である。
A photosensitizer having a large absorptance for the light used is used. Adjust the amount of dye absorbed for the light used. FIG. 5 is an explanatory diagram of the embodiment (2), and is a diagram showing the dependence of the resist on the light absorption rate with respect to Eth.

【0016】図において,レジストAは染料なしのレジ
スト,レジストBは染料入りのレジストで,レジストB
の方が Ethの山aと谷bの差がなくなっていることがわ
かる。染料の種類と添加量を調整してさらにその差を縮
めることが可能である。
In the figure, resist A is a resist without dye, resist B is a resist with dye, and resist B is
It can be seen that there is less difference between the mountain a and the valley b of Eth. It is possible to further reduce the difference by adjusting the type of dye and the amount added.

【0017】図6は実施例(3)の説明図で,下地の低反
射率と光吸収率を上げたレジストを組み合わせた例であ
る。図の白丸は,下地反射率の高いBare-Si 基板に対す
る Eth−レジスト膜厚の関係図で,黒丸は下地反射率を
下げた基板 (表面にWSi 膜を被着) に対する Eth−レジ
スト膜厚の関係図である。ここで使用したレジストは前
記のレジストBである。下地の低反射率化と光吸収率を
上げたレジストを種々組み合わせることにより,さらに
Ethの山aと谷bの差をなくしていくことができる。
FIG. 6 is an explanatory view of the embodiment (3), which is an example in which a low reflectance of the base and a resist having an increased light absorptivity are combined. The white circles in the figure show the relationship between the Eth-resist film thickness for a Bare-Si substrate with a high underlayer reflectance, and the black circles show the Eth-resist film thickness for a substrate with a reduced underlayer reflectance (WSi film deposited on the surface). It is a relationship diagram. The resist used here is the resist B described above. By combining various resists with low reflectance and high light absorption of the base,
You can eliminate the difference between mountain a and valley b of Eth.

【0018】[0018]

【発明の効果】本発明によれば, 線幅のばらつきを抑
え, レジストパターンの寸法制御性が向上した。この結
果, 半導体装置のパターンの微細化に寄与することがで
きた。
According to the present invention, the variation in line width is suppressed and the dimensional controllability of the resist pattern is improved. As a result, it was possible to contribute to the miniaturization of the pattern of the semiconductor device.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明の原理説明図FIG. 1 is an explanatory view of the principle of the present invention.

【図2】 実施例1の説明図(1)FIG. 2 is an explanatory diagram of Example 1 (1)

【図3】 実施例1の説明図(2)FIG. 3 is an explanatory diagram of Example 1 (2)

【図4】 実施例1の説明図(3)FIG. 4 is an explanatory diagram of Example 1 (3)

【図5】 実施例2の説明図FIG. 5 is an explanatory diagram of the second embodiment.

【図6】 実施例3の説明図FIG. 6 is an explanatory diagram of Example 3.

【符号の説明】[Explanation of symbols]

a 所定のレジスト膜厚の極大値 b 所定のレジスト膜厚の極小値 a Maximum value of predetermined resist film thickness b Minimum value of predetermined resist film thickness

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 下地の上にレジスト膜を被着し,露光,
現像してレジストパターンを形成する際に,現像可能な
最低露光量(Eth) とレジスト膜厚との関係図における E
thの極大値と極小値の値の差を小さくするように, 該下
地の反射率を調整することを特徴とするパターン形成方
法。
1. A resist film is deposited on a base, exposed,
When the resist pattern is formed by development, E in the relationship between the minimum developable exposure amount (Eth) and the resist film thickness
A pattern forming method characterized by adjusting the reflectance of the underlayer so as to reduce the difference between the maximum value and the minimum value of th.
【請求項2】 下地の上にレジスト膜を被着し,露光,
現像してレジストパターンを形成する際に,現像可能な
最低露光量(Eth) とレジスト膜厚との関係図における E
thの山と谷の値の差を小さくするように, 該レジストの
露光光に対する吸収率を調整することを特徴とするパタ
ーン形成方法。
2. A resist film is deposited on a base, exposed,
When the resist pattern is formed by development, E in the relationship between the minimum developable exposure amount (Eth) and the resist film thickness
A pattern forming method, which comprises adjusting the absorptance of the resist for exposure light so as to reduce the difference between the peak and valley values of th.
【請求項3】 請求項1及び請求項2の調整を組み合わ
せることを特徴とするパターン形成方法。
3. A pattern forming method, wherein the adjustments according to claim 1 and claim 2 are combined.
JP22271293A 1993-09-08 1993-09-08 Formation of pattern Withdrawn JPH0778747A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22271293A JPH0778747A (en) 1993-09-08 1993-09-08 Formation of pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22271293A JPH0778747A (en) 1993-09-08 1993-09-08 Formation of pattern

Publications (1)

Publication Number Publication Date
JPH0778747A true JPH0778747A (en) 1995-03-20

Family

ID=16786730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22271293A Withdrawn JPH0778747A (en) 1993-09-08 1993-09-08 Formation of pattern

Country Status (1)

Country Link
JP (1) JPH0778747A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6399481B1 (en) 1998-09-14 2002-06-04 Sharp Kabushiki Kaisha Method for forming resist pattern
US6841404B2 (en) 2001-09-11 2005-01-11 Kabushiki Kaisha Toshiba Method for determining optical constant of antireflective layer, and method for forming resist pattern
US7312515B2 (en) 2003-06-11 2007-12-25 Ricoh Company, Ltd. Semiconductor apparatus including a thin-metal-film resistor element and a method of manufacturing the same
US7358592B2 (en) 2004-03-02 2008-04-15 Ricoh Company, Ltd. Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6399481B1 (en) 1998-09-14 2002-06-04 Sharp Kabushiki Kaisha Method for forming resist pattern
US6841404B2 (en) 2001-09-11 2005-01-11 Kabushiki Kaisha Toshiba Method for determining optical constant of antireflective layer, and method for forming resist pattern
US7312515B2 (en) 2003-06-11 2007-12-25 Ricoh Company, Ltd. Semiconductor apparatus including a thin-metal-film resistor element and a method of manufacturing the same
US7718502B2 (en) 2003-06-11 2010-05-18 Ricoh Company, Ltd. Semiconductor apparatus including a thin-metal-film resistor element and a method of manufacturing the same
US7358592B2 (en) 2004-03-02 2008-04-15 Ricoh Company, Ltd. Semiconductor device

Similar Documents

Publication Publication Date Title
US20040102048A1 (en) Method for manufacturing semiconductor device
JP3306678B2 (en) Method of forming metal pattern film
US6037276A (en) Method for improving patterning of a conductive layer in an integrated circuit
US6133613A (en) Anti-reflection oxynitride film for tungsten-silicide substrates
US5948598A (en) Anti-reflective silicon nitride film using in-situ deposition
JPH0778747A (en) Formation of pattern
US5609994A (en) Method for patterning photoresist film having a stepwise thermal treatment
US5635335A (en) Method for fabricating semiconductor device utilizing dual photoresist films imaged with same exposure mask
JP2000106343A (en) Manufacture of semiconductor device
US5547813A (en) Method of forming a fine resist pattern of high resolution using a contrast enhancement layer
JPH06224118A (en) Microscopic pattern forming method
JPH07307333A (en) Pattern forming method
KR100505771B1 (en) Method of manufacturing semiconductor device
JPH07201990A (en) Pattern forming method
US6998226B2 (en) Method of forming patterned photoresist layer
JPH1131650A (en) Antireflection coating, substrate to be treated, manufacture of the substrate to be treated, manufacture of fine pattern and manufacture of semiconductor device
JP2001196286A (en) Method of preventing side lobe in photolithography, and photolithography process
US6929902B2 (en) Method of preventing repeated collapse in a reworked photoresist layer
US6492701B1 (en) Semiconductor device having anti-reflective cap and spacer, method of manufacturing the same, and method of manufacturing photoresist pattern using the same
KR100340865B1 (en) Mask for forming contact in semiconductor device and method for manufacturing the same
EP0794460A2 (en) A process for device fabrication and an anti-reflective coating for use therein
JPH0737799A (en) Fine pattern formation for semiconductor device
KR0124633B1 (en) Method for forming metal pattern using imd
JPH07240362A (en) Method of manufacturing semiconductor device
JPH0594934A (en) Manufacturing method of semiconductor device

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 20001128