JPH0778091A - Multitask managing method - Google Patents

Abstract

PURPOSE:To preferentially process an event which is high in emergency by enabling the same task to be actuated repeatedly for processes of different events. CONSTITUTION:A task 4 processes events of event codes 0, 1, and 2. When the event of the code 1 is generated and a task 4 is executed so as to process the event, only the event control block 8 of the code 1 is queued in a task control block 3. If an event of a code 0 having higher priority is generated in this state, an interruption process part 15 interrupts the task 4 and saves various register information in a block 8 and a scheduler 2 queues the event control block 7 of the code 0 in the task control block 3 and nearly starts the task 4 so as to process the event of the code 0. After the task 4 finishes processing the event of the code 0 and ends, the scheduler 2 reloads the register information saved in the block 8 to a CPU 11 and actuates the task 4 to restart the process of the event of the code at the interruption point.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multitask management method in an information processing apparatus, and more particularly to a control program having a multitask structure which is composed of a plurality of tasks and which allows each task to share processing of some events. A preferred multitask management method.

[0002]

2. Description of the Related Art In a device-embedded control program such as a transmission control program, the program is composed of a plurality of tasks, and each task is made to share processing of some events. Therefore, when a plurality of events to be processed by a certain task occur consecutively, there is a problem in what order the events are processed by the task.
If processing is performed in the order of occurrence of events, an event with a high urgency of processing is postponed due to an event with a lower urgency, which is a problem.

Therefore, for example, as disclosed in Japanese Patent Laid-Open No. 12433/1990, a unique event code is defined for each event to be processed in each task, and any one of them is defined as a specific event code. Except for events with a specific event code, the events that occurred during suspension are queued in the task control block in ascending order of the event code, and the task scheduling is not executed. Proposal of a multi-task management method that queues tasks and schedules a task to process a specific event, and when the processing of this specific event is finished, sequentially processes other events queued in the task control block Has been done.

[0004]

According to such a conventional method, since the events are processed in the order of the event code, if the processing urgency is expressed by the value of the event code, the event with high urgency is expressed. Therefore, it is possible to preferentially process.

However, since the concept of a specific event is introduced and task scheduling is started upon the occurrence of this specific event, normal events other than the specific event that occur while the task is stopped are specific events. Will not be processed until the event occurs, and the processing of normal events will be delayed. In addition, each task is processed by the CPU
Since a management format that does not abandon the execution right of is adopted, even if a specific event with a high degree of urgency occurs while the task is processing a normal event, it will be processed with priority. You cannot do it.

Therefore, a first object of the present invention is to make it possible to activate the same task multiple times for different events so that when a more urgent event occurs during task operation, the task Multi-tasking that suspends execution and causes the task to operate promptly for an event with a high degree of urgency, and after the event has been processed, the previously processed event can be resumed from the interrupted point. It is to provide a task management method.

A second object of the present invention is to be able to process events in a descending order of urgency when a plurality of events to be processed by a certain task occur consecutively.

[0008]

In order to achieve the above-mentioned first object, the present invention has a multi-task structure composed of a plurality of tasks, each task sharing some events to be processed. A multitask management method for managing each of the tasks in a control program, comprising: (a) interrupting a task being executed by a CPU when an event to be processed by the control program occurs, A step of saving to an event control block corresponding to an event in process currently queued in the task control block of the suspended task, and (b) an event control including an event code of the generated event and initial values of various registers Queuing the block into the task control block of the task that handles the event, and (c) queuing into each task control block A step of selecting an event control block corresponding to the event with the highest priority among the event control blocks; and (d) setting the values of various registers stored in the selected event control block in various registers of the CPU. And operating the task corresponding to the task control block whose event control block is queued.

In the step (c), the priority of the event is determined by the event code stored in each event control block.

In order to achieve the above-mentioned second object, in the step (b), the event control blocks of the occurred events are sorted in the order of the event codes and queued in the task control block. I am trying to do it.

[0011]

Now, there are three events with event codes "0", "1", and "2" as the events to be processed by a certain task A.
There are three events with event codes “3”, “4”, and “5” as events to be processed by another task B, and an event with a smaller event code value has a higher priority. Further, the task A is currently activated to process the event with the event code “1”, and only the event control block with the event code “1” is queued in the task control block of the task A. Only the event control block with the event code "3" is queued in the task control block.

In this state, when the event of the event code "2" occurs, the task A being executed by the CPU is interrupted, and the values of various registers are queued in the task control block of the task A. The event control block saved in the event control block of "1" and including the event code "2" of the event that occurred and the initial values of various registers is queued in the task control block of task A in the order of the event code (for example, ascending order). Then, among the event control blocks queued in each task control block, the event control block corresponding to the event with the highest priority is selected. Therefore, in this case, the event control block with the event code "1" queued in the task control block of task A is selected, and the values of the various registers stored therein are restored to the various registers of the CPU. , Task A operates.

As described above, even if an event having a lower priority than the currently executed event occurs, the processing of the original event is continuously executed.

On the other hand, when an event of event code "0" occurs thereafter, the task A being executed by the CPU is interrupted,
The value of each register is saved in the event control block of the event code "1" that is queued in the task control block of task A, and the event control including the event code "0" of the generated event and the initial value of each register The blocks are queued in the task control block of task A in the order of event codes (for example, in ascending order), and then, among the event control blocks queued in each task control block,
The event control block corresponding to the event with the highest priority is selected. Therefore, in this case, the event control block with the event code “0” queued in the task control block of task A is selected, and the values of the various registers stored therein are restored to the various registers of the CPU. , Task A operates.

As described above, when an event having a higher priority than the currently executed event occurs, the processing of the currently executed event is interrupted and the high priority event is processed.

Thereafter, the task A causes event code "0".
When the processing of the event of No. 2 is completed, the processing of the event of the next highest priority event code “1” is restarted by the task A from the interrupted point, and when it is completed, the next event code “2” is generated.
Is executed by the task A, and then the event of the event code “3” is processed by the task B.

[0017]

Embodiments of the present invention will now be described in detail with reference to the drawings.

Referring to FIG. 1, an example of an information processing apparatus to which an embodiment of the multitask management method of the present invention is applied,
It is composed of a CPU 11, a memory 12, an input / output device 13 and a bus 14 connecting them.

On the memory 12, a program 10 composed of tasks 4 and 6 and task control blocks 3 and 6 corresponding to the scheduler 2 and the task 4 are provided.
A device-embedded control program (hereinafter, simply referred to as a control program) 1 including an operating system (OS) 9 including a task control block 5 corresponding to the.

As shown in the figure, the task control block 3 has a queuing pointer 3-1 and an event control block corresponding to an event to be processed by the task 4 with the queuing pointer 3-1 at the head. Are queued in ascending order of event codes.

Each event control block has event codes 7-1 and 8-1 as illustrated in the event control blocks 7 and 8.
And register save areas 7-2 and 8-2 which are save areas for the program counter and other various registers.

The present invention employs a configuration in which the register information at the time of suspending each task 4 and 6 is saved in the register save area in the event control block corresponding to the event causing the task to operate. Therefore, the task control block 3,
5 itself does not have a register save area. In addition,
In the present embodiment, the register save area is provided in the event control block itself, but a stack for each event is prepared in the memory 12, various register information is saved in the stack corresponding to the event, and the pointer of the stack is saved as an event. It may be saved in the control block. In short, it suffices that a register save area exists for each event.

Although not shown, the task control block 5
Also has a queuing pointer like the task control block 3, and when an event to be processed occurs in the task 6, the event control block of the event is queued in the task control block 5.

The CPU 11 also includes an interrupt processing unit 1
2 and FIG. 3 in the interrupt processing unit 15.
Processing such as scheduler activation as shown in is executed by hardware or firmware.

Further, the scheduler 2 has a configuration shown in FIG. 4 and FIG.
It is configured to perform the processing shown in.

The operation of this embodiment will be described below.

A unique event code is assigned to the event to be processed by the program 10. The priority is given to each event code. In the case of the present embodiment, the value of the event code indicates the priority of the event, and the smaller the value of the event code, the higher the priority. For convenience of explanation, there are a total of six events to be processed by the program 10, and the respective event codes are “0”, “1”, “2”,
“3”, “4” and “5” are set, task 4 shares events of event codes “0”, “1” and “2”, and task 6 assigns event codes “3”, “4” and “5”. The event of “” will be shared.

When no event to be processed has occurred, no task control block is queued in the task control blocks 3 and 5, and the tasks 4 and 6 are in a stopped state.

In this state, for example, event code "1",
When the events "3", "0", and "2" occur in that order due to an interrupt from the input / output device 13 or the like, the following operation is performed at each time point.

(1) When an event code "1" occurs When an event with an event code "1" occurs, the interrupt processing unit 15 of the CPU 11 starts the processing shown in FIG. 2, and first there is a task in operation. It is determined whether or not (S1). In this case, there is no task in operation, so the scheduler 2 is activated immediately (S4).

When the scheduler 2 is activated, it starts the processing shown in FIG. First, in step S21, it is determined that the event is activated due to the occurrence of an event, and the event control blocks of the occurred event are assigned to the task control blocks corresponding to the task 4 that should process the event in ascending order of priority of the event code. Queuing to 3 (S22). As a result, FIG.
As shown in FIG. 6, the event control block 71 with the event code “1” is queued in the task control block 3.
In the event control block 71, "1" is set as the event code, and initial values of various registers (for example, the head address of task 4 for the program counter) are set in the register save area.

Then, the scheduler 2 executes the task starting process S24.

The details of the task activation process S24 are as shown in FIG. 5. First, the event code is extracted from the first event control block queued in all the task control blocks 3 and 5 (S31). In this case, since no event control block is queued in the task control block 5, the event code "1" is extracted only from the task control block 71 queued in the task control block 3.

Next, the scheduler 2 executes S32 and S in FIG.
After 33, the process proceeds to S36, in which the contents of the register save area in the first event control block 71 queued in the task control block 3 are set in various registers of the CPU 11, and the task 4 is started. At the time of activation, the task 4 is instructed of an event to be processed.

As a result, the task 4 is executed by the CPU 11. Task 4 starts processing the event with event code “1”.

(2) When an event with an event code "3" occurs When the event with an event code "3" occurs while the task 4 is being executed by the CPU 11, the interrupt processing unit 15 starts the processing shown in FIG. Since there is a task 4 in operation, the process proceeds from S1 to S2, and the task 4 in operation is interrupted. Then, the contents of the program counter and other various registers of the CPU 11 at the time of the interruption are changed to the task 4
The task control block 3 is saved in the register save area in the event control block 71 queued at the head (S3), and the scheduler 2 is activated (S4).

The scheduler 2 advances from the processing S21 of FIG. 4 to S22, and the event control blocks of the occurred event are assigned in the ascending order of the priority of the event code to the task control block 5 corresponding to the task 6 which should process the event. Queue to. As a result, as shown in FIG. 6A, the event control block 73 with the event code "3" is added to the task control block 5.
Is queued. In the event control block 73, "3" is set as the event code, and initial values of various registers (for example, the head address of task 6 for the program counter) are set in the register save area.

Then, the scheduler 2 executes the task starting process S24, and first, all the task control blocks 3,
The event code is extracted from the first event control block queued in step 5 (S31). In the present case, Fig. 6
As shown in (a), since the event control block 71 is queued in the task control block 3 and the event control block 73 is queued in the task control block 5, the event codes "1" and "3" are extracted from them. Be done.

Next, the scheduler 2 advances to S34 through S32 and S33, and compares the priorities of these plural event codes. Then, based on the comparison result, the task control block 3 including the highest priority event code "1" is selected (S35), and the register in the first event control block 71 queued in this task control block 3 is selected. The contents of the save area are set in various registers of the CPU 11 to restart the operation of task 4 (S36).

As a result, the task 4 is executed by the CPU 11, and the process related to the event of the event code "1" is restarted from the interrupted position.

(3) Occurrence of event with event code "0" When task 4 is being executed by the CPU 11 and event with event code "0" occurs, interrupt processing unit 15
Has a task 4 in operation, the process advances from S1 to S2 in FIG.
Event control block 7 in which contents of various registers of PU 11 are queued at the head of task control block 3
The data is saved in the register save area in 1 (S3), and the scheduler 2 is activated (S4).

The scheduler 2 advances from the processing S21 of FIG. 4 to S22, and the event control blocks of the generated event code "0" correspond to the task 4 which should process the event in ascending order of the priority of the event code. Queue to task control block 3. As a result, as shown in FIG. 6B, the event control block 70 with the event code “0” and the event control block 71 with the event code “1” are queued in the task control block 3 in that order. In the event control block 70, “0” is set as the event code,
Further, initial values of various registers (for example, the head address of task 4 for the program counter) are set in the register save area.

Next, the scheduler 2 executes task start processing S2.
4 is executed, and the event code is extracted from the first event control block queued in all the task control blocks 3 and 5 (S31). In this case, as shown in FIG. 6B, the event control block 7 is included in the task control block 3.
0 is the event control block 73 in the task control block 5.
Are queued, the event codes “0” and “3” are extracted from them.

Next, the scheduler 2 executes S32 and S of FIG.
After S33, the process proceeds to S34, and the priorities of the plurality of event codes "0" and "3" are compared. Then, based on the comparison result, the task control block 3 including the event code "0" having the highest priority is selected (S35), and the register in the first event control block 70 queued in this task control block 3 is selected. Save the contents of the save area to the CPU
11 are set in various registers to operate task 4 (S36).

As a result, the task 4 started for processing the event with the event code "1" is restarted for processing the event with the event code "0" and executed by the CPU 11. .

(4) Occurrence of Event with Event Code “2” When task 4 is being executed by the CPU 11, if an event with event code “2” occurs, the interrupt processing unit 15
Has a task 4 in operation, the process advances from S1 to S2 in FIG.
Event control block 7 in which contents of various registers of PU 11 are queued at the head of task control block 3
The data is saved in the register save area at 0 (S3), and the scheduler 2 is activated (S4).

The scheduler 2 advances from the processing S21 of FIG. 4 to S22, and the event control blocks of the generated event code "2" correspond to the task 4 which should process the event in ascending order of the priority of the event code. Queue to task control block 3. As a result, as shown in FIG. 6C, the task control block 3 includes an event control block 70 with an event code “0”, an event control block 71 with an event code “1”, and an event control block 72 with an event code “2”. Are queued in that order. The event control block 72
"2" is set as the event code, and initial values of various registers (for example, the head address of task 4 for the program counter) are set in the register save area.

Next, the scheduler 2 executes the task starting process S2.
4 is executed, and the event code is extracted from the first event control block queued in all the task control blocks 3 and 5 (S31). In this case, as shown in FIG. 6C, the event control block 7 is included in the task control block 3.
0 is the event control block 73 in the task control block 5.
Are queued, the event codes “0” and “3” are extracted from them. As a result, in S35 of FIG. 5 of the scheduler 2, the task control block 3 including the event code "0" having the highest priority is selected, and the event control block 70 in the head queued in this task control block 3 is selected. The contents of the register save area are set in various registers of the CPU 11, and the task 4 is activated.

As a result, the task 4 started for the event with the event code "0" is again C for the event.
It is executed by the PU 11 and the processing of the event with the event code “0” is restarted from the interrupted point.

(5) When the processing of the event with the event code “0” is completed When the task 4 finishes the processing related to the event with the event code “0”, the end interrupt is issued by the interrupt processing unit 1 of the CPU 11.
5, the interrupt processing unit 15 promptly activates the scheduler 2 as shown in FIG.

The activated scheduler 2 is S2 in FIG.
In 1, the end of the task is determined, and the finished task 4
The event control block processed by (i.e., the event control block 70 queued at the head of the task control block 3) is removed from the queue as shown in FIG. 6D (S23). Then, the task activation process shown in FIG. 5 is performed.

In this task activation process, the event codes "1" and "3" are extracted from the first event control block queued in the task control blocks 3 and 5 (S31), and then these priority levels are set. Are compared (S3
4) The task control block 3 including the highest priority event code "1" is selected (S35), and the contents of the register save area in the first event control block 71 queued in this task control block 3 are The task 4 is activated by being set in various registers of the CPU 11 (S36).

As a result, the task 4 has the event code "1".
The processing of event code "1" is restarted by the CPU 11 for the processing of 1.

Thereafter, when the task 4 is completed after the processing of the event code "1" is completed, the task 4 is activated to process the event of the event code "2", and when it is completed,
Task 6 is activated to restart the processing of the event of event code “3” from the interrupted point. Of course, in the meantime, when an event having a higher priority than the event currently being processed occurs, the processing of the event currently being processed is interrupted and the high priority event is processed.

[0055]

As described above, according to the present invention, the following effects can be obtained.

It is possible to activate the same task multiple times for the processing of different events, each time an event occurs,
Compare the priority of the event that occurred with the priority of the event that is currently being processed, and if the priority of the event that occurred is higher, to interrupt the processing of the event that is currently being processed and process it preferentially, Processing of high-urgency events will not be delayed due to lower-urgency events, and since the processing of interrupted events can be resumed from the point of interruption, waste of processing is eliminated.

Since the task is activated so that the event with the high priority is preferentially processed, each task does not need to be aware of the priority of the event, and each task can be programmed by the diagram of occurrence event pair processing. , The procedure of event processing becomes simple.

[Brief description of drawings]

FIG. 1 is a block diagram showing an example of an information processing apparatus to which an embodiment of a multitask management method of the present invention is applied.

FIG. 2 is a flowchart showing an example of processing performed by an interrupt processing unit when an event occurs.

FIG. 3 is a flowchart showing an example of processing performed by an interrupt processing unit when a task ends.

FIG. 4 is a flowchart showing a processing example of a scheduler.

FIG. 5 is a flowchart showing details of task activation processing of a scheduler.

FIG. 6 is a diagram showing states of event control blocks queued in a task control block.

[Explanation of symbols]

 1 ... Device incorporation control program 2 ... Scheduler 3, 5 ... Task control block 4, 6 ... Task 7, 8, 70-73 ... Event control block 7-1, 8-1 ... Event code 7-2, 8-2 Register save area 9 Operating system (OS) 10 Program 11 CPU 12 Memory 13 I / O device 14 Bus 15 Interrupt processing unit

Claims (3)

[Claims] 1. A multitask management method for managing each task in a control program having a multitask structure, comprising a plurality of tasks, each task sharing some events to be processed, wherein: When an event to be processed by the control program occurs, the task being executed by the CPU is interrupted, and the values of various registers correspond to the event currently being processed which is queued in the task control block of the interrupted task. Saving to an event control block, (b) queuing an event control block containing the event code of the generated event and initial values of various registers to a task control block of a task that processes the event, (c) ) Respond to the event with the highest priority among the event control blocks queued in each task control block. Selecting an elephant control block,
(D) A step of setting values of various registers stored in the selected event control block in various registers of the CPU and operating a task corresponding to a task control block in which the event control block is queued And a multitask management method including: 2. The multitask management method according to claim 1, wherein in the step (c), the priority of the event is determined by the event code stored in each event control block. 3. The multitask management method according to claim 2, wherein in the step (b), the event control blocks of the generated event are queued in the task control block in the order of the event code.