JPH0774638A - A/d converter - Google Patents

Abstract

PURPOSE:To prevent deterioration of the A/D converting accuracy and to improve the reliability of an A/D converter by converting the level of a control signal by a level converting circuit based on the power voltage boosted by a boosting circuit. CONSTITUTION:A clock signal (f) is supplied to a boosting circuit 14 and then supplied to a boosting level converting circuit 15 of the circuit 14. At the same time, the terminal voltage of a capacitor 20 gradually rises up to a voltage level 2VDD. Meanwhile the boosted power voltage of 2VDD is applied to a level converting circuit 21 for control signal JI and a level converting circuit 22 for control signal (b) respectively. As a result, both circuits 21 and 22 convert the levels of signals JI and (b) respectively based on the level 2VDD. These converted signals JI and (b) are supplied to the gate terminals of transmission gates 5, 8 and 9 to control these gates.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an A-D converter which suppresses a decrease in A / D conversion accuracy due to fluctuations in power supply voltage and improves reliability with respect to fluctuations in power supply voltage.

[0002]

2. Description of the Related Art FIG. 9 is a 2-bit conventional AD in which an A / D conversion value is determined from higher bits by a successive approximation method.
It is a circuit diagram which shows the structure of a converter. In the figure, 1 is an analog voltage input terminal to which an analog voltage converted into a digital value is input, and 2 is a resistance ladder circuit that generates and outputs a divided voltage from a reference voltage Vref. Reference numeral 3 is a selection circuit for selecting one of the divided voltages generated by the resistance ladder circuit 2.
It is composed of 5 and 6. Reference numeral 7 is a chopper-type amplifier, which includes transmission gates 8 and 9 for input switching and a capacitor 10 inserted on the input side of the inverter circuit 11.
And a transmission gate 12 connected in parallel to the inverter circuit 11. Reference numeral 13 denotes a control circuit (control means), which is a control signal J0 supplied to the gate terminal of the transmission gate 4, a control signal J1 supplied to the gate terminal of the transmission gate 5, a control signal J2 supplied to the gate terminal of the transmission gate 6, Control signals b, b ⁻ supplied to the gate terminals of the transmission gate 8 and the transmission gate 9.
(Hereinafter referred to as an inverted signal of the signal b) is output, and the transmission gates 4, 5, 6, 8, 9, 1
Controls 2 on / off. The transmission gates 4, 5, 6, 18, 9, 12 are composed of N-channel transistors and P-channel transistors.

FIG. 10 is a timing chart showing the operation of the A / D converter described above. Section "I" is a period in which the digital value of the upper 1 bit is determined, and section "II" is the digital of the lower 1 bit. It indicates the period during which the value is determined.

Next, the AD conversion operation when the analog voltage level Va input from the analog voltage input terminal 1 is VL1>Va> VL2 will be described. First, FIG.
When the control signal b is output from the control circuit 13 in the section "I" in the timing chart of the above, the transmission gate 8 and the transmission gate 12 of the chopper type amplifier 7 become conductive. As a result, the potential at the point c becomes close to the threshold voltage VTHA of the inverter circuit 11, and the capacitor 10 is charged with the electric charge due to the difference voltage between the threshold voltage of the inverter circuit 11 and the analog voltage level Va.

In this state, the control signal b is then inverted and the control signal b ^- is supplied to the transmission gate 9. At this time, the control signal J1 is supplied to the gate terminal of the transmission gate 5. As a result,
The transmission gate 8 and the transmission gate 12 are non-conducting, and the transmission gate 9 is conducting. The transmission gate 5 of the selection circuit 3 is also in the conductive state. In the state where the transmission gate 5 is not conducting, the capacitor 10 stores the charge charged when the control signal b is at the “H” level. Therefore, when the transmission gate 5 is conducting, the potential at the point a (divided voltage). The potential at the point c rises or falls according to the magnitude of the voltage VL1) and the magnitude of the analog voltage level Va. When the potential at the point a is higher than the analog voltage level Va, the potential at the point c rises as shown in FIG. As a result, the output of the inverter circuit 11 is'L '.
The level becomes high, and "0" is set in the upper bits of the A / D converted value.

In the next section "II", the control signal J2 shown in FIG. 10C is supplied from the control circuit 13 to the gate terminal of the transmission gate 6. Also, the control signal b
Further, the control signal b ⁻ is supplied, the analog voltage level Va is compared with the divided voltage VL2 by the same operation as in the section “I”, and since Va> VL2, the potential at the point c does not rise, Immediately after the control signal b changes to the “L” level (the control signal b ⁻ changes to the “H” level), an “H” level signal as shown in (e) of FIG. 10 is output from the inverter circuit 11. , "1" is set to the lower bits of the A / D converted value. In this way, the voltage level Va (VL1>
Va> VL2) is A / D converted into a digital value of "0,1".

[0007]

Since the conventional AD converter is constructed as described above, when the power supply voltage becomes low, the channel resistance value in the transmission gate increases and the amplification factor of the chopper type amplifier 7 increases. There is a problem that the accuracy of A / D conversion is deteriorated due to such deterioration.

The present invention has been made in order to solve the above-mentioned problems, and is an AD which improves reliability without lowering the A / D conversion accuracy for a low power supply voltage. The purpose is to obtain a converter.

[0009]

Means for Solving the Problems A according to the invention of claim 1
The -D converter boosts a power supply voltage by a boosting circuit, boosts a control signal supplied to the selection switching means of the selection circuit and the input switching switching means of the chopper type amplifier by the boosting circuit, and obtains the boosted power supply. The level is converted by a level conversion circuit based on the voltage.

According to a second aspect of the present invention, an AD converter is configured such that a chopper type amplifier is constituted by a transistor having a threshold value lower than a threshold value of a transistor included in a circuit or means other than the chopper type amplifier. .

In the A / D converter according to the third aspect of the present invention, the power supply voltage is boosted by the boosting circuit, and the voltage signal at the level of 1/2 of the power supply voltage is switched in the selection switching means of the selection circuit. The level conversion circuit performs level conversion on the control signal supplied to the selection switching means and the input switching switching means of the chopper type amplifier based on the boosted power supply voltage obtained by boosting by the boosting circuit, and other circuits or means. The chopper type amplifier is configured by a transistor having a threshold value lower than that of the transistor included in the.

According to another aspect of the present invention, there is provided an AD converter, which detects a decrease in power supply voltage by a voltage drop detection circuit, boosts the power supply voltage by a booster circuit, and generates a boosted power supply voltage.
The level conversion circuit sets the level of the control signal supplied to the selection switching means for switching the voltage signal at the level of 1/2 of the power supply voltage in the selection switching means of the selection circuit and the input switching switching means of the chopper type amplifier. The power supply voltage is converted and the power supply voltage supplied to the level conversion circuit by the power supply voltage switching circuit is switched to the power supply voltage or the boosted power supply voltage based on the detection output of the voltage drop detection circuit.

According to a fifth aspect of the present invention, in the AD converter, the power source voltage is boosted by the booster circuit based on the stabilized power source voltage which is different from the power source voltage and whose output voltage value can be adjusted. A control signal supplied to the selection switching means for generating the boosted power supply voltage and switching the voltage signal of the level of 1/2 of the power supply voltage in the selection switching means of the selection circuit and the input switching switching means of the chopper type amplifier. Is level-converted by a level conversion circuit based on the boosted power supply voltage.

[0014]

In the AD converter according to the present invention, the control signal supplied to the selection switching means and the input switching switching means of the chopper type amplifier is the boosted power supply voltage obtained by boosting the booster circuit. Level conversion based on
Since the selection switching means and the input switching switching means are controlled by the control signal obtained as a result, the level of the control signal is suppressed from decreasing even when the power supply voltage decreases, and the level of the control signal decreases. The increase in impedance when the selection switching means and the input switching switching means are brought into conduction is suppressed, and deterioration in A / D conversion accuracy due to decrease in power supply voltage is prevented.

The A-D converter according to the invention of claim 2 is
By making the threshold value of the transistor forming the chopper type amplifier lower than the threshold value of the transistor included in the circuit or means other than the chopper type amplifier, the threshold value of the chopper type amplifier is lowered and the power supply voltage is advantageously reduced. As a result, it is possible to prevent the A / D conversion accuracy from decreasing due to the decrease in the power supply voltage.

The A-D converter according to the invention of claim 3 is
The control signal supplied to the selection switching means for switching the voltage signal of the level of 1/2 of the power supply voltage and the input switching switching means of the chopper type amplifier is based on the boosted power supply voltage obtained by boosting by the booster circuit. The impedance when the selection switching means and the input switching switching means are controlled by the level conversion, and the control signal obtained as a result is controlled, and the selection switching means and the input switching switching means are brought into a conductive state due to a decrease in the level of the control signal. Is suppressed, and the threshold value of the transistor forming the chopper type amplifier is set to be lower than the threshold value of the transistor included in the circuit or means other than the chopper type amplifier. , A due to fluctuations in power supply voltage
Prevents deterioration of / D conversion accuracy.

The A-D converter according to the invention of claim 4 is
The booster circuit boosts the power supply voltage to generate a boosted power supply voltage, and when a decrease in the power supply voltage is detected, the selection switching means of the selection circuit of the selection circuit switches the signal at the level of 1/2 of the power supply voltage. Since the power supply voltage of the level conversion circuit for converting the level of the control signal supplied to the input switching switching means of the chopper type amplifier is switched to the boosted power supply voltage and the level of the control signal is converted, the level of the control signal is lowered. A rise in impedance when the selection switching means and the input switching switching means are brought into conduction is suppressed, and fluctuations in the power supply voltage, particularly A / D due to a decrease in the power supply voltage.
Prevents deterioration of conversion accuracy.

The A-D converter according to the invention of claim 5 is
The power supply voltage is boosted on the basis of a stabilized power supply that is stabilized and the output voltage value is adjustable, and based on the boosted power supply voltage obtained as a result, 1 / of the power supply voltage is selected in the selection switching means of the selection circuit. Since the level of the control signal supplied to the selective switching means for switching the voltage signal of the two levels and the input switching switching means of the chopper type amplifier is level-converted, the influence of the fluctuation of the power supply voltage is suppressed, and particularly, the power supply voltage It is possible to prevent the A / D conversion accuracy from being lowered due to the decrease.

[0019]

EXAMPLES Example 1. An embodiment of the invention of claim 1 will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing the configuration of the AD converter of this embodiment. In FIG. 1, parts that are the same as or correspond to those in FIG. 9 are given the same reference numerals and description thereof is omitted. In the figure, 14 is a boosted power supply voltage 2VD that is a power supply voltage VDD that is twice the power supply voltage VDD based on the clock signal f.
It is a booster circuit that boosts voltage to D. The booster circuit 14 includes a boosting level conversion circuit 15 and a P-channel transistor 1.
6, 17 and capacitors 18, 20 and the clock signal f
And a voltage boosting inverter circuit 19 for inverting. Reference numeral 21 is a level conversion circuit for the control signal J1 (level conversion circuit) for converting the level of the control signal J1 based on the boosted power supply voltage 2VDD boosted by the booster circuit 14, and 22 is similarly controlled based on the power supply voltage 2VDD. It is a level conversion circuit (level conversion circuit) for a control signal b for converting the level of the signal b. The transmission gates 4, 5 and 6 are selection switching means, and the transmission gates 8 and 9 are input switching switching means.

Next, the operation will be described. The operation of the selection circuit 3 and the chopper type amplifier 7 is the same as the operation described with reference to FIG. Therefore, the operation of the booster circuit 14 will be described here. The clock signal shown in FIG. 2A is input to the booster circuit 14. This clock signal is supplied to the boosting level conversion circuit 15 of the boosting circuit 14. The boosting level conversion circuit 15 outputs P when the clock signal f is at the “H” level.
The control signal of'L 'level for making the channel transistor 17 conductive is output. Also, when the clock signal f is at the'L 'level, it outputs the'L' level control signal for making the P-channel transistor 16 conductive. When the clock signal f is at the “H” level, the output of the boosting inverter circuit 19 becomes the “L” level, and at the same time, the P-channel transistor 17 becomes conductive and the power supply voltage VDD
A current i1 flows into the input side of the boosting inverter circuit 19 through the capacitor 18 and the capacitor 18 is charged to the power supply voltage VDD. Next, the clock signal f is'L '.
When the voltage becomes the level, the output of the boosting inverter circuit 19 becomes the “H” level (= VDD), so the potential at the point g is 2
It becomes VDD. On the other hand, the P-channel transistor 17 is non-conductive and the P-channel transistor 16 is conductive.
Therefore, the capacitor 20 is charged by the charge of the capacitor 18.
Be charged. In this case, the terminal voltage of the capacitor 20 is
As shown in (c) of FIG. 2, the voltage value gradually rises to 2
The voltage becomes VDD, and the boosted power supply voltage of the voltage value 2VDD is applied to the level conversion circuit 21 for the control signal J1 and the level conversion circuit 22 for the control signal b.

As a result, the level conversion circuit 21 for the control signal J1 and the level conversion circuit 22 for the control signal b perform level conversion between the control signal J1 and the control signal b based on the boosted power supply voltage 2VDD. The level-converted control signal J1 and control signal b are supplied to the gate terminals of the transmission gates 5, 8 and 9, and are transmitted to the transmission gates 5, 8 and 9.
Control 9 In this case, the voltage value when the control signal J1 and the control signal b become the “H” level is the boosted power supply voltage 2V.
Since the level is DD, the source-gate voltage of the transmission gates 5, 8 and 9 is twice as high as that of the conventional AD converter shown in FIG. It has a low impedance, which is advantageous for using a low power supply voltage.

When Vref = VDD, the voltage applied to the channel of the transmission gate 5 is the power supply voltage VDD / 2, and when the power supply voltage decreases and the low voltage operation is performed, the source-gate voltage of the transmission gate 5 also decreases. Become. That is, the transmission gate 5
If the threshold values of the P-channel transistor and the N-channel transistor are substantially equal to each other, the source gate voltage of both becomes low. However, if the voltage applied to the transmission gate is increased, the impedance of the transmission gate becomes low and the accuracy of A / D conversion does not decrease.

Example 2. Hereinafter, another embodiment of the invention of claim 1 will be described with reference to the drawings. FIG. 3 is a circuit diagram showing the configuration of the AD converter of this embodiment. 3, parts that are the same as or correspond to those in FIG. 1 are assigned the same reference numerals and explanations thereof are omitted. In the figure, 23 is a level conversion circuit for the control signal J0, and 24 is a level conversion circuit for the control signal J2. These level conversion circuits are also the level conversion circuit 2 for the control signal J1.
1 and the level conversion circuit 22 for the control signal b, the control signals J0 and J2 are level-converted based on the boosted power supply voltage 2VDD boosted by the booster circuit 14 to control the transmission gates 4 and 6 of the selection circuit 3.

Therefore, it is possible to prevent the accuracy of A / D conversion from being lowered at a low voltage, and it is effective even when the reference voltage applied to the resistance ladder circuit 2 is different from the power supply voltage VDD.

Example 3. An embodiment of the invention of claim 2 will be described below with reference to the drawings. In FIG. 4, parts that are the same as or correspond to those in FIG. In the figure, 25 and 26 are N-channel transistors and P-channel transistors which form an inverter circuit. The P-channel transistor 26 is a transistor having a low threshold value. 27 and 28 are an N-channel transistor and a P-channel transistor connected between the input and the output of the inverter circuit composed of the N-channel transistor 25 and the P-channel transistor 26,
Like the P-channel transistor 26, the P-channel transistor 28 has a low threshold value.

A low threshold transistor is used as the P-channel transistor 26 because the inverter circuit has a high voltage amplification degree when the input voltage is near the threshold value, and the voltage amplification in the inverter circuit is performed by the N-channel transistor 25 and the P-channel transistor 25.
Since the threshold voltage of the channel transistor 26 is equal to or higher than the total threshold voltage, the high threshold value of the P-channel transistor 26 is disadvantageous to the low voltage operation of the AD converter.
Therefore, the threshold value of the P-channel transistor 26 is set low.

A low threshold transistor is used as the P-channel transistor 28 so that the impedance of the P-channel transistor 28 can be kept low even if the power supply voltage is lowered. In this way, the speed at which the potential at the point c is shifted to the vicinity of the threshold value of the inverter circuit composed of the N-channel transistor 25 and the P-channel transistor 26 is increased.

In the present embodiment, the chopper type amplifier 7 uses a low-threshold transistor so that the chopper type amplifier 7 is
The low-voltage characteristic of the amplification performed in step 1 is improved, and the accuracy of A / D conversion at low voltage is improved.

Example 4. An embodiment of the invention of claim 3 will be described below with reference to the drawings. 5 and FIG.
The same or corresponding parts are designated by the same reference numerals and the description thereof will be omitted. In this embodiment, since the voltage value when the control signal J1 and the control signal b become the “H” level is the level of the boosted power supply voltage 2VDD, the source-gate voltages of the transmission gates 5, 8 and 9 are as shown in FIG. Since it is twice as large as that of the conventional A-D converter shown in FIG. 1, the impedance when the transmission gates 5, 8 and 9 are conductive is low, which is advantageous for the case where the power supply voltage is lowered. Further, by using a low threshold transistor for the chopper type amplifier 7, the low voltage characteristic of the amplification performed by the chopper type amplifier 7 is improved, and the accuracy of A / D conversion at a low voltage is improved.

Example 5. An embodiment of the invention of claim 4 will be described below with reference to the drawings. 6, parts that are the same as or equivalent to those in FIG. 1 are assigned the same reference numerals and explanations thereof are omitted. In the figure, reference numeral 30 denotes a voltage drop detection circuit for the power supply voltage VDD, which constantly monitors the power supply voltage VDD and outputs a voltage drop detection signal of'H 'level when the voltage drops below a predetermined voltage value. Reference numeral 31 is a voltage drop detection signal level conversion circuit (power supply voltage switching circuit) for converting the level of the voltage drop detection signal. When the voltage drop detection signal is input from the voltage drop detection circuit 30, it is applied via the diode 32 or the diode 33. The H-level gate control signal generated based on the power supply voltage is output from the OUT terminal to the gate terminal of the P-channel transistor 35 (power supply voltage switching circuit). At this time, the'L 'level gate control signal is output from the invert OUT terminal to the gate terminal of the P-channel transistor 34 (power supply voltage switching circuit). An AND circuit 37 performs a logical product operation of the clock signal f and the voltage drop detection signal output from the voltage drop detection circuit 30 and outputs a signal obtained as a result of the operation to the boosting level conversion circuit 15. Is.

Next, the operation will be described. When the power supply voltage VDD drops below a predetermined voltage value due to a change in power supply specifications or the like, the voltage drop detection circuit 30 outputs an “H” level voltage drop detection signal. As a result, the clock signal is supplied to the boosting level conversion circuit 15, and the booster circuit 14 generates and outputs the boosted power supply voltage 2VDD that is twice the power supply voltage VDD. As a result, the boosted power supply voltage 2VDD is applied to the voltage drop detection signal level conversion circuit 31, and the'H 'level gate control signal generated based on this boosted power supply voltage 2VDD is supplied to the gate terminal of the P-channel transistor 35. Then, the P-channel transistor 35 is rendered non-conductive, and an “L” level gate control signal is supplied to the gate terminal of the P-channel transistor 34 to render the P-channel transistor 34 conductive. Boosted power supply voltage 2 VDD
Is a control signal J1 via the P-channel transistor 34.
Level conversion circuit 21 and control signal b level conversion circuit 2
2, the control signal J1 level conversion circuit 21 level-converts and outputs the control signal J1 based on the boosted power supply voltage 2VDD, and the control signal b level conversion circuit 22 outputs the control signal b.
Is converted into a level based on the boosted power supply voltage 2VDD and output.

When the power supply voltage VDD becomes higher than a predetermined voltage value, the voltage drop detection circuit 30 does not output the voltage drop detection signal. Therefore, the clock signal is not supplied to the step-up level conversion circuit 15 and the boosted power supply voltage 2VDD. Is not generated. As a result, only the power supply voltage VDD is applied to the voltage drop detection signal level conversion circuit 31, and the'L 'level gate control signal generated based on the power supply voltage VDD is supplied to the gate terminal of the P-channel transistor 35. , P-channel transistor 35 is made conductive,
The'H 'level gate control signal is supplied to the gate terminal of the P-channel transistor 34 to make the P-channel transistor 34 non-conductive. The power supply voltage VDD is applied to the control signal J1 level conversion circuit 21 and the control signal b level conversion circuit 22 via the P-channel transistor 35,
The control signal J1 level conversion circuit 21 outputs the control signal J1 based on the power supply voltage VDD, and the control signal b level conversion circuit 22 outputs the control signal b based on the power supply voltage VDD.

As described above, if the predetermined voltage value to be compared with the power supply voltage in the voltage drop detection circuit 30 is set to a voltage value at which A / D conversion becomes difficult, the power supply is changed to a low voltage. Even in such a case, it is possible to obtain an A / D converter that can perform accurate A / D conversion and that can operate up to a high power supply voltage.

Example 6. In the fifth embodiment described above, the voltage drop detection circuit 30 is used to monitor whether or not the power supply voltage VDD becomes equal to or lower than a predetermined voltage value, and when the power supply voltage VDD becomes equal to or lower than the predetermined voltage value, the boosted power supply voltage 2VDD. Although the gate control signal generated based on the above is output, the voltage drop detection circuit 30 may be a programmable register 36 as shown in FIG. A write signal is written to this register when the write command i is made significant. The write signal is'H 'or
It is'L '. The user writes “L” in the register 36 when using a low-voltage power supply, for example. in this case,
Switching of use / non-use of the booster circuit 14 is performed via a user. Therefore, the switching becomes more reliable.

With this configuration, the user can variably control the voltage applied to the level conversion circuit 21 for the control signal J1, so that an AD converter can be obtained that operates accurately in a wide power supply voltage range. To be

Example 7. An embodiment of the invention of claim 5 will be described below with reference to FIG. 8, parts that are the same as or equivalent to those in FIG. 1 are assigned the same reference numerals and explanations thereof are omitted. In the figure, 38 is a constant voltage circuit (stabilized power supply) that generates a stabilized voltage regardless of the power supply voltage VDD. In this embodiment, the power supply voltage applied to the P-channel transistor 17 of the booster circuit 14 is the constant voltage circuit 38.
Sourced from.

In the present embodiment, the output of the constant voltage circuit 38 is constant regardless of the power supply voltage, so the boosted power supply voltage by the booster circuit 14 is constant. Therefore, if the boosted power supply voltage is set to a value that does not cause a problem in the operation of the AD converter, an AD converter having a wide operating voltage range can be obtained.

[0038]

As described above, according to the invention of claim 1,
Since the impedance when the selection switching means and the input switching switching means of the chopper type amplifier are in the conductive state is set to a low value, it is possible to prevent the A / D conversion accuracy from being lowered when a low power supply voltage is used. There is an effect that the -D converter can be obtained.

According to the second aspect of the present invention, the threshold value of the transistor forming the chopper type amplifier is set to be lower than the threshold value of the transistor included in another circuit or means other than the chopper type amplifier. It operates even at a low power supply voltage, and has an effect of preventing fluctuations in the power supply voltage, particularly deterioration in A / D conversion accuracy due to decrease in the power supply voltage.

According to the third aspect of the present invention, the impedance when the selection switching means and the input switching switching means of the chopper type amplifier are in a conductive state is set to a low value, and the threshold value of the transistor forming the chopper type amplifier is set to Since it is configured to be lower than the threshold value of a transistor included in a circuit or means other than the chopper type amplifier, there is an effect that an A / D converter can be obtained that can prevent a decrease in A / D conversion accuracy due to a decrease in power supply voltage. .

According to the invention of claim 4, when the power supply voltage drops, the selection switching means for switching the level signal of 1/2 of the power supply voltage in the selection switching means of the selection circuit and the input switching switching means of the chopper type amplifier. Since the control signal supplied to and is level-converted and the impedance when the selection switching means and the input switching switching means are in a conductive state is set to a low value, fluctuations in the power supply voltage, particularly the power supply voltage There is an effect that an A-D converter that can prevent a decrease in A / D conversion accuracy due to a decrease can be obtained.

According to the fifth aspect of the present invention, the boosted power supply voltage generated based on the stabilized power supply whose output voltage value is stabilized by the boosting power supply voltage is 1/2 of the power supply voltage in the selection switching means. Since the control signal supplied to the selection switching means for switching the level signal and the input switching switching means of the chopper type amplifier is configured to be level-converted, there is an effect that the influence of the fluctuation of the power supply voltage is suppressed.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an AD converter according to an embodiment of the present invention.

FIG. 2 is a waveform diagram showing a waveform of each part of the booster circuit of the AD converter according to the embodiment of the invention of claim 1;

FIG. 3 is a circuit diagram showing an AD converter according to another embodiment of the present invention.

FIG. 4 is a circuit diagram showing an AD converter according to an embodiment of the present invention.

FIG. 5 is a circuit diagram showing an AD converter according to an embodiment of the invention of claim 3;

FIG. 6 is a circuit diagram showing an AD converter according to an embodiment of the invention of claim 4;

FIG. 7 is a block diagram showing a programmable voltage drop detection circuit of an AD converter according to another embodiment of the invention of claim 4;

FIG. 8 is a circuit diagram showing an AD converter according to an embodiment of the invention of claim 5;

FIG. 9 is a circuit diagram showing a conventional AD converter.

FIG. 10 is a waveform chart of each part showing the operation of the conventional AD converter.

[Explanation of symbols]

2 resistance ladder circuit 3 selection circuit 4, 5, 6 transmission gate (selection switching means) 7 chopper type amplifier 8, 9 transmission gate (input switching switching means) 13 control circuit (control means) 14 booster circuit 21 level for control signal J1 Conversion circuit (level conversion circuit) 22 Control signal b level conversion circuit (level conversion circuit) 30 Voltage drop detection circuit 31 Voltage drop detection signal level conversion circuit (power supply voltage switching circuit) 34, 35 P-channel transistor (power supply voltage switching circuit) ) 38 constant voltage circuit (stabilized power supply)

Claims (5)

[Claims] 1. A resistance ladder circuit for dividing a reference voltage,
1 out of the voltage divided by the resistance ladder circuit
A selection circuit having selection switching means for selecting one of the two; and a chopper type amplifier having input switching switching means for input switching for comparing the analog voltage to be A / D converted with the voltage selected by the selection circuit. In an A / D converter including the selection circuit and control means for controlling the chopper type amplifier, a booster circuit for boosting a power supply voltage and 1/1 of the power supply voltage in the selection switching means of the selection circuit. Level conversion for level conversion based on the boosted power supply voltage obtained by boosting the control signal supplied to the selective switching means for switching the voltage signal of two levels and the input switching switching means of the chopper type amplifier by the booster circuit. An A-D converter comprising a circuit. 2. A resistance ladder circuit for dividing a reference voltage,
1 out of the voltage divided by the resistance ladder circuit
A selection circuit having selection switching means for selecting one of the two; and a chopper type amplifier having input switching switching means for input switching for comparing the analog voltage to be A / D converted with the voltage selected by the selection circuit. In the AD converter provided with the selection circuit and control means for controlling the chopper type amplifier, the chopper type amplifier is composed of a transistor having a threshold value lower than that of a transistor included in another circuit or means. An AD converter characterized by being an amplifier. 3. A resistance ladder circuit for dividing a reference voltage,
1 out of the voltage divided by the resistance ladder circuit
A selection circuit having selection switching means for selecting one of the two; and a chopper type amplifier having input switching switching means for input switching for comparing the analog voltage to be A / D converted with the voltage selected by the selection circuit. In the AD converter provided with the selection circuit and control means for controlling the chopper type amplifier, the chopper type amplifier is composed of a transistor having a threshold value lower than that of a transistor included in another circuit or means. An amplifier, a booster circuit for boosting the power supply voltage, a selection switching means for switching a voltage signal at a level of 1/2 of the power supply voltage in the selection switching means of the selection circuit, and an input switching of the chopper type amplifier. Booster obtained by boosting the control signal supplied to the switching means by the booster circuit. A-D converter, characterized in that it includes a level conversion circuit for level conversion based on the source voltage. 4. A resistance ladder circuit for dividing a reference voltage,
1 out of the voltage divided by the resistance ladder circuit
A selection circuit having selection switching means for selecting one of the two; and a chopper type amplifier having input switching switching means for input switching for comparing the analog voltage to be A / D converted with the voltage selected by the selection circuit. In an AD converter including the selection circuit and control means for controlling the chopper amplifier, a voltage drop detection circuit for detecting a drop in the power supply voltage and a boosted power supply voltage for boosting the power supply voltage. The control signals supplied to the booster circuit, the selection switching means for switching the voltage signal at the level of 1/2 of the power supply voltage in the selection switching means of the selection circuit, and the input switching switching means of the chopper type amplifier are The level conversion circuit for level conversion and the power supply voltage supplied to the level conversion circuit are detected by the power supply voltage detection circuit. A-D converter, characterized in that a supply voltage switching circuit for switching to the boosted power supply voltage boosted by the power supply voltage or the boosting circuit based on. 5. A resistance ladder circuit for dividing a reference voltage,
1 out of the voltage divided by the resistance ladder circuit
A selection circuit having selection switching means for selecting one of the two; and a chopper type amplifier having input switching switching means for input switching for comparing the analog voltage to be A / D converted with the voltage selected by the selection circuit. In the AD converter provided with the selection circuit and the control means for controlling the chopper type amplifier, a stabilized power supply whose power supply voltage is different from the power supply voltage and whose output voltage value can be adjusted is provided. A booster circuit for boosting the voltage based on the above voltage to generate a boosted power supply voltage, a selection switching means for switching a voltage signal at a level of 1/2 of the power supply voltage in the selection switching means of the selection circuit, and an input switching of the chopper type amplifier. And a level conversion circuit for converting the level of the control signal supplied to the switching means based on the boosted power supply voltage boosted by the booster circuit. A-D converter, characterized in that there was e.