JPH0774171A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent discontinuity failure due to EM phenomenon even if the width of wiring is reduced, by placing metal pieces of a very small volume containing Al alloy, comprising a first group of metal pieces and metal pieces of a very small volume containing Al alloy, comprising a second group of metal pieces, and alternately connecting these metal pieces of each group using via plugs composed of W. CONSTITUTION:This semiconductor device consists of a first group of metal pieces, an insulating film 40 and via plugs 50. The first group of metal pieces is formed by arranging a plurality of metal pieces 30, very small in volume, containing Al alloy 31, on a substrate 10 at specified intervals. The insulating film 40 is formed on the substrate 10 on which the first group of metal pieces is formed. The via plugs 50 are formed by filling W into holes formed in the insulating film 40 in proximity to both ends of each meal piece 30 comprising the first group. In addition the semiconductor device is provided with a second group of metal pieces by arranging a plurality of other metal pieces, very small in volume, containing Al alloy 61, on the insulating film 40 at specified intervals. Each of the metal pieces of the second group is electrically connected with one end of each of any two adjacent metal pieces comprising the first group through the via plugs formed thereon.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to the structure of wiring used in the semiconductor device.

[0002]

2. Description of the Related Art In recent years, semiconductor devices have changed from LSI to VLS.
The degree of integration has been improved to I and further to ULSI, and along with this, the miniaturization of the width of the wiring and the diameter of the contact hole has been remarkably advanced. With the progress of such technological development, a technique using an aluminum (hereinafter, referred to as Al) alloy as a wiring material of a semiconductor device has been attracting attention.
The wiring made of Al alloy is
The electromigration (hereinafter referred to as EM) phenomenon of Al atoms may occur due to energization of the wiring. This EM
The phenomenon causes voids (holes) in the Al wiring, which causes an inconvenience such as a resistance increase of the Al wiring and a wiring failure such as disconnection.

For these inconveniences, the following measures are taken, for example.

(1) That is, in order to make the EM phenomenon less likely to occur, Al-containing copper added to the wiring material as Al-
A Cu alloy is used.

(2) Further, a layer of titanium nitride (hereinafter referred to as TiN) or the like is formed on the upper layer, lower layer or both upper and lower layers of the Al wiring to form a multi-layer structure, and even if the Al wiring layer is broken, the Al wiring layer Since the layer formed around the wire does not break, a break failure due to a break in the Al wiring is prevented.

In addition to these measures, the following measures are taken in the circuit design as measures for mitigating the EM phenomenon. That is, in the wiring portion where a large current flows, the width of the wiring is widened to reduce the effective current density.

[0007]

However, in order to pass a large current, it is necessary to increase the width of the wiring in order to suppress the current density within a range not exceeding the upper limit value known by the acceleration test in advance. . For this reason, the problem that the wiring width becomes thick causes an adverse effect that the size of the semiconductor chip must be increased, which has been an obstacle to the miniaturization of the semiconductor device.

Therefore, an object of the present invention is to provide a semiconductor device which solves the above problems.

[0009]

In order to solve the above problems, in a semiconductor device according to the present invention, a plurality of minute volume metal pieces containing an Al alloy are formed on a substrate at predetermined intervals. The first metal piece group, the insulating film formed on the substrate on which the first metal piece group is formed, and the insulating film on both ends of each metal piece forming the first metal piece group. A via plug made of tungsten (hereinafter, W) embedded in an established hole and a via formed on one end of each metal piece adjacent to each other of the metal pieces forming the first metal piece group. A second metal piece group, which is electrically connected to both of the plugs and has a minute volume of another metal piece containing an Al alloy and which is formed on the insulating film at predetermined intervals. And

Further, it is desirable that the minute volume is 10 μm ³ or less.

[0011]

According to the above structure, the semiconductor device according to the present invention includes the metal piece of a minute volume containing the Al alloy forming the first metal piece group and the Al alloy forming the second metal piece group. The metal pieces containing a minute volume are alternately connected by a via plug made of W. Therefore, the metal piece acts as a single wire as a whole, and even if an Al atom in the metal piece tries to move due to the EM phenomenon, the Al atom does not have a space to move in the metal piece because the metal piece has a minute volume. Moreover, the movement is also blocked by the via plug.

[0012]

Embodiments of the present invention will be described below with reference to the accompanying drawings. In the description of the drawings, the same elements will be denoted by the same reference symbols, without redundant description.

A semiconductor device according to an embodiment of the present invention will be described with reference to FIG. The semiconductor device according to this example is as follows. First, the base insulating film 20 is formed on the Si substrate 10. A plurality of metal pieces 30 are arranged on the underlying insulating film 20 at predetermined intervals on the same line.
Of metal pieces are formed. Each metal piece forming this first metal piece group has a TiN film 3 on the Al-Cu alloy film 31.
2 is deposited, and a Ti film 33 is further deposited thereon to form a multilayer structure. The length of each metal piece is about 1
The thickness is 0 μm, the width is about 1.2 μm, and the thickness is about 1 μm. Particularly, regarding the Al—Cu alloy film 31, the thickness is 8000 angstrom and the volume is 9.6 μm ³ . A first SiO ₂ insulating film 40, which is an insulating film, is formed on the underlying insulating film 20 on which the first metal piece group is formed by the CVD method.

The first SiO ₂ insulating film 40 and the first
In the vicinity of both ends of each metal piece 30 constituting the metal piece group
A via hole is formed in the film 32 and the Ti film 33, and the W film is embedded in the via hole by the whole surface growth W-CVD method and its etchback process, and the via plug 50 is formed.
Are formed. The diameter of this via plug 50 is 0.
The height is 8 μm and the height is 1 μm. First SiO ₂ insulating film 4
On 0, a second metal piece group is formed in parallel with the first metal piece group. This second metal piece group includes a plurality of metal pieces 6
It is formed by arranging 0s on the same line at a predetermined interval. Each metal piece 60 forming this second metal piece group is also the first
Like the metal piece 30 constituting the metal piece group, the TiN film 62 is deposited on the Al—Cu alloy film 61, and T is further formed on the TiN film 62.
It is a multilayer structure in which the i film 63 is deposited. The size of each metal piece 60 forming the second metal piece group and the size and volume of the Al—Cu alloy film 61 forming these metal pieces 60 are
It is the same as the metal piece 30 that constitutes the first metal piece group. Further, the metal pieces 60 forming the second metal piece group are electrically connected so that the metal pieces 30 adjacent to each other among the metal pieces 30 forming the first metal piece group are electrically connected to each other. It is connected to the via plug 50. A second SiO ₂ insulating film 70 is formed on the first SiO ₂ insulating film 40 on which the second metal piece group is formed.

That is, in the semiconductor device according to this embodiment, one metal wiring is formed by connecting the first metal piece group and the second metal piece group with the via plug 50.

Incidentally, structures necessary for a semiconductor device such as a diffusion layer and a gate electrode are formed in and on the surface of the Si substrate 10. A contact hole exists at a required position of the base insulating film 20, and each metal piece forming the first metal piece group,
A contact structure is formed that connects the diffusion layer, the gate electrode, or another structure.

Next, the EM life of the wiring (hereinafter referred to as the main wiring) according to the semiconductor device of this embodiment will be described. In determining the EM life, a wiring having a multilayer structure having a width of 1.2 μm and a thickness of 1.0 μm (hereinafter referred to as a reference wiring) was used as a comparative material. The structure of the reference wiring is a structure in which a TiN film is deposited on the Al—Cu alloy film, and a Ti film is further deposited thereon.

FIG. 2 shows the results of the EM life acceleration test of the main wiring and the reference wiring. The conditions for the accelerated test are that the current density at a constant current is 4E6A / cm ² and the ambient temperature is 250 ° C.
Is. Further, the number of samples of the main wiring and the number of samples of the reference wiring are each 20. As can be seen from FIG. 2, in the reference wiring, the cumulative failure rate reaches 50% in 350 hours,
Furthermore, in 1000 hours, the cumulative failure rate reaches 99%. On the other hand, in the present invention, no wire breakage was confirmed even after 1000 hours. From this,
It can be seen that the EM life of the present wiring was extended ten times or more as compared with the conventional reference wiring. Therefore, in the prior art, a wiring width of at least 10 μm was required, but with the present wiring, the wiring width can be reduced to 1.2 μm.

This is explained as follows. That is, the metal pieces containing Al atoms forming each of the first metal piece group and the second metal piece group have a minute volume, and these metal pieces are connected by a via plug made of W. Therefore, even if the Al atom tries to move due to the EM phenomenon, there is no place to move in the metal piece, and
Via plugs also prevent migration to other metal pieces,
As a result, movement of Al atoms does not occur. As a result, E
Since the movement of Al atoms due to the M phenomenon becomes impossible, even if a current is applied at a current density (for example, 1E7A / cm ² ) larger than the commonly used 1E5 to 1E6A / cm ² , a disconnection defect does not occur. Therefore, the wiring width can be reduced to 1 /
It can be said that even if the thickness is reduced to about 10, the disconnection failure due to the EM phenomenon does not occur. As a result, the area occupied by the wiring width can be greatly reduced, and the LSI chip can be downsized.

[0020]

As described above in detail, according to the present invention, it is possible to provide a semiconductor device having a wiring in which the movement of Al atoms due to the EM phenomenon does not occur. For this reason, the movement of Al atoms due to the EM phenomenon becomes impossible, and therefore, compared with the commonly used 1E5 to 1E6A / cm ² ,
Even if a current is applied with a large current density (for example, 1E7A / cm ² ), disconnection failure does not occur, and the wiring width is 1/1 times the conventional width.
Even if it is thinned to about 0, disconnection failure due to the EM phenomenon does not occur. As a result, the area occupied by the wiring width can be greatly reduced, and the LSI chip can be downsized.

[Brief description of drawings]

FIG. 1 is a cross-sectional explanatory diagram of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a result of an electromigration life acceleration test of a wiring and a reference wiring according to the semiconductor device of the present embodiment.

[Explanation of symbols]

10 ... Si substrate, 20 ... base insulating film, 30 ... first metal strip 40 for the metal strip group ... first SiO ₂ insulating film, 5
0 ... Via plug, 60 ... Metal piece that constitutes the second metal piece group, 70 ... Second SiO ₂ insulating film.

Claims (2)

[Claims] 1. A first metal piece group formed by arranging a plurality of minute volume metal pieces containing an aluminum alloy on a substrate at a predetermined interval, and the substrate on which the first metal piece group is formed. An insulating film formed thereon; a via plug made of tungsten embedded in a hole formed in the insulating film above both ends of each metal piece forming the first metal piece group; Of the metal pieces constituting the metal piece group, the other metal piece of a minute volume electrically connected to both of the via plugs formed at the respective ends of the metal pieces adjacent to each other and containing the aluminum alloy. And a second metal piece group formed by arranging a plurality of metal pieces on the insulating film at a predetermined interval. 2. The semiconductor device according to claim 1, wherein the minute volume is 10 μm ³ or less.