JPH0773217B2 - ADPCM encoding / decoding circuit - Google Patents

Description

The present invention relates to a coding / decoding circuit (hereinafter referred to as AD) for sequentially adaptively predicting a voice signal and a voice band data signal and compressing an information amount.
PCM CODEC) is related to the configuration.

(Prior Art) FIG. 2 is a block diagram showing a configuration example of a conventional ADPCM CODEC. The ADPCM CODEC includes an encoder 207 and a decoder 214, and the encoder 207 receives the signal S input to the input terminal 200.
(K) (the signal is a sampled discrete value sequence,
The differential signal e (k) between the prediction signal (k) and the prediction signal (k) is quantized by the adaptive quantizer 201, and the output terminal 206
The transmission code I (k) is output to. Further, the adaptive inverse quantizer 202 performs inverse quantization to obtain a reconstructed difference signal (k).
The adaptive predictor 205 is an adaptive zero predictor 203, an adaptive polar predictor 20.
It consists of 4 and calculates the predicted value (k) from (k).
The configuration of the decoder 214 is the same as that of the encoder 20 except the adaptive quantizer 201.
The configuration is the same as that of 7, and the operation is also the same.

In such a system, the adaptive predictor 205 plays an important role, and accurate prediction leads to improvement in system performance. When the input signal S (k) is a voice signal and a voice band data signal, the upper and lower limits of the signal band are defined, and the predictor can be optimally designed to predict a signal within this band, It is possible to improve the prediction accuracy and stability.

An example of such an ADPCM CODEC is CCITT STUDY GROUP XVI
II, November 21-25, 1983, Question 7 / XVIII, `` 32 Kbit / s
ADAPTIVE DIFFERENTIALPULSE CODE MODULATION ”.

(Problems to be solved by the invention) However, such ADPCM CODEC has a problem that the characteristics are not constant, and one of the causes is the presence or absence of a direct current (hereinafter referred to as DC) offset component in the discrete input signal. I found out that it was related to big and small.

(Means for Solving Problems) The present invention relates to an ADPCM CO which sequentially generates a predictive signal for a discrete input signal and quantizes and encodes a difference signal between the two signals.
In DEC, the DC offset component is removed from the discrete input signal.

(Operation) ADPCM CODEC is to predict and encode the signal at the next time sequentially from the history of past time series. In the case of an input signal with DC offset, DC offset is added to all time series. Even if the input signal and the amount of DC offset are relatively small values, the ADPCM CODEC system adaptively changes the system to predict the DC offset.

However, the band of the input signal is limited, and the DC component is a signal outside the band. Therefore, since the signal is adapted to predict the signal outside the band, the ADPCM CODEC loses the prediction accuracy for the signal within the band and the system characteristics deteriorate.

According to the present invention, a DC offset removing circuit is provided to remove an offset in the input signal.

Figure 3 shows how the S / N of ADPCM CODEC changes when the sine wave is used as the input signal and the level of the sine wave is changed, and the characteristic (dotted line) for the input signal with DC offset is DC. It can be seen that the characteristics are worse than the characteristics (solid line) for an input signal without offset. In addition, CCITT
The standard is also shown.

(Embodiment) FIG. 1 is a block diagram showing an embodiment of the present invention, in which a DC offset component to be removed is generated based on the concept of signal prediction. Discrete input signal S
The frequency component of the DC offset in (k) is the DC component,
In addition, since the DC offset can be predicted if only the amplitude value of the offset can be detected, when considering the simplest DC offset predictor, one multiplier is used, its input is set to a fixed value D, and the multiplication coefficient is controlled. The DC offset predicted value dc (k) can be obtained by

The multiplication coefficient C (k) is controlled to be the amplitude value of the offset. Therefore, as a control method of this coefficient C (k),
When the least squares method is applied with the power of the input signal S ′ (k) after offset removal as a function, {S ′ (k)} decoding = {S (k) −dc (k)} ² ... Partial differentiation of equation 1 by coefficient C (k) Therefore, the control of the coefficient C (k) is performed by the sign function of the second equation.
sgn is taken and C (k + 1) = (1−δ) C (k) + α · sgn (S ′ (k)) ... Third
Expression δ: relaxation coefficient α: acceleration coefficient

Further, when the fixed value D is “1”, dc (k) = C
(K). As the control variable, ′ (k) which is the reproduction value of S ′ (k) is used, and dc (k + 1) = (1−δ) dc (k) + α · sgn (′ (k)) ... . The sgn function of the fourth expression was ternarized. To use.

The embodiment shown in FIG. 1 is based on such a concept. 101 to 103 are adders, 300 is an ADPCM conventional system similar to the conventional ADPCM CODEC having an adaptive predictor AP, and 405 and 412 are DC offset prediction. It is a vessel. DC offset predictor 405,412
Are sample delays 400 and 410, adders 401 and 408,
It consists of relaxation coefficient multipliers 402 and 409, acceleration coefficient multipliers 403 and 407, and code generators 404 and 406, which fulfills the function corresponding to the fourth expression and receives the reproduced signal ′ (k) of the signal S ′ (k) as an input.
The predicted DC offset value dc (k) is generated.

On the encoding side, the reproduction signal (k) of the signal e (k) is received from the ADPCM conventional system, the adder 102 generates the reproduction signal ′ (k) of the signal S ′ (k), and the DC offset predictor 405. D
The C offset predicted value dc (k) is generated, and the predicted value dc (k) is subtracted and removed from the input signal S (k) by the adder 101, and the ADPCM conventional system has no offset input signal S '.
Give (k).

On the decoding side, the reproduced signal '(k) of the signal S' (k) is received from the ADPCM conventional system, the DC offset predictor 412 generates the DC offset predictive value dc (k), and the adder 103 adds them. Superimpose the reproduced signal (k) of the input signal S (k)
To get

FIG. 4 is a block diagram of a second embodiment of the present invention,
ADPCM Conventional system 310 with fixed pole predictor FP as conventional system 310
The M CODEC is adopted, and in this case, the reproduced signal ′ (k) of the signal S ′ (k) is also ADPCM on the encoding side.
Since it is created by the system, the one corresponding to the adder 102 in FIG. 1 is unnecessary.

The ADPCM conventional system shown in FIG. 1 or 4 is a conventional system having an adaptive zero type predictor and a fixed pole type predictor.
An ADPCM CODEC, a conventional ADPCM CODEC having an adaptive zero-type predictor, an adaptive polar predictor, and a fixed polar predictor, and other conventional ADPCM CODECs can be adopted.

Further, the calculation of the DC offset predicted value dc (k) was performed as shown in the fourth equation using ′ (k) as the evaluation function.
Considering that the PCM conventional system does not predict the DC offset, the DC offset component is also included in the reproduced signal (k) of the differential signal e (k). Therefore, even if this signal (k) is used as an evaluation function, the same effect can be obtained. It is also possible to use a signal that has another DC offset component and is used as an evaluation function.

When (k) is used, dc (k + 1) = (1-δ) dc (k) + α · sgn ((k)) ...
This can be realized by substituting the signal (k) for the input of the DC offset predictors 405 and 412 in FIG. 1 or 4 in place of the signal ′ (k).

FIG. 5 is a block diagram showing a third embodiment of the present invention,
Although it is also based on the idea of signal prediction, an integrated signal P (k) obtained by integrating the reproduction signal (k) of the input signal S (k) is used as a multiplier input instead of using a fixed value as an input. It is configured, and is useful in a system in which a large DC offset variation is predicted.

When the integrated signal P (k) is input, the integrated signal P
(K), multiplication coefficient C (k), and DC offset prediction value
dc (k) can be expressed by equations 7-9.

P (k + 1) = ( 1-δ 0) P (k) + δ 0 · sgn ((k)) ... 7th formula C (k + 1) = ( 1-δ 1) C (k) + α · sgn ((k) ) .Sgn (P (k + 1)) ... Equation 8 dc (k + 1) = C (k + 1) .P (k + 1) ... Equation 9 The DC offset predictor 500 (550) in FIG. The code generators 501 and 507 (551, 557) and the relaxation coefficient multiplier 50 function so as to satisfy the function represented by the equation (9).
2,504,510,512 (552,554,560,562), Adder 503,511 (5
53,561), sample delay 505,513 (555,563), multiplier
It is composed of 506,508 (556,558). In FIG. 5, reference numeral 104 on the encoding side is an adder for producing a reproduction signal (k).

FIG. 6 is a block diagram showing a fourth embodiment of the present invention,
This is an example using the nth-order filters 600 and 650.

By setting the frequency characteristics of the nth-order filters 600 and 650 in FIG. 6 to have a gain in the DC region as shown in FIG. 7, a DC offset component can be detected and the input signal S (k)
DC offset can be removed.

FIG. 8 is a block diagram showing a fifth embodiment of the present invention,
An nth-order filter 800 having a loss in the DC region as shown in FIG. 9 is used as a DC offset removing means in the preceding stage of the ADPCM conventional system 300, and can be applied when it is not necessary to regenerate the DC component. It is a thing.

(Effect of the Invention) As described above in detail, according to the present invention, the conventional AD
Since the DC offset predictor is provided in the preceding stage of the PCM CODEC to remove the DC offset, the ADPCM CODEC having excellent characteristics can be configured for both the signal without the DC offset and the signal with the DC offset.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram of a conventional ADPCM CODEC, and FIG. 3 is a diagram shown for explaining the operation of the present invention. 4 to 6 are block diagrams of other embodiments of the present invention, FIG. 7 is a frequency characteristic diagram of the nth-order filter of FIG. 6, and FIGS. 8 and 9 are still other embodiments of the present invention. It is a block diagram showing an example of. 101 to 103 …… Adder, 300,310 …… ADPCM conventional model, 400,41
0 …… Sample delay device, 401,408 …… Adder, 402,409…
... Relaxation coefficient multiplier, 403,407 ... Acceleration coefficient multiplier, 40
4,406 ... Load generator, 405,412 ... DC offset predictor, 500,550 ... DC offset predictor, 600,650 ... nth-order filter, 800 ... nth-order filter.

Front page continued (72) Inventor Kiyoshi Yokota 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd. (56) Reference JP 62-42622 (JP, A) JP 62-104223 (JP, A) JP 63-76526 (JP, A) JP 63-263831 (JP, A) JP 60-204124 (JP, A) JP 60-194633 (JP, A) JP 56-7346 (JP, B2) U.S. Pat. No. 4,860,315 (US, A) European Patent Application Publication 288281 (EP, A) ICASSP'86 PROCESSED IN GS, Tokyo, 7th-11th April 1986, Vol. 2/4, page s 821-824, IEEE, New York, US; FUKASAWA et al. : "Advanced 32 kbit / s ADPCM coding to transmit sound and high-speed voi ceband data" IEEE JOURNAL ON SE LECTED, REASON IN COMM. 6, No. 2, February 1988, pages 262-273, IEEE, New York, US; HOSODA et al. : "A 32 kbit / s ADPC M algorithm having high performance forr both voice and and 9.6 kbit / s mode signal signs"

Claims (4)

[Claims] 1. A signal S'having a discrete input signal S (k) as an input and removing a DC offset component of the signal S (k).
A DC offset removing means for outputting (k) and an output signal S '(k) of the removing means are inputted to generate a sequential prediction signal (k), and both signals S' (k),
An ADPCM encoding / decoding circuit comprising: an encoding unit for quantizing and encoding the difference signal e (k) of (k). 2. A reproduction signal 'of either or both of the signal S' (k) from which the DC component has been removed by the offset removing means and the differential signal e (k).
(K), based on (k), the discrete input signal S
Prediction means for generating a predicted value dc (k) of the DC offset component of (k), and the predicted value dc (k) from the discrete input signal S (k).
AD means according to claim 1, characterized by including:
PCM encoding / decoding circuit. 3. The offset removing means receives as input the signal S '(k) from which the DC component has been removed.
The filter according to claim 1, further comprising: a filter having a fixed coefficient of the following (where n is an integer), and means for removing an output value of the filter from the discrete input signal S (k). AD
PCM encoding / decoding circuit. 4. The ADPCM encoding / decoding circuit according to claim 1, wherein the offset removing means is a filter having a loss in a DC component.