JPH061916B2 - Band division encoding / decoding device - Google Patents

Description

TECHNICAL FIELD The present invention relates to a band compression technique for a signal such as voice / music.

(Prior Art) As a conventional band compression technique, a band division coding method partially adopting an adaptive differential PCM coding method and an adaptive differential PCM (ACPCM) coding method is well known. Issued in April, 2012 by I EE Transactions on Communications (IEEE Tran
sactions on Communications), pages 710-737. Hereinafter, the adaptive differential PCM coding method and the band division coding (SBC) method will be described only in the necessary range.

Hereinafter, the adaptive differential PCM coding method will be referred to as ADPCM, and the band division coding method will be referred to as SBC. FIG. 2 shows an ADPCM encoding / decoding method, which includes an input signal terminal 1, a subtractor 2, a quantizer 3, an inverse quantizer 4, an adder 5, and a predictor 6.
And an ADPCM encoder including a code output terminal 7, a code input terminal 8, an inverse quantizer 9, an adder 10, and a predictor 11.
And an ADPCM decoder consisting of an output terminal 12.

The quantizer 3 is a circuit that obtains an N-bit-length output signal smaller than M as an output signal when the input signal is displayed with an M-bit length, and determines the input signal using 2 ^N −1 threshold values, The determination result is output with N bits. That is, the quantization width at a certain sample time j is Δ _j , and the input signal x _j at this time is n _j · Δ _j <x _j <(n _j +1) · Δ _j , n _j ε {0, ± 1, ± 2, ……… ± (2 ^N-1 −
1), ^{-2 N-1} (1) N: If the number of assigned quantization bits, then the output signal is n _j , and the quantization width Δ _{j + 1} at the next sampling time (j + 1) is a quantum. The companding is performed by using the following equation according to the signal level of the rectifier input signal.

Δ _{j + 1} = Δβ _j · M (n _j ) (2) Here, M (n _j ) is a multiplier uniquely determined by n _j , and a voice signal sampled at 8 kHz has 4 bits (N = 4)
Table 1 shows an example of the multipliers used in the encoding. Hereinafter, Δ _j is referred to as a quantization step size coefficient.

In equation (2), if β is set to a positive constant smaller than 1, as long as the predictor is a time-invariant filter, the calculation of Δβ _j has the effect of leaking the quantization width in the past. It is known that it will become stronger against, and more specifically, Transactions on Communications (Transacitons) issued by IEE (IEEE) in 1975.
on Communications), pages 1362 to 1365. When the N-bit output signal of the quantizer 3 and the transmitted N-bit quantizer output signal are input, the inverse quantizers 4 and 9 generate an N-bit reproduction input signal with respect to the threshold value. dequantizing transmission signal by at outputs _{x j = n j Δ j +} 0.5Δ j (3). The transfer functions of the predictors 6 and 11 are the same, and if this is P (Z), Becomes Here, {▲ a ^j _i ▼ | i = 1, ..., k} is the time j
Which is called the prediction coefficient of , And the inverse quantizer output signal _j , each coefficient is changed so as to minimize _j 2. That is, each coefficient is As it changes from moment to moment. Here, δ and g are positive constants smaller than 1.

The ADPCM encoding / decoding method will be described below with reference to FIG. When the input signal sample value x _{j at} time j is input from the terminal 1 to the ADPCM encoder, the subtractor 2 inputs the input signal x _j and the output signal of the predictor 6. Is calculated and input to the quantizer 3 as an error signal e _j . The quantizer 3 converts e _j into the N-bit code n _j as described above, and is output from the terminal 7 and simultaneously input to the inverse quantizer 4. The inverse quantizer 4 reproduces the M-bit error signal _j from n _j . Reproduced error signal _j and output of predictor 6 Is the locally decoded signal added by the adder 5. To play.

After this, the quantizer widths of the quantizer 3 and the inverse quantizer 4 and the coefficients of the predictor 6 are modified in order to code the next input signal as described above. As described above, the coefficient modification of the predictor is modified so as to minimize the power of the error signal _j , that is, ² _j , so that the e _j signal has a smaller dynamic range than the x _j signal, Considering the encoding, the error generated by the quantizer 3 is reduced by the reduction, and the encoding can be performed with high accuracy.

On the other hand, in the decoder, the received quantized code n _j is input from the terminal 8 and the dequantizer 9 generates the reproduction error signal _j . This _j and the output of the predictor 11 Is added by the adder 10 Are combined, output to the output terminal 12, and added to the predictor 11 to predict the next sample time. Also on the decoder side, the quantization width of the inverse quantizer is changed every moment from the quantization code n _j or the error signal _j , and , The predictor 1 to minimize the power of _j
The coefficient of 1 is changed.

In the encoder and decoder, the dequantizer 4,9 and the predictor
If the internal states of 6 and 11 match, the encoder / decoder The values of match. Therefore, even if the encoder and the decoder are provided apart from each other in distance, the input signal x _j applied to the terminal 1 and the output from the terminal 12 are output. Will have almost the same value.

Further, one method of the conventional SBC is shown in FIG. Third
The figure shows a method of dividing the entire band of the signal into two sub-bands. The signal input from terminal 1 has a high-pass filter 21 and a high-pass filter 21 each having a cutoff frequency of 1/4 of the sampling frequency. Input to the low-pass filter 22. Since the output of the low-pass filter 22 does not include high-frequency components of 1/4 or more of the sampling frequency, it is possible to reduce the sampling rate to 1/2, and the resampling switch 24 sets the sampling rate to the terminal. Reduce to 1/2 of the signal added to 1. Similarly, the output of the high-pass filter 21 is zero in the reduction half in the band, so by re-sampling the output signal of the high-pass filter 21 deviated to the high band to 1/2 by the re-sampling switch 23, The folded spectrum signal has a spectrum in which the high-frequency side spectrum is folded back to the low-frequency side. For details of the principle of this resampling, refer to the above-mentioned first document. The output of the resampling switches 23 and 24 is the conventional ADPCM.
The ADPCM encoders 25 and 26 described in the encoding method are respectively input and encoded. The codes output from the ADPCM encoders 25 and 26 are transmitted from the terminal 7 as one code signal by the multiplexing circuit 27 and become the SBC coding side signal. On the other hand, on the decoding side of the SBC, the code signal in which the high band side code and the low band side code received from the terminal 8 are multiplexed is changed to the high band side code signal by the resampling switches 31 and 32, respectively. Separated into low frequency side code signal, ADP
Input to the CM decoders 33 and 34, respectively. The sampled signals decoded by the ADPCM decoders 33 and 34 are switched by the switch 35, respectively.
A value of zero is inserted between the sampling signals by and and 36 to obtain a signal having a doubled sampling rate. The details of the characteristics of the signal in which zeros are inserted between sampling points are detailed in the above-mentioned first document, but the frequency spectrum before zeros are inserted between sampling points from zero to 1/4 of the sampling frequency. The same thing as in the above, but inversion of the spectrum is obtained from 1/4 to 1/2 of the sampling frequency. Switch for this
In the case of the output signal of 35, as described above, with respect to the ADPCM decoded signal of the signal obtained by spectrally inverting the high frequency component of the signal applied from the terminal 1 by the resampling switch 23 on the encoder side to the reduced frequency. Since the zeros are inserted between the sampling points, the output signal of the switch 35 is almost equal to the high frequency component of the signal applied to the terminal 1 from 1/4 to 1/2 of the sampling frequency. Has the same spectrum. Similarly, the output signal of the switch 36 is a 1/2 sampling rate signal A in which the low-frequency component of the signal applied from the terminal 1 is reduced to the low-frequency component by the resampling switch 24 on the encoder side.
Since zeros are inserted between the sampling points in the DPCM decoded signal, the output signal of the switch 36 is the low frequency range of the signal applied to the terminal 1 from zero to 1/4 of the sampling frequency. It has almost the same spectrum as the component. Therefore, the output of the switch 35 is output by the high-pass filter 37, and the output of the switch 36 is output by the low-pass filter 38, and only the high-pass and low-pass components having the same spectrum as that of the input signal to the terminal 1 are output. Extract and add the extracted result to adder 39
Add together. In this way, the decoded signal of the signal applied to the terminal 1 is obtained at the terminal 12.

(Problems to be Solved by the Invention) In the conventional SBC coding method, ADPCM is used so as to improve efficiency when signal components are unevenly distributed in a high band or a low band.
The distribution of the number of quantized bits is fixed, and good characteristic encoding is possible only for unevenly distributed signal components, and the characteristic is deteriorated for other signal components. When changing the distribution of the number of quantization bits of ADPCM, if the information of this change is transmitted, the transmission efficiency will decrease.

An object of the present invention is to eliminate such a drawback of the related art, to make the number of bits allocated to each band variable, and at the same time to perform band division with high coding efficiency without the need to transmit information on the number of bits allocated to each band. It is to provide an encoding / decoding method.

(Means for Solving Problems) According to the present invention, a filter bank that divides a digital input signal obtained by sampling into frequency band signals of a plurality of (M) channels, and a sample of each divided signal A switch having a coding speed of 1 / M, an adaptive differential PCM coding circuit for coding a divided signal by changing the number of quantization bits according to a first bit allocation described later, and an adaptive differential PCM coding circuit , A bit allocation decision circuit for deciding the first bit allocation by observing the step size, an encoding / multiplexing circuit for multiplexing and outputting the output code of the adaptive difference PCM encoding circuit, and an output signal of the code multiplexing circuit. And a switch that divides the divided signal according to a second bit allocation described below, and each divided signal by changing the number of quantization bits according to a second hit distribution described below using each divided code. An adaptive differential PCM decoding circuit for decoding, a bit allocation determining circuit for monitoring a step size of the adaptive differential PCM decoding circuit to determine a second bit allocation, and a sampling rate of each decoded divided signal A band-division coding / decoding device is obtained which is composed of a filter bank that raises and eliminates unnecessary spectrum and an adder that synthesizes the outputs of the filter banks.

(Operation) Bit allocation determining circuit for deciding bit allocation of each plural (M) channel by monitoring the spp size of the adaptive differential PCM coding circuit of each plural (M) channel and adaptive differential PCM decoding circuit of each plural (M) channel By providing the above, it is possible to perform coding / decoding according to the signal with high efficiency without the need to communicate the bit allocation information and improve the signal-to-noise ratio.

Embodiments The present invention will be described with reference to the drawings. FIG. 1 is a diagram showing an embodiment of the present invention. In FIG. 1, 1
Is an input terminal, 21 is a high-pass filter, 22 is a low-pass filter, 23 and 24 are sampling switches, 25 and 26 are ADPCM coding circuits to which the number of quantization bits is given from the outside, and 51 is a bit allocation determining circuit. , 27 is a code multiplexing circuit, 7
Is a transmission terminal.

In FIG. 1, 8 is a receiving terminal, 31 and 32 are resampling switches, 33 and 34 are ADPCM decoding circuits, and 61.
Is a bit allocation decision circuit, 35 and 36 are zero insertion switches,
37 is a high pass filter, 38 is a low pass filter, 39 is an adder, and 12 is an output terminal. The bit allocation determination circuit 51 compares the step size coefficient Δh _j of the high-frequency adaptive difference PCM and the step size coefficient Δl _j of the low-frequency adaptive difference PCM at a certain sampling time j, and The bit allocation of the quantized bit bh and the quantized bit b ₁ of the low band ADPCM encoder 26 is determined. An example of this bit allocation is shown in Table 2 for the case of coded 8 bits.

Each of the adaptive difference PCM encoding circuits 25 and 26 performs encoding according to the bit numbers b _h and b _l of the high band and low band ADPCM determined by the bit allocation determining circuit 51. In the encoder and the decoder, if the initial state is the same and the transmission line bit error does not occur, the high-frequency ADPCM encoder 25 uses the high-frequency ADPCM decoder 33, the low-frequency ADPCM encoder 26, and the low-frequency ADPCM encoder 26. Since the step size coefficient in the ADPCM decoder 34 has the same value, it is not necessary to send the bit allocation parameter from the encoder side to the decoder side, and the bit allocation determination circuit may be provided on the decoder side. In addition, as described in the prior art, A
Since the DPCM method is strong against transmission line bit errors and the influence of transmission errors disappears over time, unless the wrong bit arrangement is performed on the decoding side due to transmission line bit errors, the encoding side and the decoding side will change over time. The internal states of ADDCM match.

The signal flow will be described below with reference to FIG. The signal input from the terminal 1 is input to a high pass filter 21 and a low pass filter 22 each having a cutoff frequency of 1/4 of the sampling frequency. Since the output of the low-pass filter 22 does not include high-frequency components that are 1/4 or more of the sampling frequency, it is possible to reduce the sampling rate to 1/2 or more,
The resampling switch 24 reduces the sampling rate to 1/2 of the signal applied to terminal 1. Similarly, since the output of the high-pass filter 21 is zero in the low-pass half of the band, the output signal of the high-pass filter 21 which is biased to the high band is halved by the resampling switch 23.
By re-sampling, the folded spectrum signal has a spectrum in which the high-frequency side spectrum is folded back to the low-frequency side. For details of the principle of this resampling, refer to the above-mentioned first document. Resample switch 23
The outputs of 24 and 24 are input to the high-frequency ADPCM encoder 25 and the low-frequency 26 described in the conventional ADPCM encoding method, respectively. At this time, the bit allocation determining circuit 51 determines that the step size coefficient Δh _j of the high frequency band ADPCM encoder 25 and the step size coefficient Δl _{j of the} low frequency band ADPCM encoder 26.
, And as shown in Table 2, a high-frequency ADPCM encoder
25 quantized bits bh and low band ADPCM encoder 26
The quantized bit number be of is determined. ADPCM encoder 25
And 26 perform encoding according to the quantization bit numbers bh and be from the bit allocation determining circuit 51. The codes output from the ADPCM encoders 25 and 26 are transmitted from the terminal 7 as one code signal by the multiplexing circuit 27 and become the SBC coding side signal. The output of the time encoded signal b _h bits high range for ADPCM encoder 25, the other bits are used in the output of the low-pass ADPCM encoder 26. On the other hand, on the decoding side of the SBC, the code signal in which the high frequency side code and the low frequency side code received from the terminal 8 are multiplexed is sent from the bit allocation determination circuit 61 to the high frequency side ADPCM decoder 33. Quantization bit number bh and low frequency side ADPCM decoder 34
In accordance with the quantized bit be of the above, resampling switches 31 and 32 separate the high band side code and the low band side code, respectively, and a high band ADPCM decoder 33 and a low band ADPCM decoder 34.
Enter each in. At this time, the bit allocation decision circuit 61
Is the step size coefficient Δ of the high-frequency ADPCM decoder 33.
h _j and the step size coefficient Δl _j of the low-frequency ADPCM decoder 34 are compared, and as shown in Table 2, high-frequency ADPC
Quantization bit number bh of M decoder 33 and ADPC for low frequency band
The quantization bit number be of the M decoder 34 is determined. ADPC
M decoders 33 and 34 perform decoding according to the quantized bits bh and be from bit allocation determining circuit 61. AD
The sampling signals decoded by the PCM decoders 33 and 34 have a value of zero inserted between the sampling signals by the switches 35 and 36, respectively, so that the sampling rate is doubled. The details of the characteristics of the signal in which zeros are inserted between sampling points are described in detail in the above-mentioned first document, but from zero to 1/4 of the sampling frequency, the frequency before zeros are inserted between sampling points. Same spectrum but again 1/4 to 1 of the sampling frequency
Up to / 2, the inverse of the spectrum can be obtained. Therefore, in the case of the output signal to the switch 35, as described above, the ADPCM decoding of the signal obtained by spectrally inverting the high-frequency component of the signal applied from the terminal 1 by the resampling switch 23 on the encoder side to the low-frequency. Since the signal is zero-inserted between the sampling points, the output signal of the switch 35 has the terminal 1 at 1/4 to 1/2 of the sampling frequency.
It has almost the same spectrum as the high frequency component of the signal added to. Similarly, the output signal of the switch 36 is a resampling switch in which the low-frequency component of the signal applied from the terminal 1 is the encoder side.
Since the ADPCM decoded signal of the 1/2 sampling rate signal which has only the low frequency component due to 24 is zero-inserted between the sampling points, the output signal of the switch 36 is from the zero sampling frequency. By 1/4 of the above, it has almost the same spectrum as the low frequency component of the signal applied to terminal 1. Therefore, the output of the switch 35 is output by the high-pass filter 37, and the output of the switch 36 is output by the low-pass filter 38. Only the high-pass and low-pass components having substantially the same spectrum as the input signal to the terminal 1 are output. Are extracted, and the extraction results are added together by the adder 39. In this way, the decoded signal of the signal applied to the terminal 1 is obtained at the terminal 12.

(Advantages of the Invention) As described above, according to the present invention, the signal-to-noise ratio can be improved and the input signal can be efficiently coded as compared with the SBC method in which the bit allocation is not changed.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a diagram showing a conventional adaptive differential PCM coding method, and FIG. 3 is a diagram showing a conventional band division coding system. In FIG. 1, 1 ... Input terminal, 21 ... High-pass filter, 22 ... Low-pass filter, 23 and 24 ... Sampling switch, 25 and 26 ... Conventional adaptive differential PCM coding circuit, 51
... bit allocation determination circuit, 27 ... code multiplexing circuit, 7 ... transmission terminal, 8 ... reception terminal, 31 and 32 ... resampling switch,
33 and 34 ... Conventional adaptive differential PCM decoding circuit, 35 and 36 ... Zero insertion switch, 37 ... High-pass filter, 38 ... Low-pass filter, 61 ... Bit allocation determination circuit, 12 ... Output terminal.

Claims (1)

[Claims] 1. A filter bank for dividing a digital input signal obtained by sampling into frequency band signals of a plurality of (M) channels, and a sampling rate of each divided signal is 1 / M.
To monitor the step size of the adaptive differential PCM coding circuit and the adaptive differential PCM coding circuit that codes the divided signal by changing the number of quantization bits according to a first bit allocation described later. And a code multiplexing circuit that multiplexes and outputs the output codes of the adaptive difference PCM coding circuit, and a second bit that will be described later by receiving the output signal of the code multiplexing circuit. A switch that divides according to distribution, and an adaptive difference PCM that decodes each divided signal by changing the number of quantization bits according to a second bit distribution described below using each divided code
A decoding circuit, a bit allocation determination circuit that monitors the step size of the adaptive differential PCM decoding circuit to determine the second bit allocation, and a sampling speed of each decoded divided signal to increase the unnecessary spectrum. A band-division coding / decoding device comprising a filter bank to be erased and an adder for synthesizing outputs of the filter bank.