JPH0761087A - Efficient utilization method for frame memory - Google Patents

Abstract

PURPOSE:To utilize a frame memory efficiently by providing a frame memory in compliance with one drawing unit for paper size and drawing in a unit other than a frame address unit in a plotter with a printing section of raster system using a roll paper. CONSTITUTION:A setting means 10a for setting start addresses and end addresses of a rectangular DMA is provided, and start addresses in the horizontal and vertical directions of the rectangular DMA are stored respectively in storage means 10b1 and 10b2, and end addresses in the horizontal and vertical directions are stored respectively in storage means 10c1 and 10c2. Also a setting means 10d for setting start and end addresses in the vertical direction of a frame memory 9 is provided, and start and end addresses in the vertical direction of the frame memory 9 are stored in storage means 10e1 and 10e2. Comparison is carried out by a comparison means 10f for comparing the sizes of start and end addresses in the vertical direction, and respective vertical addresses and horizontal addresses for the (start < end) and (start > end) are controlled by respective control means 10g and 10h to carry out the drawing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a large size (paper size AO,
Alternatively, the present invention relates to a plotter having a raster type printing unit of A1), and particularly to a frame memory, data in the frame memory is continuously transferred to the plotter even when the start address on the frame memory is larger than the end address. The present invention relates to an efficient method of using a frame memory to improve the processing speed.

[0002]

2. Description of the Related Art Conventionally, in a plotter having a raster type printing unit using roll paper, when plural sheets of output print data cannot be stored in the frame memory, there is a remaining memory in the frame memory for the plotter. Regardless of this, there is a method in which data for only the printable paper size is output to the plotter, then all the memories are cleared, and then the next plotting data is written in the frame memory.

That is, FIG. 7 is a diagram showing an example of conventional paper size data, and FIG. 7 (a) is a layout diagram of each paper size showing an example of an AO size frame memory.
FIG. 7B is an explanatory diagram of paper sizes that cannot be processed in FIG. In FIG. 7, AO size 1 shown in FIG.
When processing the data of, output up to 2 sheets of A4 size, 1 sheet of A3 size, 2 sheets of A2 size to the plotter,
Alternatively, while outputting, after clearing the frame memory (not shown), the next data (A1 size) 1b shown in FIG. 7B is processed with the remaining memory (A2 size) 1a left. .

[0004]

However, in such data processing, not all frame memories are used, and it cannot be said that the method is an efficient use. The present invention solves the above-mentioned problems and provides an efficient use method of a frame memory, in which the entire area of the frame memory is used and data from the frame memory can be freely output to a plotter in rectangular units without intervention of a CPU. It is in.

[0005]

[Means for Solving the Problems] That is, in order to achieve the object, a plotter having a raster printing unit using roll paper is provided with a frame memory corresponding to a drawing unit for one paper size. A) setting means for setting the start address and end address of the rectangular DMA; b) horizontal and vertical starting point storage means for storing the horizontal and vertical start point addresses of the rectangular DMA; and c) the horizontal direction of the rectangular DMA. Horizontal and vertical end point storage means for storing each end point address in the vertical and vertical directions, d) setting means for setting the vertical start point and end point address of the frame memory, and e) vertical start point of the frame memory, Vertical start point end point storage means of the frame memory for storing the end point address, and f) Vertical direction start point for comparing the magnitude of the vertical direction start point end point address Point comparison means, g) vertical direction address control means for controlling each vertical address in the above vertical direction, start point <end point, start point> end point, and h) horizontal direction address control means for processing horizontal address It is possible to output a figure other than the frame address unit consisting of.

[0006]

The operation is that the image data created on the frame memory is given by the CPU in byte units in the x direction and in bit units in the y direction, and the rectangular top end values (x ₁ , y ₁ ),
Of course, when the y value of the end value (x ₂ , y ₂ ) is y ₂ > y ₁ , the rectangular control unit can control the given end value and end value even when y ₁ > y ₂ . CP required image data
It is possible to transfer to the video processor to the plotter via the output data bus without the intervention of U. An embodiment of the present invention will be described below with reference to the drawings.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a D having such a rectangular controller according to the present invention.
FIG. 2 is an overall configuration diagram for explaining the MA method, FIG. 2 is a block diagram showing an embodiment of a main part thereof, and FIG. 3 is a circuit diagram.
In FIG. 1, reference numeral 2 is a host computer interface unit, 3 is a CPU, 4 is a ROM, 5 is a RAM, 6 is a FONTROM containing characters and figures for drawing, and 7 is an image for vector-to-rasterization which is essential to a plotter. Data generator,
8 is a bus control unit, 9 is a frame memory, 10 is a rectangular DMA
The controller 11, 11 is a video controller, 12 is a plotter, and the image data created by the CPU 3, RAM 5, FONTROM 6 and image data generator 7 is the data received from the host computer interface unit 2, and the bus controller 8 Image data for drawing out is input to the frame memory 9 via.

Thereafter, the conditions for outputting to the plotter 12 are set in the rectangular DMA control unit 10, the rectangular DMA control unit 10 starts operating in accordance with the video request signal from the video control unit 11, and C
Image data required for the plotter is transferred via the bus control unit 8 which switches the PU bus to the output data bus.

Next, the structure of the DMA control system of the present invention will be described with reference to FIG. In FIG. 2, a plotter having a raster printing unit using roll paper is provided with a frame memory corresponding to a drawing unit for one paper size, and setting means 10a for setting a start address and an end address of a rectangular DMA. , A starting point storage means 10 for storing the starting point addresses in the horizontal and vertical directions of the rectangle DMA.
b ₁ and vertical start point storage means 10b ₂ , horizontal and end point storage means 10C ₁ and vertical end point storage means 10C ₂ for storing horizontal and vertical end point addresses of the rectangular DMA, and vertical start point of the frame memory, a setting unit 10d for setting a destination address, the vertical direction of the start point of the frame memory 9, the vertical starting and ending points storage unit 10e ₁ and the vertical end point storage means 10e ₂ of the frame memory 9 for storing an address of the end point, the vertical direction,
A vertical direction start point / end point comparison means 10f for comparing the magnitude of the start point / end point address and a vertical direction address control means 10g for controlling each vertical address in the vertical direction (start point <end point) and (start point> end point). And a horizontal address control means 10h for processing a horizontal address,
This is a DMA control method that enables output even in units other than frame address units.

Hereinafter, a method of directly outputting the image created in the frame memory 9 to the plotter 12 by DMA regardless of the magnitude of the values in the y direction of the leading end value and the trailing end value of an arbitrary rectangle, which is the gist of the present invention, will be described. This will be described in detail with reference to the circuit diagram (FIG. 3), the data in the frame memory 9 (FIG. 4), the flowchart (FIG. 5) and the paper size data (FIG. 6). FIG. 4A shows the frame memory 9 when the leading edge value y ₁ <the trailing edge value y ₂ .
The image data in the shaded area α is output to the plotter 12 as it is. FIG. 4B shows the frame memory 9 in which the leading end value y ₁ > the trailing end value y ₂ and the image data of the shaded portions β ₁ and β ₂ are shown in FIG.
It is output as shown in (c).

Next, the processing of these image data will be described with reference to FIG.
It will be described with reference to FIG. (1) In the case of FIG. 4A (the leading edge value y ₁ <the trailing edge value y ₂ ), the CPU 3 sets the leading edge value x ₁ (the value of x is a byte value for simplification of description) to x ₁ The value of y ₁ (given in bits) is set in the register 61 in the y ₁ register 66. (02
0) It is not necessary to set the start address value ys and the end address value ye because y ₁ <y ₂ here. (010) Similarly, the trailing end value x ₂ is set in the x ₂ register 62, and the y ₂ value is set in the y ₂ register 73. (030) Also in this case, it is not necessary to set the start address ys and the end address ye in the y direction on the frame memory.
(010)

[0012] Then the CPU3 than G _O F / F signal 77 is a starting signal of the control unit (040) comes, the y ₁ <y ₂ comparator 69, a comparison of y ₁ and y ₂ are performed, y ₂ ＞ y ₁
If y ₂ > y ₁ Enable F / F 70 is set, the Y counter y ₂ register comparator 72 is enabled at the same time.
Then, the x counter 63 and the Y counter 68 enter x ₁ and y ₁
The value of is loaded. Further, the _GO F / F signal 77 is set, and the x counter 63 and the Y counter 68 are enabled. (050)

Next, the video control unit 11 generates Xclk in 1-byte units, and the X counter 63 counts up (060), and the X counter x ₂ register comparator 64 causes X = x ₂ (070 ), The Y counter 68 is incremented by 1 (080), and at the same time, the value of x ₁ is set to X again.
Load to counter 63. After that, repeat this operation, Y
The counter y ₂ register comparator 72 has Y = y ₂ (090), and the X counter x ₂ register comparator 64 has X = x ₂ (100).
The above operation is performed until

Along with this, a horizontal memory address is given from the X counter 64 to the frame memory 9 and a vertical memory address is given from the Y counter 68, and a memory read signal is given to the memory control unit 76 via the AND gate 79. If the frame memory 9 is cleared to zero after reading the memory, a memory write signal is generated after the memory read,
Just write zero to memory. This X counter x ₂ register comparator 64 and Y counter y ₂ register comparator 72
The case where the memory Enable signal through the AND gate 79 is effective corresponds to the signal output from the shaded area α shown in FIG. 4A.

(2) In the case of FIG. 4B (leading edge value y ₁ > trailing edge value y ₂ ) As described in section (1), (x ₁ , y ₁ ), (x ₂ ,
y ₂ ), in which case it is necessary to give the start address ys and end address ye of the effective area in the y direction. (010) from CPU 3, given the G _O F / F signals 77 required for this circuit, x ₁ to X counter 63 via the register 61 of the x ₁ value, as described above, y ₁ register Y counter 68 The value of y ₁ is loaded via 66. Further, a signal NO is output from the y ₁ <y ₂ comparator 69 (050), and y ₁ > y ₂
Enable 71 is set, Y counter y _e register comparator 75 becomes the Enable state, X counter 63, Y counter 68 by G _O F / F77 is Enable status.

Next, the video control unit 11 sends X in units of 1 byte.
clk is generated, which causes the X counter 63 to count up (120), and X counter x ₂ register comparator
When 64 becomes X = x ₂ (130), the Y counter 68 is incremented by 1 (140), the above-described processing is performed, and the y _e register 74 and the Y counter y _e register comparator 75 are executed.
However, when Y = y _e (150) and the X counter x ₂ register comparator 64 becomes X = x ₂ , the ys selection F / F 78 outputs the y ₁ register and the ys register selection circuit 67 via the AND gate 80. through the values of ys register 65 loads the value of Y counter 63 (160), the Y counter y ₂ register comparator 72
Is Enable. This value is Y = y ₂ and X in the above case.
The memory enable signal is validated until = x ₂ .
(170, 180) The output effect of the block when the above processing is performed corresponds to the hatched lines β ₂ and β ₁ shown in FIG. 4C.

The DMA control method will be described with reference to FIGS. 6A, 6B, 6C and 6D.
When processing image data similar to
Each paper size 31 shown in Figure (b) written in memory
Clearing the frame memory while outputting 32 and 33,
The end address y _e of the data in the shaded portion β ₂ shown in (b)
Is set as the data 37 shown in FIG. 6C, and the cleared data 37 is stored under the data 36 in the remaining memory as shown in FIG. 6D.

That is, while writing 1/2 data of the next A1 data to the remaining memory 36 (for A2 size) and outputting the data 31, 32, 33 to the plotter 12,
Further, the memory of the data 31, 32, 33 is cleared, and then the remaining 1/2 of the A1 data is written in the memory of the data 37 (data 31, 32, 33) while outputting the memory of the data 34, 35. After that, the data 36 and 37 are output to the plotter 12. By performing such processing, the frame memory can be fully used effectively, and even if the leading end value> the ending value is output to the plotter 12 on the memory, the processing can be performed by the synergistic effect of the two processing. The speed can be improved.

[0019]

As described above, according to the present invention, in a large-sized (paper size AO or A1) laser or LED type plotter, the frame memory can be handled very efficiently and without the intervention of a CPU. The data from the frame memory can be freely output to the plotter in rectangular units, and since there is no CPU intervention, the total throughput can be improved and the load on the CPU can be reduced.

[Brief description of drawings]

FIG. 1 is an overall configuration diagram for explaining a DMA system having a rectangular control unit according to the present invention.

FIG. 2 is a block diagram showing an example of a main part.

FIG. 3 is a circuit diagram.

FIG. 4 is a conceptual diagram showing an example of a frame memory.

FIG. 5 is a flowchart.

FIG. 6 is a conceptual diagram showing frame memories of various paper sizes.

FIG. 7 is a conceptual diagram showing an example of a conventional frame memory of various paper sizes.

[Explanation of symbols]

 9 frame memory 10 rectangular DMA control unit 10a setting means 10b horizontal and vertical start point storage means 10c horizontal and vertical end point storage means 10d setting means 10e vertical start point storage means 10f vertical end point storage means 10g control means 10h horizontal direction avales control means 12 plotter

Claims (1)

[Claims] 1. A plotter having a raster-type printing unit using roll paper, provided with a frame memory corresponding to a drawing unit for one paper size, and a) setting for setting a start address and an end address of a rectangular DMA. And b) horizontal and vertical starting point storage means for storing horizontal and vertical starting point addresses of the rectangular DMA, and c) horizontal and vertical end point storage for storing horizontal and vertical ending point addresses of the rectangular DMA. And d) setting means for setting vertical start and end addresses of the frame memory, and e) vertical start and end point storage means of the frame memory for storing the vertical start and end addresses of the frame memory, f) Vertical direction start point / end point comparison means for comparing the magnitude of the vertical direction start point / end point address, and g) Vertical direction, start point <end point, start point> described above. A vertical address control means for controlling each vertical address in the case of a point, and a horizontal address control means for processing a horizontal address, and a frame address unit other than To efficiently use the created frame memory.