JPH0789143A - Graphic printer - Google Patents

Abstract

PURPOSE:To provide a graphic printer for performing zero clearing to a graphic image data in which data is only in the vicinity of left end of a rectangular area leaving unnecessary blank data (0 bit) for the rest of the area without the access to the unnecessary area by a CPU and speeding up the printing. CONSTITUTION:Address is generated by an address generating circuit 110 for words including raster data right before the completion of a line, and the word is inputted from a DRAM, and after the bit of final effective data is zero cleared by a bit processing circuit 106, the word is written into the DRAM again. For the next word to the last word on the line, address is generated while increment is carried out for the address of word by an address generating circuit 110, and zero data is written into the DRAM by a zero word output circuit 108.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a graphic printing apparatus, for example, a graphic printing apparatus using a page printer such as a laser beam printer.

[0002]

2. Description of the Related Art Conventionally, in this type of graphic printing apparatus, print data is handled in page units, and data transferred from a host such as a computer in a page description language format is a printer controller in the apparatus. Is interpreted by and is expanded into page data to be printed.

On the other hand, as a method of printing graphic data, there is a method of printing a dot image as it is as a part of page data. This is usually called a raster graphic, and is a method of handling a graphic area to be printed as a rectangular area (raster area) in which the horizontal direction has the number of dots in the main scanning direction and the vertical direction has the number of lines in the sub-scanning direction. According to this method, the printer controller allocates the memory corresponding to the rectangular area and stores the raster graphic data transferred from the host in the memory. After that, when all the page data is confirmed,
The printer controller transfers the bitstream to be printed to the printer engine and causes it to print.

[0004]

However, in the conventional graphic printing apparatus as described above, since the graphic image data is treated as a rectangular area, the data exists only near the left end of the rectangular area depending on the graphic. May have a line with only white background data (bit is 0). At that time, the memory for storing the graphic image data is allocated in the memory management process, but is not normally zero-cleared. Therefore, it is necessary to write the data of 0 even in the above-mentioned white background portion, and as a result, the entire rectangular area is accessed, which causes a disadvantage of increasing the processing time.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a graphic data printing apparatus capable of efficiently writing and processing graphic image data in a memory. .

[0006]

To achieve this object, the graphic printing apparatus of the present invention provides an area for storing graphic image data on a memory in the number of dots in the raster scan direction and in the raster scan direction. A graphic size setting means for setting the number of lines in the vertical direction, and a line for detecting that the last data other than 0 has been written in the bit in each line in the direction vertical to the raster scan direction. An end detection unit, and a zero clear unit for zero-clearing the zero-clear area of the graphic image data specified by the graphic size setting unit and the line end detection unit in word units or bit units are provided.

[0007]

In the graphic printing apparatus of the present invention having the above-mentioned structure, the graphic size setting means determines the area for storing graphic image data on the memory, the number of dots in the raster scan direction and the number of lines in the vertical direction. The line end detection means detects that the last data other than 0 has been written to the bit for each line, and the zero clear means zero-clears the zero-clear area of the graphic image data in word units or bit units.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the electrical configuration of a page printer as an embodiment of the present invention. This page printer is a command from the host system,
A printer controller 30 that forms a bit image for printing based on the data, and a printer controller 3
The functions are roughly classified into a print engine 40 that actually prints a bit image transferred from 0.

In FIG. 1, the printer controller 30
The CPU 10 executes the instructions stored in the ROM 12, fetches commands and data from the host system via the host interface 16, and stores the data structure required for various processes in the SRAM 14. DRAM 18
Acts as a page memory for storing the bit image to be printed, and the DMAC 20 controls the DMA transfer from the DRAM 18 to the engine interface 22.

Further, the zero clear circuit 24 executes zero clear of an unnecessary area other than a valid image in the raster area independently of the execution of the instruction of the CPU 10. The bit image sequence is transferred to the print engine 40 via the engine interface 22 and is actually printed by the print engine 40.

FIG. 2 shows the configuration of the zero clear circuit 24. The raster width setting register 102 is a register that sets and holds the number of dots in the raster scan direction. The raster line number setting register 104 is a register for setting and holding the number of lines in the vertical direction. The bit processing circuit 106 is a circuit for resetting a specific bit of word data fetched from the data bus to 0 and outputting it to the data bus again. The zero word output circuit 108 outputs the word 0
Is output to the data bus. The address generation circuit 110 generates an address of the memory referred to by the bit processing circuit 106 and the zero word output circuit 108. The bus control circuit 112 is a circuit that performs bus control during data transfer. The sequencer 114 controls the overall processing flow of the zero clear circuit 24.

Next, regarding the operation of the zero clear circuit 24,
A flowchart shown in FIG. 3, an example of the portrait shown in FIG. 4 (the paper feed direction and the raster scan direction are vertical),
An example of the landscape shown in FIG. 5 (the paper feed direction and the raster scan direction are parallel) will be described. Incidentally, FIG.
(A) shows prior to the transfer of raster graphic data,
9 shows a flow for initializing the zero clear circuit.

First, the CPU 10 issues a command indicating initialization to the zero clear circuit 24, and the sequencer 114 inside the zero clear circuit 24 interprets this command and enters the initialization sequence (S102). Next, the CPU 10 transfers the data of the number of bits of the raster width to the zero clear circuit 24, and the raster width setting register 102
(S104). Next, the CPU 10 transfers the data of the raster line number to the zero clear circuit 24 and stores it in the raster line number setting register 104 (S10).
6). This completes the initialization of the zero clear circuit 24, and the sequencer 114 waits for a zero clear start command.

FIG. 4A focuses on the raster area in the case of portrait and a certain line in it. Raster data is transferred from the host system and valid image data is constructed from the left end of the line. Figure 3
(B) shows a flow for processing raster data. C
The PU 10 analyzes the command transferred from the host system (S202), and when the line is not finished, the CPU 10
DR the raster data transferred from the host system
It is stored in the AM 18 (S204). If it is the end of the line, a command to start zero clear is issued to the zero clear circuit 24, and the process ends (S206). Until the CPU 10 knows the end of the processing of the zero clear circuit 24 by the interrupt, it executes other processing regardless of the zero clear processing.

FIG. 4B shows the arrangement of raster data on the page memory in the case of portrait. For the word including the raster data immediately before the end of the line, the address generation circuit 110 generates the address, and the DRAM 1
The word is fetched from 8 and the bit processing circuit 106 clears the bits after the last valid data to zero,
The word is written in the DRAM 18 again. The address generation circuit 110 generates the next word to the last word of the line while incrementing the address of the word, and the zero word output circuit 108 writes zero data to the DRAM 18.

In the case of landscape, FIG. 5 (b)
As shown in, the data in the raster scan direction and the data in the page memory do not continuously correspond. In this case, for the bits after the last valid data bit, 1
For each bit, the address generation circuit 110 generates an address of a word including the relevant bit calculated from the raster width setting register 102 and the raster line number setting register 104, fetches the word from the DRAM 18, and the bit processing circuit 106 The bit is left as it is and only the relevant bit is set to 0, and the word is written again in the DRAM 18. By the above, 1 by the zero clear circuit 24
When the zero-clear processing for the line is completed, the CPU 10 is notified by an interrupt.

FIG. 3C shows a flow at the time of interruption. The CPU 10 starts the interrupt processing by the zero clear circuit end interrupt. The CPU 10 reads the status information from the zero clear circuit 24 (S30
2) If normal, the process ends as it is (S304), and if abnormal, the cause is investigated, and if necessary, a process for re-execution is performed (S306). This completes the operation of the zero clear circuit for each line.

[0018]

As is clear from the above description, according to the graphic printing apparatus of the present invention, data exists only in the vicinity of the left end of the rectangular area, and in other cases, unnecessary white background data (bit is 0). Even with respect to the graphic image data such as the above, the processing can be speeded up by clearing the unnecessary area to zero without accessing the area by the CPU.

[Brief description of drawings]

FIG. 1 is a block diagram showing an electrical configuration of a page printer of this embodiment.

FIG. 2 is a block diagram of a zero clear circuit in this embodiment.

FIG. 3 is a flowchart showing a control operation of a zero clear circuit in this embodiment.

FIG. 4 is a diagram for explaining the operation in the case of a portrait in this embodiment.

FIG. 5 is a diagram for explaining the operation in the case of a landscape in the present embodiment.

[Explanation of symbols]

 10 CPU 12 ROM 14 SRAM 102 Raster width setting register 104 Raster line number setting register 106 Bit processing circuit 108 Zero word output circuit 110 Address generation circuit 112 Bus control circuit 114 Sequencer

Claims (1)

[Claims] 1. A graphic size setting means for setting an area for storing graphic image data on a memory by the number of dots in the raster scan direction and the number of lines in a direction perpendicular to the raster scan direction, For each line in the direction perpendicular to the raster scan direction, the line end detection means for detecting that the last data other than 0 has been written to the bit, the graphic size setting means, and the line end detection means are specified. And a zero clear unit for zero clearing the zero clear area of the graphic image data in word units or bit units.