JPH06238950A - Controller of page printer - Google Patents

Abstract

PURPOSE:To improve printing operation speed by a method wherein image data of a margin section of a page is compressed so that in the case where the printing data contains a lot of margin sections, two pages of image data can be stored in a memory. CONSTITUTION:A CPU 1 generates image data from which a margin section is removed in a RAM 5 and sets the information of the margin section to a margin data control circuit 8. During the outputting of the margin section of the page, video data outputted from a video output circuit 6 is applied with a masking operation by means of the margin data control circuit 8, and then the margin data is outputted. Thereby, when a total quantity of image data of continuous pages is smaller than a quantity of an image memory, a concurrent operation of a printing operation and an image-forming operation can be executed so that the printing operation speed is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a page printer controller, and more particularly, to a page printer controller having a function of compressing image data on an image memory generated in page units.

[0002]

2. Description of the Related Art FIG. 7 is a block diagram showing an example of a conventional page printer controller. Referring to FIG. 7, the page printer controller controls the entire page printer controller to generate image data.
U71 and ROM7 for storing the program of CPU71
2, a font memory 73 for storing character pattern information in bitmap data or vector data, a host I / F port 74 for inputting / outputting data to / from the host computer, a work area of the CPU 71, and data input / output to / from the host computer. Used as an image memory for generating image data
A DMA circuit 77 for DMA-transferring the image data from the AM 75 and the image memory on the RAM 75 to the video output circuit 76.
And a video output circuit 76 for converting the image data transferred by the DMA circuit 77 into a parallel signal and outputting the video signal in accordance with a video signal request from the printer engine, and a printer for issuing a print command to the printer engine and reading the status. It is composed of an I / F port 78. Next, the configuration of the image memory will be described. The size of the image memory for one page is determined from the print resolution and the print effective area of the print paper. For example, in a page printer with a printing resolution of 300 dots per inch, about 2.0 Mbytes for A3 paper and about 1.5 Mbytes for B4 paper,
A4 paper requires a capacity of about 1.0 MB. Now, the image memory capacity that can be secured on the RAM 75 is 2M.
If it is a bite, one page for A3 paper and one for B4 paper
It is possible to secure an image memory for two pages and two pages for A4 size paper.

[0003]

In this conventional page printer controller, since the image memory for one page is always prepared for all the print effective areas of the printing paper, the actual image data may be only a part of the page. The image memory is not effectively used for print data.
Also, a page printer controller using a compression method using a run length code for reducing the image memory is
The circuit for encoding and decoding becomes large,
In the case of a complicated image, the decoding process may not be in time for the video signal output, and as a result print data may be lost.

[0004]

A page printer controller according to the present invention comprises at least one blank line counter for counting the number of blank lines in a blank portion of a page in the sub-scanning direction, and an image portion continuous with the blank line. The same number of image line counters as the blank line counter for counting the number of image lines, at least one blank dot counter for counting the number of blank dots in a blank portion of the page in the main scanning direction, and an image portion continuous with the blank dots. The same number of image dot counters as the blank dot counters for counting the number of image dots, and a video signal mask circuit for performing a white mask process for stopping the video signal output at the blank lines and the blank dots.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. Referring to FIG. 1 which is a block diagram showing an embodiment of the present invention, a page printer controller of this embodiment has a CPU 1 for controlling the entire page printer controller and generating image data, and an RO for storing a program of the CPU 1.
M2, a font memory 3 for storing character pattern information in bitmap data or vector data, a host I / F port 4 for inputting / outputting data to / from a host computer, a work area of the CPU 1, and data input / output to / from the host computer. Used as an image memory for generating image data
5, a DMA circuit 7 for DMA-transferring image data from the image memory on the RAM 5 to the video output circuit 6, and parallel-serial conversion of the image data transferred by the DMA circuit 7 to generate a video signal in accordance with a video signal request from the printer engine. Video output circuit 6 for outputting and D of blank space data
A margin data control circuit 8 for prohibiting MA transfer and white masking the video signal output, and a printer I / F for issuing a print command to the printer engine and reading the status.
It consists of port 9 and.

Next, the operation of this embodiment will be described.
The operation of the page printer controller is roughly divided into four types: reception, editing, drawing and printing. In the receiving operation, the print data from the host computer is transferred to the host I / F port 4
It stores in the receiving buffer on RAM5 via. In the editing operation, the CPU 1 converts the received data into an internal code so that it can be easily processed inside the page printer controller. Specifically, the address information of the font memory 3 in which the corresponding character information is stored is created from the character code and the control code, and modification information such as enlargement / reduction and rotation is added. Then, the coordinates of the character on the drawing memory are calculated and added. When the creation of the edit data for one page is completed, the drawing operation is started. In the drawing operation, CPU1
The character information is read from the font memory 3 based on the edited data for the page, and the character pattern is generated at the coordinate position of the designated drawing memory while performing the necessary modification processing. When a one-page image is generated in the image memory in this way, the printing operation starts. In the printing operation, the CPU 1 causes the printer I /
A print command is given to the printer engine through the F port 9. In response to this, the printer engine issues a video signal output request. The video output circuit 6 outputs D from the image memory on the RAM 5 based on the video request from the printer engine.
Image data is read using the MA circuit, the read data is converted into parallel-serial data, and a video signal is output as serial data.

FIG. 2 is a conceptual diagram showing an effective image area on the printing paper of this embodiment. Referring to FIG. 2 in addition to FIG. 1, in the editing operation, the CPU 1 calculates the minimum value and the maximum value in the main scanning direction and the minimum value and the maximum value in the sub-scanning direction of the character coordinates on the image memory to obtain the effective image. Determine area 10. When editing, the CPU 1 uses the effective image area 10
Other than the blank area, that is, the upper blank line 11, the lower blank line 12, the left blank dot 13, and the right blank dot 1
4 is ignored, and editing is performed in the effective image area 10. This means that the coordinate origin position and the image memory size are different as compared with the conventional case where all the print effective areas 15 are targeted. In the drawing operation, CP
U1 secures only the image memory for the effective image area 10 and performs image generation processing.

FIG. 3 is a detailed block diagram of the margin data control circuit 8, FIG. 4 is a signal waveform diagram of the video output circuit 6, and FIG. 5 is a signal waveform diagram of the margin data control circuit 8.
The operation of this embodiment will be described in more detail with reference to FIGS. 3, 4 and 5 in addition to FIGS.
The CPU 1 sets the number of upper margin lines 11 to the margin line counter 20, the number of image lines 17 to the image line register 24, the number of left margin dots 13 to the margin dot register 25, and the number of image dots 18 to each other. The image dot registers 26 are respectively set. When the CPU 1 issues a print command to the printer engine, the printer engine outputs a vertical synchronizing signal (VS signal) and a horizontal synchronizing signal (HS signal) necessary for outputting a video signal. In the electrophotographic page printer, there is a print prohibition area 16 where toner fixing is not guaranteed for a few millimeters of paper. Therefore, the video output circuit 6 determines the BH based on the HS signal.
A signal is generated (FIG. 4 (a)). As for the BH signal, the HS signal is not output in the print prohibition area 16 and the print effective area 15 is not output.
Output only with. The BV signal is the same as the VS signal. The video output circuit 6 has a built-in oscillator according to the transfer rate of the video data (BD signal), as shown in FIG.
As shown in (b), output is not performed in the print prohibited area 16,
The BD signal output only in the print effective area 15 is generated. The BC signal is used as a clock for parallel / serial conversion of image data. The video output circuit 6 reads out the image data from the image memory on the RAM 5 in response to the input of the VS signal or the HS signal. Therefore, the video output circuit 6 outputs the DMA request signal BR, waits for the DMA response signal BA, and stores the data on the data bus internally. , And performs parallel-serial conversion according to the BC signal to output the BD signal.

In the blank space data control circuit 8, when the BV signal is input, as shown in FIG.
7 is set, the flip-flop 28 is reset, and the output of the NOR gate 34 becomes "L". Therefore,
The outputs of the AND gates 35 and 36 are "L"
And the output of the OR gate 31 becomes "H". Here, BR which is the DMA request signal from the video output circuit 6
The signal is output to the DMA circuit 7 as a DR signal via the AND gate 35, and the DA signal, which is a DMA response signal from the DMA circuit 7, is output to the video output circuit 6 as a BA signal via the OR gate 31. Also, the video output circuit 6
The BD signal which is the video data from the AND gate 36
Is output to the printer engine as a VD signal.
That is, when the BV signal is input, the video output circuit 6 outputs D
Although the DMA request to the MA circuit 7 is masked, the video output circuit 6 is always in the DMA response state. As a result, the DMA transfer data becomes undefined and the BD signal also becomes undefined data. However, since the BD signal is masked by the AND gate 36, white data (VD
= “L”). Margin line counter 20
Is counted down by the BH signal, and when the count value becomes 0, the borrow signal B0 is output. The flip-flop 27 is reset by the B0 signal, and the NOR gate 34
Output becomes "H". Therefore, the DA signal becomes the BA signal,
The BR signal becomes equal to the DR signal and the BD signal becomes equal to the VD signal. That is, when the counting of the number of upper margin lines 11 set in the margin line counter 20 is completed, the normal DMA operation between the RAM 5 and the video output circuit 6 is performed, and the video data is also the image data parallel-serial converted by the video output circuit 6. Is output. The output of the B0 signal releases the load state of the image line counter 21, and the value set in the image line register 24 is counted down each time the BH signal is input. When the count value of the image line counter 21 becomes 0, the borrow signal B1 is output and the flip-flop 2
8 is set. As a result, the output of the NOR gate 34 becomes "L" again, the outputs of the AND gates 35 and 36 become "L", and the output of the OR gate 31 becomes "H". That is, when the counting of the number of image lines set in the image line register 24 is completed, the DMA request of the video output circuit 6 is masked again until the next BV signal is input, and the video data is always output as white data. As described above, white data is always output as video data on the upper margin line 11 and the lower margin line 12, and image data on the image memory is output as video data on the image line 17.

When the video data output BH signal on the image line 17 is input as shown in FIG. 5B, the flip-flop 29 is set, the flip-flop 30 is reset, and the output of the NOR gate 34 becomes "L". Become. Therefore, the outputs of the AND gates 35 and 36 become "L", and the output of the OR gate 31 becomes "H". Therefore, DM from the video output circuit 6 to the DMA circuit 7
The A request is masked, and the video output circuit 6 is always in the DMA response state. Since the BD signal is also masked, white data (VD =
"L") is output. Further, the value set in the margin dot register 25 is loaded into the margin dot counter 22 by the input of the BH signal. The blank dot counter 22 is counted down by the BC signal, and when the count value becomes 0, the borrow signal B2 is output. The flip-flop 29 is reset by this B2 signal, and the output of the NOR gate 34 becomes "H". Therefore, the DA signal becomes the BA signal, the BR signal becomes the DR signal, and the BD signal becomes the VD signal. That is, the left margin dot 1 set in the margin dot register 25
When the counting of the three numbers is completed, the normal DMA operation between the RAM 5 and the video output circuit 6 is performed, and the video data also outputs the image data which is parallel-serial converted by the video output circuit 6. Further, the output state of the image dot counter 23 is released by the output of the B2 signal,
The value set to 6 is counted down each time the BC signal is input. When the count value of the image dot counter 23 becomes 0, the borrow signal B3 is output and the blip-flop 30 is set. As a result, the output of the NOR gate 34 becomes "L" again, and the AND gate 35 and the AND gate 36
Output becomes "L" and the output of the OR gate 31 becomes "H". That is, when the counting of the number of image dots set in the image dot register 26 is completed, the DMA request of the video output circuit 6 is masked again until the input of the next BH signal.
Video data is always output as white data. The point to be noted here is that the margin dot register 25
And the value set in the image dot register 26 is DMA
It must be a multiple of the data bus width at the time of transfer. For example, if the data bus width during DMA transfer is 8 bits, the left margin dot and the image dot are multiples of 8. Therefore, the size of the image memory in the main scanning direction at this time is also a multiple of 8 dots. As described above, white data is always output as video data in the left margin dot and right margin dot, and image data in the image memory is output as video data in the image dot.

By compressing the image memory for one page only in the effective image area 10 as described above, there may be a case where the image memory which can be secured for only one page can be secured for two or more pages. For example, in the case of a page printer having a printing resolution of 300 dots per inch, if the image memory of all the print effective areas 15 is prepared, about 2.0 Mbytes per A3 sheet, about 1.5 Mbytes per B4 sheet, A4 sheets per page. A paper capacity of about 1.0 MB is required. Now, assuming that the image memory capacity that can be secured in the RAM 5 is 2 Mbytes, one page of A3 paper, B
It is possible to secure only one page of image memory for four sheets and two pages of A4 sheet. However, if the image memory is formed only by the effective image area 10, depending on the print data, A
Even if 3 sheets or B4 sheets are printed, 2 consecutive sheets
If the total capacity of the effective image area 10 of a page is 2 Mbytes or less, an image memory of 2 pages or more can be secured. When only one page of image memory can be secured, as shown in FIG. 6A, the drawing operation of the page cannot be entered until the printing operation of the page is finished, and as a result, continuous printing is not performed. However, if the image memory for two pages can be secured, as shown in FIG. 6B, if the page editing operation and the page drawing operation are completed during the page drawing operation and the printing operation, the continuous printing is performed. Is possible.

[0012]

As described above, according to the present invention,
Count the number of margin lines in the margin of the page in the sub-scanning direction,
The number of image lines in the image part continuous with this margin line is counted, the number of blank dots in the blank part in the main scanning direction of the page is counted, the number of image dots in the image part continuous with this blank dot is counted, and the blank line Even if only one page of image memory can be secured in the print effective area by performing white mask processing on the video signal output in the blank dots and the blank dot, the total capacity of the effective image areas of two consecutive pages is the total capacity of the image memory. In the following cases, the printing operation of the current page and the drawing operation of the next page can proceed at the same time, which improves the printing processing speed.

[Brief description of drawings]

FIG. 1 is a functional block diagram of an embodiment of the present invention.

FIG. 2 is a conceptual diagram showing an effective image area on the printing paper of this embodiment.

FIG. 3 is a detailed block diagram of a margin data control circuit of this embodiment.

FIG. 4 is a signal waveform diagram of the video output circuit of this embodiment.

FIG. 5 is a signal waveform diagram of the blank space data control circuit of this embodiment.

FIG. 6 is a diagram showing an operation procedure of a page printer controller.

FIG. 7 is a functional block diagram of a conventional example.

[Explanation of symbols]

 1 CPU 2 ROM 3 Font memory 4 Host I / F port 5 RAM 6 Video output circuit 7 DMA circuit 8 Margin data control circuit 9 Printer I / F port 10 Effective image area 11 Upper margin line 12 Lower margin line 13 Left margin dot 14 Right margin dot 15 print valid area 16 print prohibited area 17 image line 18 image dot 19 paper 20 margin line counter 21 image line counter 22 margin dot counter 23 image dot counter 24 image line register 25 margin dot register 26 image dot register 27 flip-flop 28 flip-flops 29 flip-flops 30 flip-flops 31 OR gates 32 OR gates 33 OR gates 34 NOR gates 35 AND gates 36 AND gates 37 NOT Gate 38 NOT gate 39 NOT gate

Claims (3)

[Claims] 1. A number equal to at least one blank line counter that counts the number of blank lines in a blank portion of a page in the sub-scanning direction, and the blank line counter that counts the number of image lines in an image portion that is continuous with the blank line. And an image line counter, and a video signal mask circuit for performing a white mask process for stopping the output of the video signal at the blank line, the page printer controller. 2. The same number as at least one blank dot counter for counting the number of blank dots in a blank portion of the page in the main scanning direction and the blank dot counter for counting the number of image dots of an image portion continuous with the blank dots. And a video signal mask circuit that performs a white mask process for stopping the video signal output at the blank dots. 3. The same number as at least one blank line counter that counts the number of blank lines in a blank portion of the page in the sub-scanning direction, and the blank line counter that counts the number of image lines in an image portion that is continuous with the blank line. Image line counter, at least one blank dot counter that counts the number of blank dots in the blank portion of the page in the main scanning direction, and the blank dot counter that counts the number of image dots in the image portion that is continuous with the blank dots. A page printer controller comprising: the same number of image dot counters; and a video signal mask circuit that performs a white mask process for stopping a video signal output at the blank lines and the blank dots.