JPH0758526A - Integrated circuit - Google Patents

Abstract

PURPOSE:To improve the performance and the design feature of a high frequency broad band circuit. CONSTITUTION:A metallic layer of an uppermost face is used for ground conductor layer 3 in an inverted microstrip line structure, and a strip conductor 2 is arranged to the ground conductor 3 via an insulating film layer known as an inverted microstrip base layer 4 and an insulation film buffer layer 5 is provided between the ground conductor 3 and the lower wiring layer and components 6 such as transistors (TRs) and resistors are arranged to the lower layer. Then a lower wiring layer below the buffer layer 5 is used for wiring of a short distance such as an inter-component wiring in the inside of a cell as e.g. a small function unit in the circuit and a lower wiring layer below the inverted microstrip base layer 4 is used for interconnection of a long distance such as inter-cell wiring. On the other hand, an auxiliary ground conductor 3 is especially added under the buffer layer 5 in the tri-plate strip line structure.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit, and more particularly to an integrated circuit in which a wiring structure of a high frequency / broadband integrated circuit is devised.

[0002]

2. Description of the Related Art Conventionally, the electrical performance index of the majority of integrated circuit wiring structures has been designed by considering only the wiring capacitance. This electrical figure of merit depends on the operating frequency of the circuit. The reactance component of this wiring has an inductance component as well as a capacitance component, but in the frequency range from DC to several hundred MHz, the inductance component of the wiring in the integrated circuit chip is more than the wiring resistance and the load resistance of the circuit. Since the size is negligible, the circuit performance such as signal delay and crosstalk can be generally designed by the wiring capacitance and the load resistance.

An exception to this is a microwave monolithic integrated circuit with a small circuit scale that operates at a frequency of several to several tens GHz, and the circuit design has conventionally treated wiring as a transmission line. However, the speed of integrated devices such as transistors has increased, and it has become possible to integrate complex digital and analog circuits that operate in a wide range of frequency bands such as microwaves and millimeter waves. It has become apparent that the transmission line that has been used only for microwave monolithic integrated circuits is also used for these integrated circuits having a larger circuit scale.

Here, the difference between the transmission line and the conventional wiring is that the transmission line is designed taking into consideration not only the capacitance component of the wiring but also the inductance component and the characteristic impedance and the effective permittivity determined by the balance between the two. The necessity becomes remarkable when the electrical wavelength of the highest frequency component of the signal to be handled becomes shorter than ten times the wiring length.

Two types of transmission line structures conventionally used in microwave monolithic integrated circuits will be described below with reference to FIG.

FIG. 7A is a sectional view of a microstrip line structure in which the back surface of the integrated circuit board 1 is used as a ground conductor 3 and the strip conductor 2 is formed on the front surface of the integrated circuit board 1 with the ground conductor 3 interposed therebetween. The microstrip line structure itself has been widely used as a technology of a hybrid integrated circuit because it can be easily formed on a Teflon or alumina substrate, and a huge amount of design data has been accumulated so far. Therefore, the advantage of using this structure for a monolithic integrated circuit is that a precise design based on these design data is possible.

On the other hand, in this structure, since the line characteristics depend on the substrate thickness and it is difficult to make the integrated circuit substrate 1 thin, it is difficult to make the line fine and highly integrated, and the characteristic impedance from the moderate to the low side. Is difficult to make, the field distribution around the line spreads, and if the integration is forcibly promoted, the proximity effect of the adjacent wiring and the device is large and the designability is poor, and the back surface of the integrated circuit board 1 is grounded. Therefore, there is a defect that a via hole penetrating the integrated circuit board 1 is required and connection with a device is difficult.

In view of such drawbacks, recently, as shown in FIG.
Instead of the structure shown in FIG. 7A, the structure shown in FIG.

FIG. 7B is a sectional view of a coplanar line structure in which a ground conductor 3 is arranged in parallel with a strip conductor 2 on the surface of an integrated circuit substrate 1. The structural feature of the circuit adopting this line structure is that all of the device, the strip conductor 2, and the ground conductor 3 are arranged on the same plane.
The characteristic impedance of this coplanar line structure is different from that of the microstrip line structure, and can be designed only by the conductor pattern size ratio such as the width of the strip conductor 2 and the distance from the ground conductor 3 without depending on the substrate thickness. Therefore, miniaturization is possible within a range in which the conductor loss of the strip conductor 2 does not pose a problem.

[0012] Here, comparing the above-mentioned two typical sizes, the thickness of the integrated circuit board 1 is 200 to 60.
A line with a characteristic impedance of 50Ω is set to 0 μm and is shown in FIG.
When the microstrip line structure of (a) is designed, the width of the strip conductor 2 is required to be about the same as the thickness of the integrated circuit board 1, and is 200 μm or more. Incidentally, in order to reduce the thickness of the integrated circuit board 1 to 200 μm, the back surface polishing is required in the final manufacturing process.

On the other hand, when the strip conductor 2 is designed with the coplanar line structure of FIG.
0 μm, 25 including the gap to the ground conductor 3
In many cases, the width is designed to be about 75 μm. As described above, in the case of designing with the coplanar line structure of FIG. 7B, steps such as an air bridge are required to connect the divided ground conductors 3 on both sides, but FIG.
Compared with the microstrip line structure of (a), line miniaturization, chip area reduction, and accompanying improvement in circuit performance can be achieved.

[0012]

As described above, recently, it has become necessary to introduce the transmission line structure into digital and analog integrated circuits having a large circuit scale. The conventional microwave monolithic integrated circuit has a circuit scale of about 5 to 10 transistors, whereas the digital / analog integrated circuit considered here has a scale of 50 to 100 elements or more. Is common. Therefore, a circuit of such a scale is first shown in FIG.
It is impossible to apply the conventional microstrip line structure shown in FIG. 1 to design with a reasonable chip area because of the drawbacks already described.

In consideration of this, the design using the coplanar line structure shown in FIG. 7B has been attempted.
In that case, the following problems occur.

That is, since the coplanar line structure shown in FIG. 7 (b) is originally brought on the same plane as the strip conductor 2 in order to arrange the ground conductor 3 in the vicinity of the strip conductor 2, the device The ground conductor 3 occupies most of the surface on which the strip conductor 2 and the ground conductor 3 are arranged. It is desired that the ground conductor 3 on this circuit be integrated in order to reduce the ground impedance and operate the circuit stably. Therefore, on the integrated circuit, the ground conductor 3 is designed to have a large area to avoid a thin pattern as much as possible. Such a design was possible in a circuit with a scale of about 5 to 10 transistors, but when the scale of the circuit increases, the ground conductor 3 is inevitably subdivided by the element region, which increases the ground impedance of the circuit and the operation of the circuit. It causes instability and deteriorates designability.

The present invention has been made in view of the above problems, and an object of the present invention is to realize a high-frequency, wide-band circuit by realizing a transmission line structure that can be highly integrated and can easily reduce the ground impedance of the circuit. It is an object of the present invention to provide an integrated circuit that can contribute to the improvement of the performance and the designability.

[0016]

In order to achieve the above object, in the integrated circuit according to the first aspect of the present invention, in the monolithic integrated circuit, at least a part of the circuit surface other than the power supply and the signal lead-out part is AC. It is characterized by being covered with a metal that serves as a ground.

The integrated circuit according to the second aspect is a monolithic integrated circuit in which circuit wiring is handled as a transmission line, wherein the transmission line is composed of at least a strip conductor and a ground conductor, and the strip conductor is compared to the ground conductor. And is formed in the vicinity of the integrated circuit substrate side. Hereinafter, this transmission line is referred to as an inverted microstrip line.

Further, the integrated circuit according to the third aspect is a monolithic integrated circuit in which circuit wiring is treated as a transmission line, wherein the transmission line is at least a strip conductor.
And two strip conductors, and the strip conductor is formed so as to be sandwiched by the two ground conductors in a direction perpendicular to the integrated circuit board. Hereinafter, this transmission line will be referred to as a triple strip line according to the terms used in the hybrid circuit.

The integrated circuit according to the fourth aspect is the first circuit.
The integrated circuit according to the third aspect is further characterized in that the circuit surface further has terminals for bump connection.

[0020]

That is, in the integrated circuit according to the first aspect of the present invention, at least a part of the circuit surface other than the power supply and signal extraction portions is covered with the metal serving as an AC ground, and the second aspect In the integrated circuit, the transmission line is composed of at least a strip conductor and a ground conductor, and the strip conductor is formed closer to the integrated circuit board side than the ground conductor. In the integrated circuit according to the third aspect, the transmission line includes at least a strip conductor and two ground conductors, and the strip conductor is sandwiched by the two ground conductors in a direction perpendicular to the integrated circuit board. In the integrated circuit according to the fourth aspect, bump connection terminals are further provided on the circuit surface.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, an outline of the present invention will be described before describing the embodiments of the present invention.

In the integrated circuit of the present invention, a transmission line is formed by using a multi-layered metal layer for wiring. The upper metal layer is used as the ground conductor 3, while the metal layer in the lower layer is used. The strip conductor 2 or the signal line is formed.

As described above, in the transition from the microstrip line structure shown in FIG. 7A to the coplanar line structure shown in FIG. 7B, the ground conductor 3 is stripped in order to miniaturize the line structure. It was devised so as to be arranged in the vicinity of the conductor 2, and its means was to arrange the ground conductor 3 on the same plane as the strip conductor 2 and the element. The ground conductor 3 was subdivided when the circuit scale became large as this adverse effect. On the other hand, in the structure of the integrated circuit of the present invention, the ground conductor 3 is arranged in the vicinity of the strip conductor 2 and the ground conductor 3 is arranged above the element layer in order to solve the above-mentioned adverse effect. It is a division of certain roles.

As a result, in the conventional integrated circuit, the ground conductor 3 is arranged on the back surface of the integrated circuit substrate 1 or on the same surface as the element 6 such as a transistor or a resistor and the strip conductor 2, whereas the ground conductor 3 of the present invention is arranged. In the integrated circuit, there is a large structural difference that the ground conductor 3 is arranged in a layer above the element 6 such as a transistor or a resistor and the strip conductor 2. Here, FIG. 1A is a diagram showing an example of the inverted microstrip line structure according to the second aspect. In this structure,
The uppermost metal layer is used as the ground conductor 3, and the strip conductor 2 is arranged below the ground conductor 3 with an insulating film layer called an inverted microstrip substrate layer 4 interposed therebetween. The transmission line is formed by vertically inverting the strip line. Further, in the figure, a buffer layer 5 of an insulating film is provided between the lower wiring layer and the lower wiring layer, and elements 6 such as transistors and resistors are arranged further below these layers. However, the wiring layers below the buffer layer 5 and the elements 6 such as transistors and resistors are omitted in the figure.

The inverted microstrip substrate layer 4 and the buffer layer 5 have a suitable film thickness of about 5 to 10 μm, as will be described later in connection with the design of the line constant, and silicon oxide or polyimide is considered as the material. To be Originally, considering that the necessity of designing the wiring as a transmission line is due to the size relationship between the operating frequency (wavelength) of the circuit and the circuit size (physical length), wiring with a short distance is not as a conventional transmission line. Instead, it is a good idea to design it as simple wiring. Further, in this example, the lower wiring layer below the buffer layer 5 is used for wiring for a short distance such as inter-element connection in a cell as a small functional unit in a circuit, and the lower wiring layer below the inverted microstrip substrate layer 4 is used. It can be used properly, for example, by connecting a long distance such as wiring between cells.

On the other hand, FIG. 1B is a diagram showing an example of the triplate strip line structure according to the third aspect. What is different from the conventional structure shown in FIG. 7A is that an auxiliary ground conductor 3 is added under the buffer layer 5, and as will be described later, this significantly reduces the gap between adjacent lines. Crosstalk can be reduced. Incidentally, FIG.
Similar to the structure of (a), a lower wiring layer and an element 6 such as a transistor or a resistor can be further arranged under the auxiliary ground conductor 3, but they are omitted in the figure.

The first embodiment of the present invention will be described in detail below with reference to FIG.

FIG. 2A is a pattern diagram of an analog amplifier circuit which is laid out by using the inverted microstrip line structure according to the second aspect. In this layout, the uppermost metal is the ground conductor 3, and the uppermost ground conductor layer, the strip conductor layer, the lower wiring layer, and the element layer of the multi-layer metal layer are shown with a slight shift for easy understanding of the role of each layer. ing.

FIG. 2B is a conventional pattern diagram in which the same circuit is laid out by adopting a coplanar line structure for comparison of effects. In this layout, the ground conductor 3 is subdivided by the strip conductor 2 of the transmission line and the elements 6 such as transistors and resistors. Since the ground conductors 3 are connected by thin wires such as air ridges, it is difficult to reduce the ground impedance of the circuit, which causes unstable operation. In contrast to the layout shown in FIG. 2B, in the layout shown in FIG. 2A, the ground conductor 3 of the uppermost layer covers the entire surface, and all the grounds of the circuit can be directly connected to this one ground conductor 3. It is structured. Therefore, as shown in FIG. 2C, the parasitic ground impedance generated in the conventional layout can be eliminated, and the circuit operation as designed can be expected.

Next, the second embodiment of the present invention will be described in detail with reference to FIG.

FIG. 3A is a pattern diagram of a digital circuit cell which is laid out by using the inverted microstrip line structure according to the second aspect. Actually, the entire surface is covered with the uppermost ground conductor, but the illustration thereof is omitted in the drawing for the sake of clarity.

FIG. 3B is a conventional pattern diagram in which the same function is laid out by adopting a coplanar line structure. In this embodiment, in addition to the ground impedance reducing effect shown in the first embodiment, the effect of improving the degree of integration of the transmission line structure appears.

The circuit layouts of FIGS. 3A and 3B are shown at the same magnification, but as is obvious from the size, integration of about 1/4 in area is obtained, The main reason for this is that the ground conductor 3 in the conventional layout is entirely moved to the uppermost layer and is no longer necessary. And the improvement of the degree of integration of this circuit layout is not only the shape effect that the integrated circuit chip can be made smaller, but also the improvement of the circuit performance and the production yield by reducing the unnecessary wiring of the lines and shortening the connection distance. The present invention has various ripple effects such as cost reduction due to the increase in the number of chips that can be obtained from one wafer.

Next, a third embodiment of the present invention will be described in detail with reference to FIG.

FIGS. 4A to 4C are examples of experiments for estimating crosstalk between two adjacent transmission lines. The first transmission line extending from the port 11 to the port 12 and the port 13 are shown. The second transmission line penetrating from the port to the port 14 has an amount such as crosstalk from the first transmission line to the second transmission line in a layout in which the second transmission line runs in parallel over a distance of 300 μm. An inverted microstrip line (IMSL) structure, a triplate strip line (TPSL) structure according to claim 3 (see FIG. 4A), and a conventional coplanar line (CPW) structure (FIG. 4).
The data evaluated for the three parties (see (b)) are shown.

Further, according to the data shown in FIG. 4C, the cross microtalk has the performance comparable to that of the conventional coplanar line structure in the inverted microstrip line structure according to the second aspect. I understand. further,
When the triplate strip line structure according to claim 3 is adopted, a significant crosstalk reduction of about 40 dB can be achieved even if the distance between two parallel transmission lines is reduced to half compared to the conventional coplanar line structure. It turns out that it can be obtained. That is, this proves that if the triplate strip line structure according to the third aspect is adopted, a great integration degree improving effect can be obtained from the viewpoint of crosstalk.

Next, the fourth embodiment of the present invention will be described in detail with reference to FIG.

FIG. 5 is a diagram showing the dependence of the line constant on the strip conductor width of the inverted microstrip line structure according to the second aspect and the transmission line of the triplate strip line structure according to the third aspect. If such data is adopted, the required line constant can be designed using the strip conductor width as a parameter. Furthermore, it is desirable to suppress the thickness of the inverted microstrip substrate layer 4 and the buffer layer 5 to about 5 to 10 μm from the viewpoint of ease of manufacturing.
It is understood that by selecting the strip conductor width in this range within a realistic dimensional range such as 5 μm to 50 μm in which conductor loss can be ignored, the characteristic impedance can be designed in a wide range from 20Ω to 80Ω.

Finally, a mounting form of an integrated circuit chip will be described as a fifth embodiment for explaining the effect of the present invention with reference to FIG.

Conventionally, the integrated circuit is generally mounted by die bonding with the surface of the circuit facing upward, and the ground, signal, and power are drawn from the pads arranged around the chip by bonding wires. However, in this structure, the inductance component parasitic on the bonding wire affects the high frequency operation of the circuit, and is not suitable as a mounting form of the high frequency and wide band integrated circuit considered here.

On the other hand, recently, a bump technique which enables finer chip connection has been put into practical use, and high frequency,
The effect is obtained as a mounting form of a wideband integrated circuit.
When performing such bump connection, face down mounting is generally used in which the integrated circuit chip is placed upside down with respect to the mounting board. However, if the transmission line of the integrated circuit is designed by the conventional coplanar line structure, Due to the proximity effect to the circuit surface, the line constant deviates from the designed value.

Here, FIG. 6 is a result of evaluating the deviation of the line constant from the design value due to the proximity of the mounting board. When a bump having a diameter of 20 μm is used, the characteristic impedance and the effective dielectric constant of a typical line are increased. It shows that there is a shift of about 10%. And such an effect becomes a cause which deteriorates the designability of circuit mounting greatly.

On the other hand, according to the integrated circuit structure of the fourth aspect, the transmission line of the integrated circuit is completely shielded from the mounting board by the uppermost ground conductor 3, and the adverse effect due to the proximity effect as described above is exerted. It is clear that In other words, signals and power supplies can be extracted by arranging pads on the uppermost layer as usual, and most of the remaining chip surface is covered with the ground conductor 3 as described above. By arranging the bumps in an array, it is apparent that the mounting board can be taken out conceptually, and it is possible to realize a mounting form that matches the bump mounting in which excess ground impedance is eliminated even at the mounting design level.

As described above, the integrated circuit adopting the transmission line structure of the present invention can have an integrated layout without dividing the ground conductor 3 of the circuit.
Excessive ground impedance can be eliminated and stable operation of the circuit can be realized. In addition, the ground conductor 3 is moved from the layer in which the strip conductor 2 and the element 6 such as a transistor and a resistor are arranged to the upper layer, and thus the degree of integration is significantly improved. It also has ripple effects such as cost reduction. Further, according to the triplate line structure of the present invention, a crosstalk reducing effect can be expected. Further, the integrated circuit of the present invention is compatible with face-down bump mounting, and a mounting form with good design can be realized.

As described above, according to the present invention, it is possible to solve many problems which the conventional techniques of high frequency and wide band integrated circuits have, and to further improve the performance of the conventional microwave monolithic integrated circuit. In addition to cost reduction, it is possible to increase the speed and bandwidth of large-scale digital and analog circuits, which were difficult to design, and, in turn, increase the capacity of telecommunications and the speed of information processing in various industrial fields. Has a great effect on.

The present invention is not limited to the above-mentioned embodiments, and it goes without saying that various improvements and modifications can be made without departing from the spirit of the present invention.

[0047]

According to the present invention, by realizing a transmission line structure which can be highly integrated and easily reduce the ground impedance of the circuit, it is possible to contribute to the improvement of the performance and the designability of the high frequency and wide band circuit. An integrated circuit can be provided.

[Brief description of drawings]

1A and 1B are cross-sectional views showing a transmission line structure of an integrated circuit of the present invention, FIG. 1A is a diagram showing an inverted microstrip line structure according to claim 2, and FIG. It is a figure which shows a plate strip line structure.

FIG. 2A is a first embodiment of the present invention, in which (a) is a pattern diagram of an analog amplifier circuit which is laid out by employing the inverted microstrip line structure according to claim 2;
(B) is a conventional pattern diagram in which the same circuit is laid out by adopting a coplanar line structure for comparison of effects,
(C) is a frequency characteristic diagram of an amplifier showing an effect of implementing the present invention.

FIG. 3 is a second embodiment of the present invention, in which (a) is a pattern diagram of a digital circuit cell which is laid out by employing the inverted microstrip line structure according to claim 2;
FIG. 6B is a conventional pattern diagram in which the same function is laid out by adopting a coplanar line structure for comparison of effects.

FIG. 4 is an inverted microstrip line structure according to claim 2, wherein the crosstalk between two adjacent transmission lines is a third embodiment of the present invention. It is a figure which shows the data evaluated about 3 persons of the triplate strip line structure of 3 and the conventional coplanar line structure.

FIG. 5 is a fourth embodiment of the present invention, wherein the line constants of the inverted microstrip line structure according to claim 2 and the strip conductor width of the triplate strip line structure transmission line according to claim 3 are varied. It is a figure which shows a dependency.

FIG. 6 is a fifth embodiment of the present invention, which is a diagram for evaluating the deviation of the line constant from the design value due to the proximity of the mounting substrate during face-down mounting, for explaining the effect of the invention according to claim 4; Is.

FIG. 7 is a cross-sectional view showing a transmission line structure conventionally used in a microwave monolithic integrated circuit,
FIG. 3A is a diagram showing a microstrip line structure in which the back surface of the integrated circuit substrate is a ground conductor, and FIG. 6B is a diagram showing a coplanar line structure in which the ground conductor is arranged on the same surface as the strip conductor.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Integrated circuit board, 2 ... Strip conductor, 3 ... Ground conductor, 4 ... Inversion microstrip board layer, 5 ... Buffer layer, 6 ... Elements, such as a transistor and a resistor.

 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Satoshi Yamaguchi 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation (72) Shunji Kimura 1-6-1, Uchisaiwaicho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (72) Inventor Koichi Murata 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation (72) Inventor Yukio Akazawa 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation

Claims (4)

[Claims] 1. An integrated circuit in a monolithic integrated circuit, wherein at least a part of the circuit surface other than the power supply and signal extraction portion is covered with a metal that serves as an AC ground. 2. A monolithic integrated circuit in which circuit wiring is treated as a transmission line, wherein the transmission line is composed of at least a strip conductor and a ground conductor, and the strip conductor is formed near the integrated circuit board side as compared with the ground conductor. An integrated circuit characterized by: 3. A monolithic integrated circuit in which circuit wiring is treated as a transmission line, wherein the transmission line is composed of at least a strip conductor and two ground conductors, and the strip conductor is connected to the integrated circuit board by the two ground conductors. An integrated circuit, which is formed so as to be sandwiched in a vertical direction. 4. The integrated circuit according to claim 1, further comprising a bump connecting terminal on the circuit surface.