JPH0752558B2 - Recording density switching circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a recording density switching circuit in a floppy disk device or the like, and more particularly to a recording density switching circuit for performing three or more types of recording density switching. .

[Conventional technology]

Conventionally, in order to perform three or more types of recording density switching in a floppy disk device or the like, by using two or more recording density switching signals in the interface,
A method of switching three or more types of recording density is adopted.

[Problems to be Solved by the Invention]

In the above-mentioned conventional example, two or more recording density switching signals are required to perform three or more types of recording density switching. Therefore, there is a problem that the configuration becomes complicated and the price increase of the device cannot be avoided.

[Object of the Invention]

SUMMARY OF THE INVENTION The present invention is intended to solve the problems of the prior art as described above.
It is an object of the present invention to provide a recording density switching circuit that can switch three or more types of recording density using one recording density switching signal.

[Means for Solving the Problems]

In the present invention, two signals that do not normally become active levels at the same time are input, and a logic circuit that generates an output when both of these two signals become active levels and a recording density switching signal from the outside are used as data. A first latch circuit having an input and an output of the logic circuit as a clock input; and a second latch circuit having an output of the first latch circuit as a data input and an output of the first logic circuit as a clock input I have it. The recording density switching signal and the outputs of the first and second latch circuits are used to switch three or more types of recording density. This aims to achieve the above-mentioned object.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2.

In the embodiment shown in FIGS. 1 and 2, two signals A and B, which normally do not become active levels at the same time, are input, and output when both the signals A and B become active levels. The NOR gate 1 is provided as a logic circuit for generating. Also, a recording density switching signal C from the outside
Is a data input, and the output of the NOR gate 1 is a clock input. The D type flip-flop 4 as a first latch circuit, and the output of this D type flip-flop 4 is a data input and the output of the NOR gate 1 is a clock. It is provided with a D-type flip-flop 5 as a second latch circuit for inputting. Then, the recording density switching signal 6
And three or more types of recording density switching are performed by the outputs E and F of the respective type flip-flops 4 and 5 which are the first and second latch circuits.

NOR gate 1 is connected to two inputs of drive select signals A and B, and outputs the D-type flip-flops 4, 5
Are connected to their respective clock terminals CK. The recording density switching signal C from the interface is connected to the D (data) input terminal of the D type flip-flop 4. The Q output of the D type flip-flop 4 is connected to the D input terminal of the flip-flop 5 and is output to the outside as an internal density signal E. The Q output of the D type flip-flop 5 is output as the internal density signal F.

FIG. 2 is a time chart showing signals at various parts in the circuit shown in FIG. 1 and for explaining the operation of the recording density switching circuit of the present invention.

In the circuit of FIG. 1, drive select signals 2 and 3 are signals for switching two floppy disk drives (not shown), and normally one of them is at H (high) level and the other is at L (low). They are controlled to be at the level, and both are not at the L level at the same time (in the case of low active). In the present invention, this signal is used and an external circuit (not shown) is controlled so that both signals become L level at the same time when the recording density is switched.

Now, when the drive select signals 2 and 3 are both at the L level, the output of the NOR gate 1 is at the H level, and the clock inputs are provided to the D type flip-flops 4,5.

If the recording density switching signal C is initially at H level,
The D-type flip-flop 4 reads this state in response to the clock, and the internal density signal E, which is an output, becomes H level.
Become a level. However, at this time, since the D input of the D type flip-flop 5 is indefinite, the internal density signal F which is the output is also indefinite.

Recording density switching Switching signal C is a D type flip-flop
The interface is switched to the H level or the L level depending on the recording density t ₁ hours after the clocks 4 and 5 are clocked. Now, assume that the H level is switched to the L level.

Further, when the drive select signals A and B both become L level again after t ₂ time (t ₂ > t ₁ ), the clock input is given to the D type flip-flops 4 and 5 again by the output of the NOR gate 1. .

As a result, the D type flip-flop 5 reads the output state of the D type flip-flop 4 connected to the D input, and the internal density signal F, which is the output, becomes H level. On the other hand, the D type flip-flop 4 reads the state of the recording density switching signal 6 at the D input, and the internal density signal E, which is the output, becomes L level. In this state, the recording density switching signal C and the internal density signal E
Is at the L level and the internal density signal F is at the H level, and the recording density determined by the combination of these three signal states is instructed to a recording circuit (not shown).

Next, it is assumed that the recording density switching switching signal C is switched from the L level to the H level t ₁ hours after the D type flip-flops 4 and 5 are clocked. In this state, the recording density switching signal C and the internal density signal F are at H level, and the internal density signal E is at L level.
The recording density determined by the combination of the two signal states is instructed to a recording circuit (not shown).

As described above, in the recording density switching circuit of the present invention, two signals (drive select signals) A and B used for other purposes that are not simultaneously activated during normal operation are
By controlling both to be active,
Clocks two latch circuits (D type flip-flops) 4 and 5 connected in cascade, and drives select signals A and B
When the recording density switching signal C is determined ₁ hour after both are activated, the recording density in the recording circuit is designated by the signal states of the recording density switching signal C and the internal density signals E and F. There is.

Therefore, in the recording density switching circuit of the present invention, the recording density switching signal C from the interface and the two signals used for two other purposes which are not active during the normal operation can be used for up to eight types. The recording density can be switched.

〔The invention's effect〕

As described above, according to the present invention, three or more types of recording density switching can be performed by using one recording density switching signal and two signals used for other purposes that are not active at the same time. Since it is possible to make one recording density switching signal, which was conventionally required by two or more,
It is possible to provide an excellent recording density switching circuit that has not been available in the past and that can simplify the configuration and reduce the device price.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an embodiment of the present invention, and FIG. 2 is a time chart showing signals at respective parts in the circuit of FIG. 1 ... NOR gate as logic circuit, 4 ... D-type flip-flop as first latch circuit, 5 ... second
Type flip-flops as latch circuits for
...... Drive select signal, C …… Recording density switching signal,
E, F ... Internal density signal.

Claims (1)

[Claims] 1. A logic circuit which receives two signals which do not normally become active levels at the same time and which produces an output when both the signals become active levels, and a recording density switching signal from the outside. A first latch circuit having data input and an output of the logic circuit as a clock input, and a second latch having an output of the first latch circuit as a data input and an output of the first logic circuit as a clock input And a circuit for performing three or more types of recording density switching circuits according to the recording density switching signal and the outputs of the first and second latch circuits.