JPH0752374B2 - 自動校正式クロック同期装置 - Google Patents

自動校正式クロック同期装置

Info

Publication number
JPH0752374B2
JPH0752374B2 JP3009089A JP908991A JPH0752374B2 JP H0752374 B2 JPH0752374 B2 JP H0752374B2 JP 3009089 A JP3009089 A JP 3009089A JP 908991 A JP908991 A JP 908991A JP H0752374 B2 JPH0752374 B2 JP H0752374B2
Authority
JP
Japan
Prior art keywords
clock
signal
clock signals
signals
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3009089A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0695757A (ja
Inventor
リノ コンスタンチノ チェリーロ
ピー チェングソン ディヴィッド
エヌ リー ダック
エル ユー ロードソン
ケイ カーン アウラングゼブ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tandem Computers Inc
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Publication of JPH0695757A publication Critical patent/JPH0695757A/ja
Publication of JPH0752374B2 publication Critical patent/JPH0752374B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP3009089A 1990-01-29 1991-01-29 自動校正式クロック同期装置 Expired - Lifetime JPH0752374B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US471915 1983-03-03
US07/471,915 US5036528A (en) 1990-01-29 1990-01-29 Self-calibrating clock synchronization system

Publications (2)

Publication Number Publication Date
JPH0695757A JPH0695757A (ja) 1994-04-08
JPH0752374B2 true JPH0752374B2 (ja) 1995-06-05

Family

ID=23873485

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3009089A Expired - Lifetime JPH0752374B2 (ja) 1990-01-29 1991-01-29 自動校正式クロック同期装置

Country Status (3)

Country Link
US (1) US5036528A (cg-RX-API-DMAC7.html)
EP (1) EP0440357A2 (cg-RX-API-DMAC7.html)
JP (1) JPH0752374B2 (cg-RX-API-DMAC7.html)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5185768A (en) * 1990-10-09 1993-02-09 International Business Machines Corporation Digital integrating clock extractor
JPH06502264A (ja) * 1990-10-12 1994-03-10 インテル・コーポレーション 動的に切替え自在な多周波数クロック発生器
US5295257A (en) * 1991-05-24 1994-03-15 Alliedsignal Inc. Distributed multiple clock system and a method for the synchronization of a distributed multiple system
US5373537A (en) * 1991-09-02 1994-12-13 Siemens Aktiengesellschaft Method and apparatus for the synchronization of a clock means of a telecommunication switching system
USRE38482E1 (en) * 1992-05-28 2004-03-30 Rambus Inc. Delay stage circuitry for a ring oscillator
US5485490A (en) * 1992-05-28 1996-01-16 Rambus, Inc. Method and circuitry for clock synchronization
EP0596657A3 (en) * 1992-11-05 1994-12-07 American Telephone & Telegraph Normalization of propagation delay.
JPH0773598A (ja) * 1993-06-29 1995-03-17 Hitachi Ltd タイミング抽出回路とこれを用いた記録再生装置
DE4326062C1 (de) * 1993-08-03 1994-08-18 Siemens Ag Phasenregelanordnung
US5457719A (en) * 1993-08-11 1995-10-10 Advanced Micro Devices Inc. All digital on-the-fly time delay calibrator
US5570397A (en) * 1993-12-23 1996-10-29 Unisys Corporation Redundant synchronized clock controller
US5422915A (en) * 1993-12-23 1995-06-06 Unisys Corporation Fault tolerant clock distribution system
FR2732839B1 (fr) * 1993-12-27 1997-09-05 Medin David L Auto-etalonneur d'oscillateur
US5572554A (en) * 1994-07-29 1996-11-05 Loral Corporation Synchronizer and method therefor
JP3468592B2 (ja) * 1994-08-10 2003-11-17 富士通株式会社 クロック信号発生回路
US5796673A (en) * 1994-10-06 1998-08-18 Mosaid Technologies Incorporated Delay locked loop implementation in a synchronous dynamic random access memory
US6477656B1 (en) * 1998-09-29 2002-11-05 Konica Corporation System for generating clock pulse which the number of pulses outputted within a predetermined time period is based on the number of calculated delay stages
JP4394788B2 (ja) * 1999-05-10 2010-01-06 株式会社アドバンテスト 遅延時間判定装置
US6757350B1 (en) 1999-06-12 2004-06-29 Cisco Technology, Inc. Redundant clock generation and distribution
EP1342320B1 (en) 2000-11-23 2005-05-04 Koninklijke Philips Electronics N.V. Clock generation circuit and integrated circuit for reproducing an audio signal comprising such a clock generation circuit
US6930524B2 (en) * 2001-10-09 2005-08-16 Micron Technology, Inc. Dual-phase delay-locked loop circuit and method
US6621316B1 (en) 2002-06-20 2003-09-16 Micron Technology, Inc. Synchronous mirror delay (SMD) circuit and method including a counter and reduced size bi-directional delay line
US6727740B2 (en) * 2002-08-29 2004-04-27 Micron Technology, Inc. Synchronous mirror delay (SMD) circuit and method including a ring oscillator for timing coarse and fine delay intervals
US7620133B2 (en) * 2004-11-08 2009-11-17 Motorola, Inc. Method and apparatus for a digital-to-phase converter
WO2007110099A1 (en) * 2006-03-27 2007-10-04 Freescale Semiconductor, Inc. Apparatus for detecting clock failure and method therefor
FR2903205A1 (fr) 2006-06-28 2008-01-04 St Microelectronics Sa Procede de controle du temps d'evaluation d'une machine d'etat
US8970276B1 (en) 2013-12-17 2015-03-03 Analog Devices, Inc. Clock signal synchronization
DE102020215301A1 (de) * 2020-12-03 2022-06-09 Robert Bosch Gesellschaft mit beschränkter Haftung Verfahren zur Bereitstellung eines sicheren Zeitsignals
CN113767340A (zh) * 2021-08-02 2021-12-07 华为技术有限公司 控制装置、电子控制系统及车辆

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4165490A (en) * 1977-12-19 1979-08-21 International Business Machines Corporation Clock pulse generator with selective pulse delay and pulse width control
US4451917A (en) * 1981-01-15 1984-05-29 Lynch Communication Systems, Inc. Method and apparatus for pulse train synchronization in PCM transceivers
US4488297A (en) * 1982-04-05 1984-12-11 Fairchild Camera And Instrument Corp. Programmable deskewing of automatic test equipment
US4511846A (en) * 1982-05-24 1985-04-16 Fairchild Camera And Instrument Corporation Deskewing time-critical signals in automatic test equipment
DE3374829D1 (en) * 1983-09-07 1988-01-14 Ibm Phase-locked clock
US4617679A (en) * 1983-09-20 1986-10-14 Nec Electronics U.S.A., Inc. Digital phase lock loop circuit
US4584695A (en) * 1983-11-09 1986-04-22 National Semiconductor Corporation Digital PLL decoder
US4805195A (en) * 1984-06-08 1989-02-14 Amdahl Corporation Selectable timing delay circuit
US4637018A (en) * 1984-08-29 1987-01-13 Burroughs Corporation Automatic signal delay adjustment method
EP0185779B1 (en) * 1984-12-21 1990-02-28 International Business Machines Corporation Digital phase locked loop
US4756010A (en) * 1985-11-07 1988-07-05 Motorola, Inc. Asynchronous/synchronous data receiver circuit
US4696051A (en) * 1985-12-31 1987-09-22 Motorola Inc. Simulcast transmission system having automtic synchronization
US4696052A (en) * 1985-12-31 1987-09-22 Motorola Inc. Simulcast transmitter apparatus having automatic synchronization capability
CA1297171C (en) * 1986-04-01 1992-03-10 Samuel Howard Gailbreath Jr. Digital phase lock loop
DE3751571T2 (de) * 1986-05-20 1996-04-11 Mitsubishi Electric Corp Verfahren zur Synchronisation der Echtzeituhren in einem Datenübertragungssystem.

Also Published As

Publication number Publication date
JPH0695757A (ja) 1994-04-08
US5036528A (en) 1991-07-30
EP0440357A2 (en) 1991-08-07
EP0440357A3 (cg-RX-API-DMAC7.html) 1994-01-12

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