JPH0751430B2 - Elevator control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Object of the Invention (Industrial field of application) The present invention provides multiplex transmission between a computer in a cab and a main computer in a machine room, and between a computer in each floor and a main computer in a machine room. The present invention relates to a control device for an elevator.

(Prior Art) Hundreds of electric wires are provided between the elevator machine room and the car and each floor to communicate information. In the car, those electric wires are moving cables that move according to the running of the car. If the number of electric wires increases, the weight of the entire moving cable increases, and the load on the hoisting machine increases, resulting in an increase in power consumption. Further, since the moving cable moves as the car progresses, if the number of cables increases, the cables are entangled with each other, which is dangerous. Therefore, conventionally, in order to reduce the number of these moving cables, a computer is also installed in the cab, and signals are transmitted and received by multiplex transmission with the main computer in the machine room to control the entire cab. At each floor, there are many devices such as call registration devices, lanterns, allocation forecasts, and chimes for reporting landing, etc., but control of these devices is also possible by installing a computer on each floor and connecting it to the main computer in the machine room by multiplex transmission. Significantly reduce electric wires. Furthermore, by installing computers in the cab and each floor, the processing of the main computer is distributed and the processing capacity of the computer system in the entire elevator is improved.

(Problems to be solved by the invention) However, if these computers fail, information is not normally communicated to each other and the elevator cannot operate normally, so failure information of each computer is input to the main computer. Need to be monitored. further,
When a failure of the main computer is detected, it is necessary to connect each computer with a signal line that outputs a restart command so that recovery can be automatically performed.

An object of the present invention is to provide an elevator control device that can automatically perform self-recovery and can notify of a failure when a computer provided in a cab or each floor hall fails.

[Structure of Invention]

(Means for Solving Problems) A program abnormality detecting means for detecting abnormality in execution of a program in the arithmetic means is connected to the arithmetic means provided in the elevator car, machine room and each floor hall, and the program abnormality detecting means is connected. An abnormality display means for notifying a program execution abnormality is connected to.

(Function) The program abnormality detection means detects that the program execution in the calculation means is abnormal when the program abnormality detection signal input from the calculation means is interrupted for a predetermined time, and gives a restart command to the calculation means. . The abnormality notifying means notifies the program abnormality when the program abnormality detecting means detects the program execution abnormality.

(Example) An example of the present invention will be described with reference to the drawings.

FIG. 1 shows a block diagram of a control device installed in a car or each floor. A is a computer processor. In the car room, the processor A performs car call registration, control of opening and closing of doors, and the like. At each floor hall, hall call registration, lanterns, and chimes are controlled. Processor A uses signals DO and CS as program abnormality detection signals.
Is output. The signal DO is a signal on the data bus of the processor A, and the signal CS is a signal output when it is addressed by a program in the processor A. The program abnormality detection circuit PED is composed of an AND circuit 1, an oscillation circuit 2, and a frequency divider 3. The signals DO and CS are input to the AND circuit 1. The output of the AND circuit 1 is sent as a restart command RST of the processor A via the frequency divider 3 to the processor A.
Entered in. The oscillator circuit 2 is connected to the frequency divider 3.
The abnormality notification circuit ED displayed when an abnormality is detected is composed of a flip-flop circuit 4, an OR circuit 5, an AND circuit 6, an output buffer 7, and a call response lamp 8. The output 3a uses the two outputs of the frequency divider 3 to determine the blinking cycle of the display. The output 3b is used as a signal for turning on the display output via the flip-flop circuit 4, and these are input to the OR circuit 5, and the output of the OR circuit 5 is formed by a photocoupler via the AND circuit 6 together with the processor output ▲ ▼. Shock absorber 7
Entered in. The output of the output buffer 7 is connected to a device to be controlled, for example, a call answering lamp 8. In the figure, Vcc is a power source for the processor and peripheral computers, and (+) and (-) are DC power sources for display.

The operation of the embodiment based on the above configuration will be described. 2 and 3 show the waveforms of the respective parts of the car A, the processor A installed in each hall, the program abnormality detection circuit PED, and the abnormality display circuit ED. In FIG. 2A, the processor A outputs a specific address, and the signal CS obtained by decoding this address changes from "L" level to "H" level. When "L" is sent to the data bus, the output signal DO from the processor A changes from "L" level to "H" level, the count value of the frequency divider 3 is cleared, and the counting is started again. . The frequency divider 3 counts the output 2a (Fig. 2 (c)) of the oscillator 2 and, for example, when counting up edges eight times, the output as shown in (A) in Fig. 3 (f).
Output 3b. Normally, the signals CS and DO are output from the processor A to clear the count value of the frequency divider 3 before the frequency divider 3 counts up edges eight times. Therefore, if the signals CS and DO are normally output from the processor A regularly, the output 3b of the frequency divider 3 continues to output the "L" level (Fig. 2 (d)).

However, if the execution of the program is abnormal due to noise or the like, the signals DO and CS are not normally output from the processor A as shown in FIG. 3 (A) (FIGS. 3 (a) and (b)). In this case, the output 1a of the AND circuit 1 which is the clear signal of the frequency divider 3 does not change to the "H" level even if a predetermined time has passed (Fig. 3 (c)). If the clear signal is not input to the clear terminal C of the frequency divider 3 for a predetermined time or more, the frequency divider 3
Is output 3b when the up edge of the second signal 2a is detected
Is changed to "L" level and "H" level (FIG. 3 (f)). This signal is input to the processor A as a restart signal RST that controls the activation of the processor A. The restart signal, RST, of the processor A has a function of initializing the processor A and is a signal that is always controlled even when the power is turned on (not shown in the figure), after holding the "H" level for a predetermined time, "L""By setting the level, the processor A operates normally. Therefore, when the output 3b of the frequency divider 3 changes from "L" level to "H" level, the processor A is initialized and signals CS (address bus), DO (data bus), ▲ ▼ (output port), etc. Change to the initial state. And the startup is stopped.

Further, since the output 3b of the frequency divider changes from "L" level to "H" level, the output terminal of the flip-flop circuit 4 changes to "H" level and "L" level (Fig. 3 (g)). . The output signal 3a of the frequency divider 3 is inverted when the rising edge of the output signal 2a of the oscillator 2 is counted three times. (FIG. 3 (e)). OR circuit 5 to which these signals 3a and 4a are input
Output 5a is second when processor A is operating normally
The level is "H" as shown in FIG. Therefore, the AND circuit 6 can change the output 6a only by the output A of the response lamp controlling processor A. That is, processor A
If the call is normal, the call response lamp 8 sends a ▲ ▼ signal to "L".
Then, the AND circuit output 6a changes to "L", the photocoupler of the output buffer 7 is turned on, and the current flows from the power supply Vcc into the AND circuit 6. As a result, the transistor of the photocoupler is turned on and the (+)-call response lamp 8-transistor photocoupler (+)-(-) circuit is completed and the call response lamp 8 is turned on. By changing the signal to "H" level, the output 6a of the AND circuit 6 changes to "H", so the photocoupler is turned off and the call response lamp is also turned off.

When the signal 4a changes from "H" level to "L" level, the output 3a of the frequency divider 3 is output to the output 5a of the OR circuit 5. As a result, the output of the AND circuit 6 repeats the "H" and "L" levels as described above, and the call response lamp 8 repeats blinking at the "L" level output cycle of the frequency divider 3.

Further, time elapses in this state, that is, the output 3b of the frequency divider 3
When the frequency divider 3 counts the amplifier edge of the output 2a of the oscillator 2 eight times after the change to "H", the signal 3b changes to "L", the activation suppression of the processor A is canceled, and the processor A starts initially. . If the cause of the abnormality is due to noise or the like, the processor A starts normally and returns to normal. This is shown in FIG. 3 (B). At the same time that the output of the frequency divider 3 is cleared by the abnormality detection signals CS and DO, the flip-flop circuit 4 is also reset by the signal 1a and changes to "H" level, and the abnormality detection display is released (OFF). If an abnormality is detected even after the restart, the output 3b of the frequency divider 3 repeats "H" and "L", and the operation of blinking the call response lamp 8 at the "H" level is repeated.

(Other Embodiments) In the above-mentioned embodiment, the abnormality notification is performed by using the call response light, but the output of the controlled object of the processor A is not limited to this, and a lantern, a chime or the like can be considered.

Further, in the embodiment, the abnormality detection condition is set to be a program runaway or noise of the processor, but the abnormality detection condition is not limited to this. Easy to do. In other words, the processor may stop the output to the abnormality detection circuit when detecting an abnormality in the transmission.

〔The invention's effect〕

According to the present invention, the system down of the elevator controller can be prevented by self-recovering when the controller provided in the cab or each floor hall becomes abnormal. Further, in the case of an abnormality that cannot be self-recovered, a preliminary response lamp or the like blinks to notify the abnormality, so that the abnormality can be removed early without providing a dedicated indicator.

[Brief description of drawings]

FIG. 1 is a block diagram of an elevator control apparatus according to an embodiment of the present invention, and FIGS. 2 and 3 are waveform diagrams of respective parts of the elevator control apparatus shown in FIG. A: Processor PED: Program error detection circuit ED: Error display circuit

Claims (1)

[Claims] 1. An arithmetic means for outputting a program abnormality detection signal provided in an elevator car, a machine room and each floor, and an arithmetic means in the arithmetic means when the program abnormality detection signal is interrupted by the arithmetic means for a predetermined time. Program abnormality detecting means for detecting that the execution of the program is abnormal and giving a restart command to the arithmetic means, and when the program abnormality detecting means detects that the execution of the program in the arithmetic means is abnormal. An elevator control device having an abnormality notifying means for notifying a program abnormality to the vehicle.