JPH0750288A - Manufacture of semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To restrain corrosion of a metal film or excessive elimination phenomenon of a metal film, an insulating film, etc., and improve resist eliminating efficiency, in the case of ashing process. CONSTITUTION:A metal film formed on a semiconductor wafer is patterned by etching treatment (101). When a resist pattern used as an etching mask is removed by using plasma, a first plasma removal process (102a) which uses mixed gas of O2 gas and CF4 gas as reaction gas, and a second plasma removal process (102b) which uses mixed gas of O2 gas and CH3OH gas as reaction gas are continuously performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for manufacturing a semiconductor integrated circuit device, and more particularly to a technique for removing a photoresist (hereinafter referred to simply as "resist") film used as an etching mask using plasma, a so-called plasma resist. The present invention relates to a technique effectively applied to an ashing (hereinafter, simply referred to as plasma ashing) technique.

[0002]

2. Description of the Related Art A predetermined fine pattern forming a semiconductor integrated circuit device is formed by etching a metal film, an insulating film, a semiconductor film or the like with a resist film formed thereon as a mask.

This resist film is usually patterned on a metal film or the like by exposure / development processing, but it is removed after etching treatment of the metal film or the like because it is not necessary for constructing a semiconductor integrated circuit device. .

As a method for removing the resist film, there are a wet processing method using a liquid chemical and a dry processing method using plasma. In the case of the wet processing method, pattern defects and contamination caused by foreign matters in the processing liquid are generated. There are problems, safety of work, pollution of waste liquid treatment, and the like, and in recent years, a dry treatment method capable of treatment in a relatively clean environment, that is, a plasma ashing treatment has been adopted.

In the plasma ashing process, for example, O ₂ plasma ashing using oxygen (O ₂ ) gas as a main gas is generally performed, but in recent years, for example, O ₂ plasma ashing is performed from the viewpoint of improving the ashing ability. Plasma ashing treatment using a mixed gas obtained by adding a fluorine-based (CF ₄ ) gas to _two gases is also performed.

By the way, in the plasma ashing process after the dry etching process of the metal film, particularly the Al-based metal film or the laminated metal film of the Al-based metal film and the barrier metal film, the metal film is corroded by the processing method. There's a problem.

It is considered that the cause of the corrosion of the metal film is a reaction between chlorine (Cl) remaining after the dry etching treatment and moisture in the atmosphere. This is because a chlorine (Cl) -based gas is usually used for etching the Al-based metal film or the like.

As a method of preventing the corrosion of the metal film, there is a method of cleaning the semiconductor wafer with pure water after the plasma ashing process. This method is effective for preventing the corrosion, but the ashing process is performed. Since it is performed later, there is a problem in processing efficiency.

Therefore, as a method for suppressing the corrosion of the Al-based metal film or the like during the plasma ashing treatment, for example, as described in "Nikkei Micro Device" P131-P132, published by Nikkei BP, December 1, 1991. There is a method of using H ₂ O plasma in the plasma ashing process.

[0010]

However, the present inventor has found that the above-mentioned conventional plasma ashing technique has the following problems.

In the case of the plasma ashing process using the above-mentioned mixed gas of O ₂ and CF ₄ , the metal film and the resist film formed on the side wall of the metal film by the removal of the resist and the etching process of the metal film are sub-products. Although it is very effective in improving the removability of the product, it is not effective enough in terms of corrosion resistance of the metal film, and the etching treatment of the laminated metal film in which the Al-based metal film is deposited on the barrier metal film. If the plasma ashing process is performed later, the side surface of the barrier metal film may be etched in some cases.

On the other hand, the above H ₂ O plasma ashing treatment is very effective in terms of the corrosion resistance of the metal film, but in terms of resist removability, the above O ₂ and CF ₄ are used. Compared with the plasma ashing process, it is very low, about 1/5, and there is a problem in throughput. This problem is particularly problematic when using a single wafer type plasma ashing apparatus that processes semiconductor wafers one by one.

Further, in the case of H ₂ O plasma ashing treatment, since the byproducts of the metal film and the resist film cannot be sufficiently removed, Cl contained in the byproducts causes the metal film to be removed. Had the problem of being corroded.

The present invention has been made in view of the above-mentioned problems, and an object thereof is to suppress corrosion of a metal film or a phenomenon of excessive removal of a metal film, an insulating film, or the like, and resist removal during plasma ashing treatment. It is to provide a technology capable of improving efficiency.

The above and other objects and novel features of the present invention will be apparent from the description of the specification and the accompanying drawings.

[0016]

Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows.

That is, according to the first aspect of the invention, when the resist pattern used as the etching mask when the metal film formed on the semiconductor substrate is patterned by the etching process is removed by using the plasma, the reaction gas is used as the reaction gas. First plasma removal treatment step using a first mixed gas of O ₂ gas and fluorine (F) -based gas, and second plasma removal treatment using a second mixed gas of O ₂ gas and a gas containing H as a reaction gas The method is a method for manufacturing a semiconductor integrated circuit device in which the steps are continuously performed.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor integrated circuit device, wherein the first plasma removing process and the second plasma removing process are switched to each other just before the resist pattern is completely lost.

[0019]

According to the invention described in claim 1, the following effects can be obtained. First, since the resist pattern can be removed at a high speed by the first plasma removing process, the resist removing efficiency can be improved. In addition, since the by-products of the metal film and the resist film formed on the side wall of the metal film during the etching process of the metal film can be softened and easily removed, the Cl contained in the by-product can be removed. It is possible to reduce the corrosion of the metal film that is caused. Also, the second
By the plasma removal treatment, Cl is combined with H in the reaction gas to be easily removed, so that corrosion of the metal film due to the Cl can be suppressed. Therefore, by continuously performing the first plasma removing process and the second plasma removing process, corrosion of the metal film can be suppressed and the resist removing efficiency can be improved.

According to the second aspect of the present invention, the first plasma removing process and the second plasma removing process are switched immediately before the resist pattern is completely lost, so that the first plasma removing process is over-processed. It is possible to suppress the excessive removal phenomenon of the underlayer or the metal film which is caused.

[0021]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 is a process diagram showing a method of manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention, and FIG. 2 is a view for explaining the structure of a semiconductor manufacturing device used in the method of manufacturing the semiconductor integrated circuit device of FIG. 3 is a sectional view of a main part of a semiconductor wafer immediately before being loaded into the semiconductor manufacturing apparatus of FIG. 2, FIG. 4 is an explanatory view for explaining a main part of a plasma resist ashing processing part, and FIG. FIG. 6 is a cross-sectional view of the main part of the semiconductor wafer before the plasma resist ashing process, FIG. 6 is a cross-sectional view of the main part of the semiconductor wafer during the plasma resist ashing process, and FIG. 8 and 9 are graphs showing the relationship between the second plasma removal time and the number of corrosions, and FIG. 10 shows the gas having a hydroxyl group used for the second plasma removal treatment. A chromatic index is a graph the relationship between the corrosion rate.

A semiconductor manufacturing apparatus 1 of this embodiment shown in FIG.
Is a single-wafer dry etching apparatus, for example, and has a load lock unit 2a, a dry etching treatment unit 3, a plasma ashing treatment unit 4, and an unload lock unit 2b. The parts 2a, 2b, 3 and 4 are separated by gate valves 5a to 5c.

The load lock section 2a is a mechanism section for loading the semiconductor wafer 6 into the semiconductor manufacturing apparatus 1, and is mechanically connected to the dry pump 8a via a valve 7a. The dry pump 8a is a pump for drawing a relatively low vacuum, for example, a comma number Torr, and by this, the degree of vacuum in the chamber of the load lock portion 2a is maintained and adjusted.

The semiconductor wafer 6 is made of, for example, silicon (S
i) It is made of a single crystal, and a predetermined semiconductor integrated circuit is formed on its main surface. FIG. 3 shows a cross-sectional view of a main part of the semiconductor wafer 6 immediately before being loaded into the semiconductor manufacturing apparatus 1.

A semiconductor substrate 6a constituting the semiconductor wafer 6
An insulating film 6b made of, for example, silicon dioxide (SiO ₂ ) is formed on the top. A laminated metal film 6c, for example, is deposited on the insulating film 6b, and a resist pattern 6d, for example, is formed on the laminated metal film 6c. Laminated metal film 6c, for example a metal layer 6c ₂ made of a barrier metal layer 6c ₁ and Al or the like made of TiN or the like is laminated in this order from below.

The unload lock section 2b of the semiconductor manufacturing apparatus 1 of FIG. 2 is a mechanism section for carrying out the processed semiconductor wafer 6 from the semiconductor manufacturing apparatus 1. The unload lock part 2b is connected to the dry pump 8b via the valve 7b.
Is mechanically connected to the chamber, which maintains and adjusts the degree of vacuum in the room.

The dry etching processing section 3 has a resist pattern 6d formed on the semiconductor wafer 6 (see FIG. 3).
Is used as an etching mask to form a laminated metal film 6c thereunder.
(See FIG. 3) An etching processing part for patterning a predetermined shape, for example, microwave, plasma,
The structure allows dry etching.

The dry etching processing section 3 is mechanically connected to the dry pump 8c and the vacuum pump 9a via valves 7c and 7d. The dry pump 8c and the vacuum pump 9a are mechanically connected via a valve 7e. The vacuum pump 9a is a pump for drawing a relatively high vacuum. By these, the degree of vacuum and the like of the dry etching processing section 3 is maintained and adjusted.

The plasma ashing processing section 4 is a processing section for removing the resist pattern 6d (see FIG. 3) on the semiconductor wafer 6, and has a structure capable of performing microwave plasma ashing processing, for example. .

The plasma ashing processing unit 4 is
It is mechanically connected to the dry pump 8d and the vacuum pump 9b via valves 7f and 7g. The dry pump 8d and the vacuum pump 9b are mechanically connected via a valve 7h. With these, the vacuum degree and the like of the plasma ashing processing unit 4 is maintained and adjusted.

Plasma ashing processing unit 4 of this embodiment
FIG. 4 shows a main part of the above. In the processing chamber 4a of the plasma ashing processing unit 4, a wafer mounting table 4b for mounting the semiconductor wafer 6 is installed. A wafer temperature adjusting unit 4c for setting the temperature of the semiconductor wafer 6 to a predetermined temperature is built in the wafer mounting table 4b. The wafer temperature control unit can set the temperature in the range of, for example, about 0 to 180 ° C.

An exhaust port 4d is formed below the processing chamber 4a. The exhaust port 4d is provided with the valve 7f shown in FIG.
It is mechanically connected to the dry pump 8d and the vacuum pump 9b via 7g. The arrow A indicates the exhaust flow.

Further, the processing chamber 4a plasma ashing treatment unit 4, a plurality of gas supply sources 4e ₁ ~4e ₃ the valve 4f ₁ ~4f ₃ and the gas flow rate control unit 4g ₁ to 4 g ₃
Mechanically connected via. The plasma ashing processing unit 4 of this embodiment has a structure capable of independently supplying a plurality of types of gas into the processing chamber 4a.

O ₂ gas, for example, is injected into the gas supply source 4e ₁ . A gas having a hydroxyl group, such as methanol (CH ₃ OH) gas, is injected into the gas supply source 4e ₂ . The gas supply source 4e ₃ is, for example, CF
Fluorine-based gas such as ₄ gas is injected.

The gas flow rate control units 4g _{1 to} 4g ₃ are control valves for controlling the flow rate of the gas supplied into the processing chamber 4a, and the main control unit 4h for controlling the plasma ashing processing unit 4 as a whole. It is electrically connected to the valve and the opening / closing of the valve is controlled.

A chamber 4i is installed above the wafer mounting table 4b. The chamber 4i is made of, for example, quartz, and a vacuum seal 4j is interposed between the outer periphery of the chamber 4i and the inner wall surface of the processing chamber 4a.

An emission spectrum detector 4k is installed above the chamber 4i. Emission spectrum detector 4
k is a detection unit for detecting a predetermined emission spectrum in the processing chamber 4a during plasma processing, and is electrically connected to the detection signal measurement unit 4l.

The detection signal measuring section 4l is electrically connected to the main control section 4h. The main control unit 4h can automatically set processing conditions and the like during plasma processing based on the signal transmitted from the detection signal measuring unit 4l.

A horn section 4m and a waveguide 4n are installed above the chamber 4i. Microwave μ
After being generated by a magnetron (not shown), it is guided to the waveguide 4n and the horn portion 4m and made incident on the inside of the processing chamber 4a. The frequency of the microwave μ is, for example, about 2.45 GHz.

Next, a method of manufacturing the semiconductor integrated circuit device of this embodiment will be described along with FIG. 1 and with reference to FIGS.

First, after the semiconductor wafer 6 is housed in the processing chamber of the dry etching processing section 3, the semiconductor wafer 6 is subjected to, for example, normal plasma dry etching processing (step 101 in FIG. 1).

FIG. 5 shows a sectional view of the main part of the semiconductor wafer 6 after this treatment. As shown in FIG. 5, a patterned laminated metal film 6c is deposited on the insulating film 6b of the semiconductor wafer 6. In addition, the patterned laminated metal film 6
A side film 10 is formed on the side walls of c and the resist pattern 6d.

The side film 10 is a by-product that is formed during the dry etching process of the laminated metal film 6c. For example, the side film 10 mainly contains Al and the like.
1 and the like are also included.

Subsequently, the gate valve 5b of the semiconductor manufacturing apparatus 1 is opened, the semiconductor wafer 6 after the plasma dry etching process is accommodated in the processing chamber 4a of the plasma ashing processing unit 4, and then the semiconductor wafer 6 is removed. Then, the plasma ashing process is performed as follows (step 1 in FIG. 1).
02). The degree of vacuum in the processing chamber 4a during this processing is, for example, about 1 × 10 ⁻⁴ to 1 × 10 ⁻⁵ Torr.

First, a mixed gas of O ₂ gas and CF ₄ gas is introduced into the processing chamber 4a of the plasma ashing processing unit 4. The amount of CF ₄ gas at this time is, for example, about 5%.

Then, the resist pattern 6d is removed by forming a plasma of the O ₂ / CF ₄ mixed gas by injecting the microwave μ into the processing chamber 4a (the first plasma removing process step of FIG. 1). 102a). Thereby, the resist pattern can be removed at high speed. Moreover, the side film 10 can be softened to facilitate removal.

At this time, in this embodiment, plasma
By observing the emission spectrum (wavelength 656 nm) of H in the processing chamber 4a of the plasma processing unit 4 by the emission spectrum detection unit 4k of the ashing processing unit 4, the O ₂ / CF just before the resist pattern 6d is completely removed. ₄ Complete the plasma ashing process with plasma.

The reason why the ashing end point is determined by using the emission spectrum of H is about 3 in the conventional case where the ashing end point is determined by using the emission spectrum of CO.
This is because the end point determination can be performed with a sensitivity more than double, and by this end point determination, the barrier metal layer 6 under the metal layer 6c ₂ is determined.
Undercut of c ₁ and abrasion of the underlying insulating film 6b can be suppressed.

FIG. 6 shows a cross-sectional view of the main part of the semiconductor wafer 6 after this treatment. A resist pattern 6d is slightly left on the laminated metal film 6c on the semiconductor wafer 6. Although the side film 10 is left as it is, it is in a softened state.

Next, after exhausting the reaction gas in the processing chamber 4a of the plasma ashing processing unit 4, for example, a mixed gas of O ₂ gas and CH ₃ OH gas is introduced into the processing chamber 4a. The amount of CH ₃ OH gas at this time is, for example, 30%.
It is a degree. The reason for this will be described later.

Then, the microwave μ is injected into the processing chamber 4a to form a plasma of O ₂ / CF ₄ mixed gas to remove the remaining resist pattern 6d (second plasma removal in FIG. 1). Processing step 102b). As a result, Cl remaining on the semiconductor wafer 6 after the dry etching treatment of the laminated metal film 6c is easily combined with H and easily removed, so that corrosion of the laminated metal film 6c due to the Cl can be suppressed.

FIG. 7 shows a cross-sectional view of the main part of the semiconductor wafer 6 after this treatment. The patterned laminated metal film 6c is left on the semiconductor wafer 6. Side film 1
Since 0 is softened, it is bent along the outer wall of the laminated metal film 6c. Barrier metal layer 6c ₁
Also, the underlying insulating film 6b is not formed with undercuts or abrasions.

By the way, in the present embodiment, in the second plasma removal processing step, the temperature of the wafer temperature adjusting unit 4c of the wafer mounting table 4b in the plasma processing section 4 is
For example, it is set to about 100 to 150 ° C. This makes it possible to further improve the corrosion suppression effect of the laminated metal film 6c.

8 and 9 show the relationship between the second plasma removal processing time and the corrosion number when the temperature of the wafer temperature control unit 4c is, for example, 20 ° C. and 150 ° C., respectively.
As shown in FIGS. 8 and 9, the number of corrosions decreases as the second plasma removal processing time increases, and the number of corrosions is significantly smaller when the temperature of the wafer temperature control unit 4c is, for example, 150 ° C. I understand.

Further, the second plasma removal processing step 102b
In the case of, for example, the amount of CH ₃ OH gas is, for example, 30
%. This results in CH ₃ O as shown in FIG.
This is because the corrosion number of the laminated metal film 6c can be reduced most when the amount of H is about 30%.

Finally, after the semiconductor wafer 6 which has been subjected to the plasma ashing process as described above is housed in the unload lock section 2b, it is carried out of the semiconductor manufacturing apparatus 1 to perform the semiconductor integrated circuit device manufacturing process. To finish.

As described above, according to this embodiment, the following effects can be obtained.

(1). At the time of the first plasma ashing process, the resist pattern 6d can be removed at a high speed by performing the first plasma removal process using, for example, O ₂ / CF ₄ mixed gas. It is possible to improve the removal efficiency.

(2). In the first plasma ashing treatment, the first plasma removing treatment using, for example, O ₂ / CF ₄ mixed gas is performed, so that the laminated metal film 6c and the resist pattern are etched during the etching treatment of the laminated metal film 6c. 6d
Since the side film 10 which is a by-product of the metal film and the resist formed on the side wall of the film can be softened and easily removed, C contained in the side film 10 can be easily removed.
It is possible to reduce the corrosion of the laminated metal film 6c due to l.

(3) At the time of the first plasma ashing process, the second plasma removal process using, for example, O ₂ / CH ₃ OH mixed gas is performed, so that the semiconductor wafer 6 is dry-etched after the laminated metal film 6c. Residual Cl
Is easily removed by combining with H in CH ₃ OH,
Corrosion of the laminated metal film 6c due to the Cl can be suppressed.

(4). The laminated metal film 6 is obtained by the above (1) to (3).
Corrosion of c can be suppressed, and resist removal efficiency can be improved.

(5). At the time of switching between the first plasma removal processing and the second plasma removal processing, the emission spectrum of H emitted in the processing chamber 4a of the plasma ashing processing section 4 is observed during the plasma ashing processing. By making the determination by doing so, it becomes possible to improve the detection sensitivity.

(6). By switching the first plasma removing process and the second plasma removing process just before the resist pattern 6d is completely removed, the underlying insulating film 6b caused by the excessive process of the first plasma removing process is performed. It is possible to suppress abrasion of the metal or undercut of the barrier metal layer 6c ₁ .

(7) By the above (1) to (6), it is possible to improve the throughput in the plasma ashing process while maintaining the reliability of the semiconductor integrated circuit device.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, in the above-mentioned embodiment, the case where the mixed gas of O ₂ gas and CF ₄ gas is used as the reaction gas at the time of the first plasma removal processing is explained, but it is not limited to this and various modifications are made. Is possible, for example O
A mixed gas of ₂ gas and CHF ₃ gas may be used.

Further, in the above-mentioned embodiment, the reaction gas at the time of the second plasma removal treatment is O ₂ gas and CH ₃ OH.
Although the case where the mixed gas with the gas is used has been described, the present invention is not limited to this and various modifications can be made. For example, a mixed gas of O ₂ gas and H ₂ O gas may be used.
Further, instead of the H ₂ O gas, H gas, methane gas,
You may use ethane gas or ethanol gas.

Further, in the above-mentioned embodiment, the case where the present invention is applied to the plasma ashing process after patterning the laminated metal film of the barrier metal layer and the Al layer is explained, but the present invention is not limited to this and various applications are possible. This is also possible, and can be applied to plasma ashing treatment after patterning a single-layer metal film made of, for example, an Al—Si—Cu alloy. In this case, it is not always necessary to leave a slight amount of resist pattern immediately before the end of the first plasma removal processing.

[0070]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.
It is as follows.

(1) According to the invention described in claim 1, O ₂ gas and F ₂ are used in one plasma ashing process.
By continuously performing the first plasma removal treatment using the system gas and the second plasma removal treatment using the gas containing O ₂ gas and H, the corrosion of the metal film can be suppressed and the resist removal efficiency can be improved. Can be improved.
That is, it is possible to improve the throughput in the plasma ashing process while ensuring the reliability of the semiconductor integrated circuit device.

(2) According to the second aspect of the invention, the first plasma removing process and the second plasma removing process are switched immediately before the resist pattern is completely lost, so that the first plasma removing process is excessive. It is possible to suppress an excessive removal phenomenon of the base or the metal film due to the treatment. Therefore, in the plasma ashing process, not only the corrosion of the metal film can be suppressed but also the excessive removal phenomenon of the metal film, the insulating film and the like can be suppressed, and the resist removal efficiency can be improved. That is, it is possible to improve the throughput of the plasma ashing process while ensuring the reliability of the semiconductor integrated circuit device.

[Brief description of drawings]

FIG. 1 is a process drawing showing a method for manufacturing a semiconductor integrated circuit device which is an embodiment of the present invention.

FIG. 2 is an explanatory diagram for explaining a configuration of a semiconductor manufacturing apparatus used in the method for manufacturing the semiconductor integrated circuit device of FIG.

FIG. 3 is a cross-sectional view of essential parts of a semiconductor wafer immediately before being loaded into the semiconductor manufacturing apparatus in FIG.

FIG. 4 is an explanatory diagram for explaining a main part of a plasma resist ashing processing unit.

FIG. 5 is a cross-sectional view of a main part of a semiconductor wafer before plasma resist ashing processing.

FIG. 6 is a cross-sectional view of essential parts of a semiconductor wafer during a plasma resist ashing process.

FIG. 7 is a cross-sectional view of an essential part of a semiconductor wafer after a plasma resist ashing process.

FIG. 8 is a graph showing the relationship between the second plasma removal time and the number of corrosions.

FIG. 9 is a graph showing the relationship between the second plasma removal time and the number of corrosions.

FIG. 10 is a graph showing the relationship between the content rate of a gas having a hydroxyl group used in the second plasma removal treatment and the number of corrosions.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Semiconductor manufacturing equipment 2a Load lock part 2b Unload lock part 3 Dry etching process part 4 Plasma ashing process part 4a Processing chamber 4b Wafer mounting table 4c Wafer temperature control unit 4d Exhaust port 4e _{1 to} 4e ₃ Gas supply source 4f ₁ to 4f ₃ valve 4g _{1 to} 4g ₃ gas flow rate control unit 4h main control unit 4i chamber 4j vacuum seal 4k emission spectrum detection unit 4l detection signal measurement unit 4m horn unit 4n waveguide 5a to 5c gate valve 6 semiconductor wafer 6a semiconductor substrate 6b Insulation film 6c Laminated metal film 6d Resist pattern 6c ₁ Barrier metal layer 6c ₂ Metal layer 7a-7h Valve 8a-8d Dry pump 9a, 9b Vacuum pump 10 Side film

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kento Usui 502, Kazunachi-cho, Tsuchiura-shi, Ibaraki Hiritsu Seisakusho Co., Ltd.

Claims (5)

[Claims] 1. When removing a resist pattern used as an etching mask when patterning a metal film formed on a semiconductor substrate by etching using plasma, oxygen gas and fluorine-based gas are used as reaction gases. A second plasma removing process using a first mixed gas; and a second process using a gas containing oxygen gas and hydrogen as a reaction gas.
A method for manufacturing a semiconductor integrated circuit device, which comprises continuously performing a step of a second plasma removing process using a mixed gas. 2. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the first plasma removal processing and the second plasma removal processing are switched to the point where the resist pattern is about to disappear completely. 3. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the first plasma removal processing and the second plasma removal processing are switched by monitoring a hydrogen emission spectrum. 4. The temperature of the semiconductor substrate during the first plasma removal processing and the second plasma removal processing is 10
The temperature is set to 0 ° C. or higher.
A method for manufacturing the semiconductor integrated circuit device described. 5. The method of manufacturing a semiconductor integrated circuit device according to claim 1, wherein the gas containing hydrogen is a gas having H ₂ O, H or OH groups.