JPH0745079A - Memory card - Google Patents

Abstract

PURPOSE:To prevent the consumption of a battery and the loss of data listed up in a memory by prohibiting the outflow of current from a backup battery in a card to a main body side when the memory card is put into a state of power source off on the main body side while the card is held mounted in the device body. CONSTITUTION:A diode D2 is connected between a connecting pin p1 connected with the positive pole of a power supply voltage Vcc2 on the device body 21 side and a power source line L1 of the memory card 1 at the time of mounting the memory card 1 in the body 21. Inverter circuits 5a, 5b are connected in series between a chip enable terminal bar CE of a RAM 2 and a connecting pin p5 inputted with a chip select signal bar CE and the other end of a pull-up resistor R1 connected to the input terminal of the inverter circuit 5a is connected to the connecting pin p1 described above. As a result, the current outflow from the memory card 1 side to the device body 21 side is completely prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called IC card or the like, which has a built-in readable / writable memory and a backup battery, and is mounted on an electronic computer or the like and used as a data source.

[0002]

2. Description of the Related Art Memory cards, which are so-called IC cards and have a writable / readable memory and a backup battery, have a dramatically increased amount of data that can be processed as compared with magnetic cards. Moreover, since data can be freely written and read, it has been widely used recently as a data source for, for example, an electronic notebook or a laptop electronic computer.

FIG. 3 is a block diagram showing a connection mode of a memory card according to the prior art. The memory card 11 has a built-in RAM (random access memory) 12 in which data can be written and read, and a backup battery 13 realized by a small capacity primary battery such as a button battery. The positive and negative power supply terminals Vc and Vs of the RAM 12 are
Each of them is connected to the power supply line L11 and the ground line L12, and the power supply voltage Vcc11 of the backup battery 13 is applied via the diode D11. RAM 12 has a plurality of address terminals A0-An and a plurality of data terminals D0-Dn
Are connected to the address bus L13 and the data bus L14, respectively.

In this conventional example, a RAM 12 having a low active chip enable terminal / bar CE is used, and a pull-up resistor R11 is used as a power source line L11 and R.
It is connected between the chip enable terminal and the bar CE of the AM 12, and normally keeps the level of the chip enable terminal and the bar CE high, and sets the plurality of address terminals A0 to An and the plurality of data terminals D0 to Dn in a high impedance state. I am trying. A chip select line L15 is connected to the chip enable terminal / bar CE. In addition to the above, the RAM 12 is provided with a plurality of control terminals for read / write signals and a control bus, which are not shown.

At one end of the memory card 11, a connection pin p11 for connecting to an apparatus main body 21 such as an electronic computer.
The connection connector 14 in which .about.p15 are arranged is arranged. Of these, the connection pins p13 and p14 are formed by a plurality of lines corresponding to the bus lines L13 and L14, and the lead wires forming the bus lines are individually connected. The power supply line L11 is connected to the connection pin p11 via the diode D12.
Are connected, and the ground line L12 is connected to the connection pin p12. Further, the chip enable terminal / CE of the RAM 12 is connected to the connection pin p15 via the chip select line L15.

In addition to the connection pins described above, the connection connector 14 is provided with a plurality of connection pins to which a control bus (not shown) is connected, but they are not shown. The diodes D11 and D12 are both diodes for backflow prevention, and the cathode side is commonly the power supply line L.
11 is connected to the memory card 11 to prevent the current from flowing into the backup battery 13 from the device body 21 side to which the memory card 11 is attached and from the backup battery 13 to the device body 21 side.

A device body (hereinafter also referred to as “main body”) 21 such as an electronic notebook or a computer to which a memory card (hereinafter sometimes referred to as “card”) 11 is attached,
A CPU (central processing unit) 22 for controlling writing and reading of data to and from the RAM 12, and a power supply circuit 2
3, a power switch 24, and a connection connector 25 into which the connection connector 14 of the memory card 11 is fitted.

The connection connector 25 has a one-to-one correspondence with the connection pins p11 to p15 of the connection connector 14 on the card 11 side.
Corresponding connection pins s11 to s15 are provided, and when the card 11 is mounted on the main body 21 in the direction of arrow A, the connection connectors 14 and 25 are fitted to each other, so that the card 11
When the RAM 12 on the side of the main body 21 is connected to the CPU 22 on the side of the main body 21 and the power switch 24 on the side of the main body 21 is turned on, the power supply voltage Vcc21 is derived between the power supply pin s11 and the connection pin s12 of the connector 25. . The power supply voltage Vcc21 on the main body 21 side is the power supply voltage Vcc on the memory card 11 side.
It is set to be slightly higher than cc11, and when the main body 21 and the card 11 are connected, the power supply voltage Vcc21 on the main body 21 side is supplied to the card 11.

When the power switch 24 is turned on, the CPU
22 is its own chip enable terminal / bar C after initial setting
The chip enable signal / CE of the same symbol is sent to the RAM 12 by dropping E to the low level, the address bus L13 and the data bus L14 on the card 11 side are electrically connected, and the read / write signal R / W not shown is controlled. To write / read data. When the memory card 11 is removed from the main body 21 after using the card, R
The data written in the AM 12 is backed up by the backup battery 13 thereafter.

FIG. 4 is a diagram showing an electrical configuration of a memory card 11a according to another conventional technique. FIG. 4 is similar to FIG. 3, and corresponding parts are designated by the same reference numerals. In this conventional example, the RAM 12a built in the card 11a includes a high active chip enable terminal CE,
In order to match the body 21 shown in FIG.
The chip enable terminal CE of the AM 12a is connected to the ground line L12 via the pull-down resistor R12, and the inverter circuit 15 is interposed between the chip enable terminal CE and the connection pin p15, that is, the input terminal of the inverter circuit 15, that is, the connection. Pin p15 and power line L
A pull-up resistor R11 is connected between the pull-up resistor R11 and the pull-up resistor R11.
Although not shown, the positive and negative power supply terminals of the inverter circuit 15 are connected to the power supply line L11 and the ground line L12.
Connected to.

In the case of this conventional example, except that the level of the chip select line L15 dropped to the low level on the main body 21 side is inverted by the inverter circuit 15 to match with the high active chip enable terminal CE. This is exactly the same as the conventional example shown in FIG. 3, and the RAM 12a is backed up by the backup battery 13 when the card 11a is pulled out.

[0012]

However, in the conventional technique shown in FIG. 3, the memory card 11 is used even after use.
When the power switch 24 on the main body 21 side is turned off with the main body 21 still attached, a wrap-around line is formed between the chip enable terminal / bar CE of the CPU 22 and the main body 21 via the CPU 22, and the card 11 However, there is a problem that the backup battery 13 of FIG.

Referring to FIG. 3, when the power switch 24 is turned off, the chip enable terminal / bar C of the CPU 22 is turned on.
E is dropped to the ground line internally, so that as shown by the broken line in the figure, a shunt circuit of the backup battery 13 → pull-up resistor R11 → select line L15 → CPU22 → ground line L12 → backup battery 13 is formed. , Current i flows out. For this reason, card 1
When the power switch 24 is turned off with 1 attached,
Even though the card 11 is not used, the backup battery 13 is quickly consumed. When the main body of the device is a portable device such as an electronic notebook, a dry battery is usually used for the power supply circuit 23, and in that case, a similar situation occurs due to the voltage drop of the dry battery.

However, when the main body 21 is an electronic notebook or the like,
It is a very frequent situation that the card 11 is still attached after the power switch 24 is turned off, and the backup battery 13 is exhausted before the user notices it, and it is valuable only when it is ready for the next use. There is a serious problem such as noticing that certain data has been lost. Also in the other conventional example shown in FIG. 4, the current i similarly flows out through the body 21 through the pull-up resistor R11.

The first preventive measure against such a problem is to make the user thoroughly remove the card 11 after use, but such a thing is hopeless.
As a method of blocking the current i, for example, the bus line L
Although a method of inserting a diode into 14 is conceivable, simply inserting a diode is inconvenient because a signal drop or a voltage drop occurs at a low level due to the junction voltage of the diode.

An object of the present invention is to prevent unnecessary consumption of the backup battery even if the power supply from the power supply circuit is cut off while it is still attached to the main body of the apparatus, prolong the life of the backup battery, and protect the data. It is to provide a memory card designed to meet the requirements.

[0017]

SUMMARY OF THE INVENTION The present invention is a memory card which is mounted on a connection connector of an apparatus body such as an electronic computer and used by being supplied with power from a power supply circuit of the apparatus body. A backup battery for backing up the memory, and a plurality of connection pins for connecting to the apparatus main body, and a plurality of data terminals, a control signal terminal, and a power supply terminal of the memory are respectively connected to the connection pins. Between the power supply terminal of the memory and the connection pin to which the positive electrode of the power supply circuit of the device main body is connected when the memory card is attached to the main body of the device. A connecting pin to which a control signal terminal of the memory is connected by inserting and connecting a diode in the direction from the connecting pin to the power supply terminal; A directional circuit formed by active elements is inserted and connected between the connection pin and the control signal terminal, and a connection pin to which the positive electrode of the power supply circuit on the apparatus body side is connected, and an input terminal of the directional circuit. The memory card is characterized in that a potential setting resistor is connected between the two.

[0018]

A memory card according to the present invention is a memory card that is used by being mounted on a main body of an apparatus such as an electronic computer, and includes a memory, a backup battery, and a connector having a plurality of connecting pins. When the memory is attached to the main body, a diode is provided between the connection pin to which the positive electrode of the power supply circuit on the device main body side is connected and the power supply terminal of the memory, in the direction from the connection pin to the power supply terminal of the memory. A directional circuit formed by active elements in a direction in which the signal goes from the connection pin to the control signal terminal, between the connection pin to which the control signal of the memory is input and the control signal terminal of the memory. Further, the other end of the potential setting resistor whose one end is connected to the input terminal of the directional circuit is connected to the connection pin to which the positive electrode of the power supply circuit on the apparatus main body side is connected.

This prevents an undesired current from flowing from the backup battery to the main body of the apparatus. Therefore, even if the power switch on the main unit is turned off with the memory card still attached to the main unit, no current will flow from the backup battery to the main unit. Exhaustion and loss of data stored in memory is prevented.

[0020]

1 is a block diagram showing a connection mode of a memory card according to an embodiment of the present invention. Memory card 1
Has a built-in RAM (random access memory) 2 in which data can be written and read, and a backup battery 3 realized by a small capacity primary battery such as a button battery. Connection pins p1 and p for connecting to the device main body 21 such as a notebook or a computer
A connection connector 4 in which 2, ... Are arranged is attached.

The RAM 2 is provided with a low active chip enable terminal / bar CE which is a signal control terminal, and
The two positive and negative power supply terminals Vc and Vs are connected to the power supply line L1 and the ground line L2, respectively, and the power supply voltage Vcc1 of the backup battery 3 passes through the diode D1.
It is applied between the power supply line L1 and the ground line L2.
The plurality of address terminals A0-An and the plurality of data terminals D0-Dn of the RAM 2 are connected to the corresponding plurality of connection pins p3, p4 of the connection connector 4 via the address bus L3 and the data bus L4, respectively. Power line L1
Is connected to the connecting pin p1 via a diode D2,
The ground line L2 is connected to the connection pin p2.

A connection connector 25 for mounting the memory card 1 is provided on the apparatus main body 21 side, and the connection pins p1 to p5 of the connection connector 4 on the memory card 1 side are provided.
Connection pins s11 to s15, which correspond one-to-one with (however, there are a plurality of connection pins p3 and p4) are provided, and when the memory card 1 is attached to the device main body 21 in the direction of arrow A,
The RAM 2 on the memory card 1 side and the CPU 22 on the apparatus main body 21 side are connected by fitting the connection connectors 4 and 25 together, and the power switch 24 on the main body 21 side is turned on, whereby the power supply circuit on the main body 21 side. 23, the power supply voltage Vcc2 is applied between the connection pins p1 and p2, and the positive electrode of the power supply voltage Vcc2 is transferred to the RAM2 via the diode D2.
The RAM 2 is activated by being connected to the power supply terminal Vc.

The chip enable signal / CE, which is a control signal derived from the CPU 22, is input to the connection pin p5. Between the connection pin p4 and the chip enable terminal / bar CE which is a control signal terminal of the RAM2, a series circuit of inverter circuits 5a and 5b, which is a directional circuit by active elements, is connected and input from the device main body 21 side. The chip select signal and bar CE having the same symbol is the inverter circuit 5
It is input to the chip enable terminal / CE of RAM 2 through the series circuit of a and 5b. The two inverter circuits 5a and 5b are used in series here for the purpose of signal polarity matching. Further, one end of a pull-up resistor R1 which is a potential setting resistor is connected to the input terminal of the inverter circuit 5a at the preceding stage, and the other end of the pull-up resistor R1 is connected to the connection pin p1.

In this embodiment, it should be noted that the connecting pin p
1 and the power supply line L1 on the memory card 1 side, that is, R
A diode D2 is connected between the power supply terminal Vc of AM2 and the RAM2 side from the connection pin p1, and a pull-up resistor R1 is connected between the input terminal of the inverter circuit 5a and the connection pin p1. And the connection pin p5 and the chip enable terminal / bar C of the RAM2.
That is, the inverter circuits 5a and 5b are connected to E.

As a result, current outflow from the power supply line L1 side of the memory card 1 to the device main body 21 side is completely blocked, and the input chip select signal / CE is transmitted without level loss, and the RAM2 side. Current is prevented from flowing out through the connection pin p5.
Further, a pull-down resistor R2 is connected between the connection point between the front-stage inverter circuit 5a and the rear-stage inverter circuit 5b and the ground line L2, and the rear-stage inverter circuit 5b is connected.
Output terminal, that is, the chip enable terminal of RAM2
The bar CE is connected to the power supply line L1 via the second pull-up resistor R3.

Although not shown, the power supply terminal of the inverter circuit 5a is the connection pin p1 and the ground line L2.
The power supply terminal of the inverter circuit 5b is connected to the power supply line L1 and the ground line L2 of the memory card 1. Therefore, when the power switch 24 is turned off or the memory card 1 is pulled out from the apparatus main body 21, the inverter circuits 5a and 5b are deactivated and the backup battery 3 is not consumed. Further, it is obvious that the same effect is produced even when a dry battery or the like is used in the power supply circuit 23 of the apparatus main body 21 and a voltage drop of the dry battery occurs.

The reverse current blocking diode D2 is connected to the connection pin p1.
From the device main body 21 side when the memory card 1 is attached to the device main body 21 because the first pull-up resistor R1 is connected to the connection pin p1. Even if Vcc2 is supplied to the memory card 1 without any trouble and the power switch 24 on the apparatus main body 21 side is turned off with the memory card 1 still attached, the backup battery 3 as shown in the conventional example of FIG. The sneak current i from is blocked by the reverse current blocking diode D2. Therefore, as described above, even when the power switch 24 on the device main body 21 side is turned off with the memory card 1 still mounted. The unnecessary consumption of the backup battery 3 is prevented, the life of the backup battery 3 is extended, and the data stored in the RAM 2 is protected. It is realized.

In this case, the inverter circuits 5a and 5b
Is connected between the chip enable terminal / bar CE of the RAM 2 and the connecting pin p5, no current flows from the chip enable terminal / bar CE to the connecting pin p5. Further, in this case, the power supply voltage Vcc1 of the backup battery 3 is applied to the chip enable terminal / CE via the second pull-up resistor R3, and the input terminal of the inverter 5b is grounded via the pull-down resistor R2. Since the output of the inverter 5b is kept at a high level, the chip enable terminal / bar CE is kept at a high level, and the address terminals A0-An and the data terminals D0-Dn of the RAM 2 are both in a high impedance state and connected. The connection with the pins P3 and P4 (a plurality of these connecting pins are provided) is disconnected. Therefore, the data outflow from the RAM 2 is also prevented.

FIG. 2 is a block diagram showing a connection mode of a memory card according to another embodiment of the present invention. 2 is shown in FIG.
The same reference numerals are given to the same parts. See also FIG.
Corresponds to the conventional example shown in FIG.
The RAM 2a built in the memory card 1a includes a high active chip enable terminal CE. Therefore, the pull-down resistor R2 is connected between the chip enable terminal CE and the ground line L2.

This embodiment is different from the above-mentioned prior art in that the other end of the pull-up resistor R1 connected to the input terminal of the inverter circuit 5 has a connection pin p similar to the above-mentioned embodiment.
1 and the power supply terminal of the inverter circuit 5 is pin p1.
Is connected to the ground line L2. Therefore, also in this case, the backflow blocking diode D2 blocks the sneak current from the backup battery 3 to the apparatus main body 21 side, the power switch 24 of the apparatus main body 21 is turned off with the memory card 1 still attached, and the select line L5 is selected. Even if the voltage drops to a low level, current is prevented from flowing from the backup battery 3 to the device main body 21 side.

Further, by the inverter circuit 5, a RAM
The current from 2a to the device main body 21 side is blocked, and the pull-down resistor R3 further prevents the chip enable terminal CE.
Is kept at a low level, a plurality of address terminals A0
-An and data terminals D0-Dn are all in a high impedance state, and data outflow from RAM 2a is also blocked. This prevents unnecessary consumption of the backup battery 3, and protects the data stored in the RAM 2a and extends the life of the battery.

[0032]

As described above, in the memory card according to the present invention, the chip enable terminal which is the control signal terminal of the built-in memory is connected to the directional circuit by the active element, and the memory card is mounted. A device such as a computer allows a chip select signal, which is a control signal, to be input to a control signal terminal of the memory via the directional circuit, and a potential connected to an input terminal of the directional circuit. The other end of the setting resistor is connected to a connection pin in the connection connector, to which the positive electrode of the power supply voltage on the device body side is connected, and from the connection pin to the power supply terminal of the memory, from the connection pin to the power supply terminal. The diode is connected in the direction to prevent the current from flowing from the backup battery built in the memory card to the main body of the device.

As a result, a backup battery is generated when the power is turned off on the main body of the apparatus with the memory card still attached, or when the main body is powered by a dry battery or the like and a voltage drop occurs. Current is prevented from flowing from the device to the main body of the device, thus preventing unnecessary consumption of the backup battery, preventing loss of valuable data stored in the memory of the memory card, and extending the life of the backup battery. Is realized,
The effect is great.

[Brief description of drawings]

FIG. 1 is a block diagram showing a connection mode of a memory card according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a connection mode of a memory card according to another embodiment of the present invention.

FIG. 3 is a block diagram showing a connection mode of a memory card according to a conventional technique.

FIG. 4 is a block diagram showing a connection mode of a memory card according to another conventional technique.

[Explanation of symbols]

 1, 1a memory card 2, 2a RAM (random access memory) 3 backup battery 4 connection connector 5, 5a, 5b inverter circuit 21 device main body 22 CPU (central processing unit) 23 main body side power supply circuit 24 power switch 25 main body side connection connector A Memory card mounting direction CE High active chip enable terminal Bar CE Low active chip enable terminal D1, D2 Reverse current blocking diode R1, R3 Pull up resistor R2 Pull down resistor Vcc1 Card side power supply voltage Vcc2 Main body side power supply voltage

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location 7165-5B G06F 1/00 332 A

Claims (1)

[Claims] 1. A memory card, which is attached to a connector of an apparatus body such as an electronic computer and used by being supplied with power from a power supply circuit of the apparatus body, having a readable / writable memory and a backup for backing up the memory. A connection in which a battery and a plurality of connection pins for connecting to the apparatus body are provided, and a plurality of data terminals of the memory, a control signal terminal, and a power supply terminal are individually connected to the connection pins. A connector, and between a power supply terminal of the memory and a connection pin to which a positive electrode of a power supply circuit of the device main body is connected when the memory card is attached to the main body of the device, the power supply from the connection pin. A diode is inserted and connected in the direction toward the terminal, and a signal is connected between the connection pin to which the control signal terminal of the memory is connected and the control signal terminal. From the control signal terminal to the control signal terminal by inserting and connecting the directional circuit by the active element, the positive terminal of the power supply circuit of the main body side of the connection pin and the input terminal of the directional circuit to the potential setting resistor. Memory card characterized by connecting.