JP2952136B2 - Memory card - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card called a so-called IC card, which has a built-in readable / writable memory and a backup battery, is mounted on an electronic computer or the like, and is used as a data source.

[0002]

2. Description of the Related Art A so-called IC card or the like, in which a writable / readable memory and a memory card with a built-in backup battery, can significantly increase the amount of data that can be processed as compared with a magnetic card or the like. In addition, since data can be freely written and read, it has recently been widely used as a data source for electronic notebooks and laptop computers, for example.

FIG. 3 is a block diagram showing a connection mode of a conventional memory card. The memory card 11 has a built-in RAM (random access memory) 12 to which data can be written and read and a backup battery 13 realized by a small-capacity primary battery such as a button battery. The positive and negative power supply terminals Vc and Vs of the RAM 12 are
Each is connected to the power supply line L11 and the ground line L12, and the power supply voltage Vcc11 of the backup battery 13 is applied via the diode D11. A plurality of address terminals A0 to An and a plurality of data terminals D0 to Dn of the RAM 12
Are connected to an address bus L13 and a data bus L14, respectively.

In this conventional example, a RAM 12 having a low active chip enable terminal / bar CE is used, and a pull-up resistor R11 is connected to power supply lines L11 and R11.
AM12 is connected between the chip enable terminal and the bar CE, and the level of the chip enable terminal and the bar CE is normally kept high, and the plurality of address terminals A0 to An and the plurality of data terminals D0 to Dn are in a high impedance state. And A chip select line L15 is connected to the chip enable terminal / bar CE. In addition to the above, the RAM 12 is provided with a plurality of control terminals such as read / write signals, and is connected to a control bus, but these are not shown.

[0005] One end of the memory card 11 has a connection pin p11 for connecting to an apparatus body 21 such as a computer.
To p15 are provided. Of these, the connection pins p13 and p14 are formed of a plurality of pins corresponding to the bus lines L13 and L14, and lead wires forming the bus lines are individually connected. The power supply line L11 is connected to the connection pin p11 via a diode D12.
Are connected, and a ground line L12 is connected to the connection pin p12. A chip enable terminal / CE of the RAM 12 is connected to the connection pin p15 via the chip select line L15.

The connection connector 14 is provided with a plurality of connection pins to which a control bus (not shown) is connected in addition to the connection pins, but these are not shown. Each of the diodes D11 and D12 is a diode for preventing backflow, and has a common power supply line L on the cathode side.
11, and prevents current from flowing into the backup battery 13 from the device main body 21 to which the memory card 11 is inserted, and prevents current from flowing from the backup battery 13 to the device main body 21.

[0007] An apparatus body (hereinafter, also referred to as "main body") 21 such as an electronic notebook or a computer to which a memory card (hereinafter, also referred to as "card") 11 is attached includes:
A CPU (central processing unit) 22 for controlling writing and reading of data to and from the RAM 12;
3, a power switch 24, and a connection connector 25 to which the connection connector 14 of the memory card 11 is fitted.

The connector 25 has a one-to-one correspondence with the connection pins p11 to p15 of the connector 14 on the card 11 side.
Corresponding connection pins s11 to s15 are provided, and when the card 11 is mounted on the main body 21 in the direction of arrow A, the connection of the connection connectors 14 and 25 causes the card 11 to be fitted.
When the power supply switch 24 of the main body 21 is turned on, the power supply voltage Vcc21 is derived between the power supply pin s11 of the connector 25 and the connection pin s12. . The power supply voltage Vcc21 on the main body 21 side is the power supply voltage Vcc on the memory card 11 side.
The power supply voltage Vcc21 of the main body 21 is supplied to the card 11 when the main body 21 and the card 11 are connected.

When the power switch 24 is turned on, the CPU
22 is its own chip enable terminal / bar C after initial setting.
E is lowered to a low level, a chip enable signal / CE of the same symbol is sent to the RAM 12 to make the address bus L13 and the data bus L14 of the card 11 conductive, and a read / write signal R / W (not shown) is controlled. To write / read data. When the memory card 11 is removed from the main body 21 after using the card, R
The data written in the AM 12 is subsequently backed up by the backup battery 13.

FIG. 4 is a diagram showing an electrical configuration of a memory card 11a according to another prior art. FIG. 4 is similar to FIG. 3 and corresponding parts are denoted by the same reference numerals. In this conventional example, the RAM 12a incorporated in the card 11a has a high active chip enable terminal CE,
For alignment with the body 21 shown in FIG.
The chip enable terminal CE of the AM 12a is connected to a ground line L12 via a pull-down resistor R12, and an inverter circuit 15 is interposed between the chip enable terminal CE and the connection pin p15 to provide an input terminal of the inverter circuit 15, that is, the connection terminal. Pin p15 and power supply line L
11, a pull-up resistor R11 is connected.
Although not shown, the positive and negative power supply terminals of the inverter circuit 15 are connected to a power supply line L11 and a ground line L12.
And connected to.

In the case of this conventional example, the level of the chip select line L15, which has been lowered to the low level on the main body 21 side, is inverted by the inverter circuit 15 so as to match with the high active chip enable terminal CE. This is exactly the same as the conventional example shown in FIG. 3, and when the card 11a is pulled out, the RAM 12a is backed up by the backup battery 13.

[0012]

However, in the prior art shown in FIG.
When the power switch 24 of the main body 21 is turned off while the main body 21 is mounted, a wraparound line is formed between the chip enable terminal / bar CE of the CPU 22 and the main body 21 via the CPU 22 and the card 11 This causes a problem that the consumption of the backup battery 13 is accelerated.

Referring to FIG. 3, when the power switch 24 is turned off, the chip enable terminal
E is internally dropped to the ground line, so that a wraparound circuit is formed for the backup battery 13 → pull-up resistor R11 → select line L15 → CPU 22 → ground line L12 → backup battery 13 as shown by the broken line in the figure. , And the current i flows out. Therefore, card 1
When the power switch 24 is turned off with the 1 attached,
Although the card 11 is not used, the consumption of the backup battery 13 is expedited. When the main body of the apparatus is a portable device such as an electronic organizer, a dry battery is usually used for the power supply circuit 23. In this case, a similar situation occurs due to a voltage drop of the dry battery.

However, when the main body 21 is an electronic organizer or the like,
A situation in which the card 11 is still mounted after the power switch 24 is turned off is a situation that can occur very frequently, and the backup battery 13 is consumed while the user does not notice it. A serious problem occurs, such as noticing that important data has been lost. In the other conventional example shown in FIG. 4, the current i similarly flows out through the main body 21 through the pull-up resistor R11.

The first measure for preventing such inconvenience is to ensure that the user always removes the card 11 after use. However, such a measure cannot be expected.
As a method for blocking the current i, for example, the bus line L
Although a method of inserting a diode into the device 14 is conceivable, simply inserting a diode is inconvenient because a signal drop or a voltage drop occurs at a low level due to a junction voltage of the diode.

An object of the present invention is to prevent the backup battery from being unnecessarily consumed even when the power supply from the power supply circuit is cut off while the battery is mounted on the apparatus main body. The object of the present invention is to provide a memory card designed to achieve the above.

[0017]

SUMMARY OF THE INVENTION The present invention relates to a memory card which is mounted on a connector of an apparatus main body such as an electronic computer and is used by being supplied with power from a power supply circuit of the apparatus main body. And a backup battery for backing up the memory, and a plurality of connection pins for connecting to the device main body, wherein a plurality of data terminals, a control signal terminal, and a power supply terminal of the memory are connected to the connection pins, respectively. A connection connector that is individually connected to a power supply terminal of the memory and a power supply terminal of the memory when the memory card is mounted on the device body. A connection pin to which a control signal terminal of the memory is connected by inserting and connecting a diode in a direction from the connection pin to the power supply terminal; During, signal directionality circuit insert connection by an active element in a direction toward the control signal terminal from the connection pin, the input terminal of the connecting pins and before Symbol directional circuit the positive electrode is connected to the power supply circuit of the apparatus body Between and
Negative electrode of the backup battery and output terminal of the directional circuit
And a potential setting resistor connected to the memory card.

[0018]

A memory card according to the present invention is a memory card used by being mounted on an apparatus main body such as a computer, which comprises a memory, a backup battery, and a connection connector provided with a plurality of connection pins. When the memory is mounted on the main body, a diode is provided between the connection pin to which the positive electrode of the power supply circuit on the apparatus main body side is connected and the power supply terminal of the memory in a direction from the connection pin to the power supply terminal of the memory. And connecting a directional circuit by an active element between a connection pin to which a control signal of the memory is input and a control signal terminal of the memory in a direction in which the signal goes from the connection pin to the control signal terminal. Further, the other end of the potential setting resistor having one end connected to the input terminal of the directional circuit is connected to a connection pin to which the positive electrode of the power supply circuit on the device main body side is connected.

This prevents an undesired current from flowing out of the backup battery to the apparatus body. Therefore, even if the power switch on the device main body is turned off while the memory card is mounted on the device main body side, no current flows from the backup battery to the device main body side, so that the backup battery is not used when the memory card is not used. Wear and loss of data stored in the memory are prevented.

[0020]

FIG. 1 is a block diagram showing a connection mode of a memory card according to an embodiment of the present invention. Memory card 1
Has a built-in RAM (random access memory) 2 in which data can be written and read, and a backup battery 3 realized by a small-capacity primary battery such as a button battery. Connection pins p1 and p for connecting to an apparatus body 21 such as a notebook or a computer
A connection connector 4 provided with 2,... Is attached.

The RAM 2 has a low-active chip enable terminal / bar CE as a signal control terminal.
2 are connected to a power supply line L1 and a ground line L2, respectively, and the power supply voltage Vcc1 of the backup battery 3 is connected via a diode D1.
The voltage is applied between the power supply line L1 and the ground line L2.
The plurality of address terminals A0 to An and the plurality of data terminals D0 to Dn of the RAM 2 are connected to the corresponding plurality of connection pins p3 and p4 of the connection connector 4 via the address bus L3 and the data bus L4, respectively. Power line L1
Is connected to a connection pin p1 via a diode D2,
The ground line L2 is connected to the connection pin p2.

A connection connector 25 for mounting the memory card 1 is provided on the apparatus main body 21 side, and connection pins p1 to p5 of the connection connector 4 on the memory card 1 side are provided.
The connection pins s11 to s15 are provided in one-to-one correspondence with the connection pins p3 and p4. When the memory card 1 is mounted on the apparatus main body 21 in the direction of arrow A,
The RAM 2 of the memory card 1 and the CPU 22 of the apparatus main body 21 are connected by fitting the connection connectors 4 and 25 together, and when the power switch 24 of the main body 21 is turned on, the power circuit of the main body 21 is turned on. 23, a power supply voltage Vcc2 is applied between the connection pins p1 and p2, and the positive electrode of the power supply voltage Vcc2 is connected to the RAM2 via the diode D2.
, And the RAM 2 is activated.

A chip enable signal / CE, which is a control signal derived from the CPU 22, is input to a connection pin p5. A series circuit of inverter circuits 5a and 5b, which are directional circuits using active elements, is connected between the connection pin p4 and the chip enable terminal / bar CE which is a control signal terminal of the RAM 2, and is input from the device body 21 side. The chip select signal / CE of the same symbol is connected to the inverter circuit 5
The signal is input to the chip enable terminal / CE of the RAM 2 via the series circuit of a and 5b. Here, the reason why the two inverter circuits 5a and 5b are used in series is to match signal polarities. Further, one end of a pull-up resistor R1, which is a potential setting resistor, is connected to the input terminal of the inverter circuit 5a at the preceding stage, and the other end of the pull-up resistor R1 is connected to the connection pin p1.

It should be noted in this embodiment that the connection pin p
1 and the power supply line L1 on the memory card 1 side, that is, R
A diode D2 is connected between the power supply terminal Vc of AM2 and the connection pin p1 toward the RAM2, and a pull-up resistor R1 is connected between the input terminal of the inverter circuit 5a and the connection pin p1. And the connection pin p5 and the chip enable terminal
E and the inverter circuits 5a and 5b are connected.

As a result, the current outflow from the power supply line L1 of the memory card 1 to the device main body 21 is completely prevented, and the input chip select signal / CE is transmitted without a level loss, and Out of the current through the connection pin p5.
Further, a pull-down resistor R2 is connected between a connection point between the preceding inverter circuit 5a and the succeeding inverter circuit 5b and the ground line L2, and the subsequent inverter circuit 5b is connected.
Output terminal, that is, the chip enable terminal of the RAM 2
Bar CE is connected to power supply line L1 via second pull-up resistor R3.

Although not shown, the power supply terminal of the inverter circuit 5a is connected to the connection pin p1 and the ground line L2.
And the power supply terminal of the inverter circuit 5b is connected to the power supply line L1 and the ground line L2 of the memory card 1. Therefore, when the power switch 24 is turned off or the memory card 1 is removed from the device main body 21, the inverter circuits 5a and 5b are deactivated and the backup battery 3 is not consumed. It is obvious that the same effect is obtained when a dry battery or the like is used for the power supply circuit 23 of the apparatus main body 21 and a voltage drop of the dry battery occurs.

The backflow preventing diode D2 is connected to the connection pin p1.
Is connected to the power line L1 and the first pull-up resistor R1 is connected to the connection pin p1, so that when the memory card 1 is mounted on the device main body 21, the power supply voltage is applied from the device main body 21 side. Vcc2 is supplied to the memory card 1 without any trouble, and even if the power switch 24 of the apparatus main body 21 is turned off while the memory card 1 is mounted, the backup battery 3 as shown in the conventional example of FIG. Will be blocked by the backflow prevention diode D2. Therefore, even if the power switch 24 on the device body 21 is turned off with the memory card 1 mounted as described above, In addition, unnecessary consumption of the backup battery 3 is prevented, the life of the backup battery 3 is extended, and the data stored in the RAM 2 is protected. It is realized.

In this case, the inverter circuits 5a, 5b
Is connected between the chip enable terminal / bar CE of RAM2 and the connection pin p5, no current flows from the chip enable terminal / bar CE to the connection pin p5. Further, in this case, the power supply voltage Vcc1 of the backup battery 3 is applied to the chip enable terminal / CE via the second pull-up resistor R3, and the input terminal of the inverter 5b is grounded via the pull-down resistor R2. Therefore, since the output of the inverter 5b is kept at a high level, the chip enable terminal / CE is kept at a high level, and the address terminals A0 to An and the data terminals D0 to Dn of the RAM 2 are all in a high impedance state. The connection with the pins P3 and P4 (each of which has a plurality of connection pins) is disconnected. Therefore, outflow of data from the RAM 2 is also prevented.

FIG. 2 is a block diagram showing a connection mode of a memory card according to another embodiment of the present invention. FIG. 2 shows FIG.
And the same parts are denoted by the same reference numerals. FIG. 2
Corresponds to the conventional example shown in FIG.
The RAM 2a incorporated in the memory card 1a has a high active chip enable terminal CE. Therefore, a pull-down resistor R2 is connected between the chip enable terminal CE and the ground line L2.

This embodiment differs from the prior art in that the other end of the pull-up resistor R1 connected to the input terminal of the inverter circuit 5 is connected to the connection pin p similarly to the above-described embodiment.
1 and the power supply terminal of the inverter circuit 5 is connected to the pin p1
And the ground line L2. Therefore, also in this case, the sneak current from the backup battery 3 to the device main body 21 side is prevented by the backflow prevention diode D2, the power switch 24 of the device main body 21 is turned off with the memory card 1 being mounted, and the select line L5 Is kept low, the outflow of current from the backup battery 3 to the device body 21 is prevented.

The inverter circuit 5 controls the RAM
2a is prevented from flowing out to the device body 21 side, and the chip enable terminal CE is pulled down by a pull-down resistor R3.
Is maintained at a low level, a plurality of address terminals A0
To An and the data terminals D0 to Dn are all in a high impedance state, and the data outflow from the RAM 2a is also prevented. As a result, unnecessary consumption of the backup battery 3 is prevented, and protection of data stored in the RAM 2a and extension of the life of the battery are realized.

[0032]

As described above, in the memory card according to the present invention, the directional circuit using the active element is connected to the chip enable terminal which is the control signal terminal of the built-in memory, and the electronic card on which the memory card is mounted is mounted. A chip select signal, which is a control signal, is input to a control signal terminal of the memory from an apparatus body such as a computer via the directional circuit, and a potential connected to an input terminal of the directional circuit. The other end of the setting resistor is connected to a connection pin in the connection connector to which the positive electrode of the power supply voltage on the device body side is connected, and further between the connection pin and the power supply terminal of the memory, from the connection pin to the power supply terminal. A diode is connected in the direction to prevent current from flowing out of the backup battery contained in the memory card to the device body.

Thus, a backup battery generated when the power is turned off on the apparatus main body side with the memory card inserted, or when the power supply on the main body side is a dry battery or the like and a voltage drop occurs. From the battery to the main unit, preventing unnecessary consumption of the backup battery, preventing loss of valuable data stored in the memory of the memory card, and extending the life of the backup battery. Is realized,
The effect is great.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a connection mode of a memory card according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a connection mode of a memory card according to another embodiment of the present invention.

FIG. 3 is a block diagram showing a connection mode of a conventional memory card.

FIG. 4 is a block diagram showing a connection mode of a memory card according to another related art.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1, 1a Memory card 2, 2a RAM (random access memory) 3 Backup battery 4 Connector 5, 5a, 5b Inverter circuit 21 Main unit 22 CPU (Central processing unit) 23 Main unit side power supply circuit 24 Power switch 25 Main unit side connector A Attaching direction of memory card CE High active chip enable terminal CE Low active chip enable terminal D1, D2 Backflow prevention diode R1, R3 Pull-up resistor R2 Pull-down resistor Vcc1 Card side power supply voltage Vcc2 Body side power supply voltage

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int.Cl. ⁶ , DB name) G11C 5/00-5/14 G06F 1/26 G06F 1/32 G11C 11/413 G06K 17/00-19 / 00

Claims (1)

(57) [Claims] 1. A memory card which is attached to a connector of an apparatus main body such as an electronic computer and is used by being supplied with power from a power supply circuit of the apparatus main body, wherein: a readable / writable memory; and a backup for backing up the memory A connection in which a battery, a plurality of connection pins for connecting to the device main body are provided, and a plurality of data terminals, a control signal terminal, and a power supply terminal of the memory are individually connected to the connection pins. A connector between the power supply terminal of the memory and a connection pin to which a positive electrode of a power supply circuit of the device main body is connected when the memory card is inserted into the device main body. A diode is inserted and connected in a direction toward the terminal, and a signal is connected between a connection pin to which a control signal terminal of the memory is connected and the control signal terminal. Inserted and connected direction circuit by active elements in a direction towards the al control signal terminal, connecting pins positive electrode of the power supply circuit of the apparatus main body side is connected
Between the input terminal of the pre-Symbol directional circuit when, and the back
A memory card comprising a potential setting resistor connected between a negative electrode of an up battery and an output terminal of the directional path .