JPH0738301A - Cross circuit of strip line - Google Patents

Cross circuit of strip line

Info

Publication number
JPH0738301A
JPH0738301A JP5202078A JP20207893A JPH0738301A JP H0738301 A JPH0738301 A JP H0738301A JP 5202078 A JP5202078 A JP 5202078A JP 20207893 A JP20207893 A JP 20207893A JP H0738301 A JPH0738301 A JP H0738301A
Authority
JP
Japan
Prior art keywords
node
input
output
wavelength line
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5202078A
Other languages
Japanese (ja)
Inventor
Katsuya Nagashima
克哉 長島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5202078A priority Critical patent/JPH0738301A/en
Priority to US08/278,162 priority patent/US5432485A/en
Priority to GB9414861A priority patent/GB2280548B/en
Publication of JPH0738301A publication Critical patent/JPH0738301A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00Coupling devices of the waveguide type
    • H01P5/12Coupling devices having more than two ports
    • H01P5/16Conjugate devices, i.e. devices having at least one port decoupled from one other port
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6605High-frequency electrical connections
    • H01L2223/6627Waveguides, e.g. microstrip line, strip line, coplanar line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1903Structure including wave guides
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09218Conductive traces
    • H05K2201/09245Crossing layout
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09218Conductive traces
    • H05K2201/09254Branched layout

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Waveguide Connection Structure (AREA)
  • Waveguides (AREA)

Abstract

PURPOSE:To obtain the circuit which can execute crossing of two pieces of strip lines by the same layer, can facilitate the wiring of a multilayer printed board, and can reduce the number of layers by connecting all nodal points by a 1/4 wavelength line in the cross circuit of two inputs and two outputs. CONSTITUTION:A first input nodal point IN1 to which a first input signal is inputted is connected by a 1/4 wavelength line to a first and a second nodal points N1, N2, respectively, and a first nodal point N1, and a second nodal point N2 are connected to a second input nodal point IN2 and a fifth nodal point N5, respectively by the 1/4 wavelength line, and to a second output nodal point O2 and a fifth nodal N5, respectively by the 1/4 wavelength line, respectively. In such a way, by constituting this circuit so that each nodal point N1-N5 is all connected by the 1/4 wavelength line, a first and a second input signals of the same frequency inputted to a first and a second input nodal points IN1, IN2, respectively appear only in a first and a second output nodal points O1, O2, respectively, and are outputted as a first and a second output signals, respectively. In such a way, two pieces of strip lines can be subjected to level crossing by one layer.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はストリップ線路の交差回
路に係り、特に携帯無線通信機などに使用される多層プ
リント板におけるストリップ線路の交差回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a stripline crossing circuit, and more particularly to a stripline crossing circuit in a multilayer printed circuit board used in a portable radio communication device or the like.

【0002】[0002]

【従来の技術】携帯無線電話機などの高周波回路では多
層プリント板が広く用いられている。多層プリント板
は、基板の上下面に部品実装パターン、内層に配線パタ
ーン等を設けることが可能であり、高周波回路の小型化
に大きく寄与する(特開昭63−308999号公報、
特開平3−129895号公報)。
2. Description of the Related Art Multilayer printed boards are widely used in high frequency circuits such as portable radio telephones. The multilayer printed board can be provided with component mounting patterns on the upper and lower surfaces of the board and wiring patterns on the inner layer, which greatly contributes to downsizing of the high frequency circuit (Japanese Patent Laid-Open No. 63-308999).
JP-A-3-129895).

【0003】このような多層プリント板において、配線
を交差させる場合は、互いに交流的に結合しないように
間隔を設けて立体交差させる必要があった。
In such a multilayer printed board, when the wirings are crossed with each other, it is necessary to provide a space between the wirings so as not to be AC-coupled to each other.

【0004】図5は、従来の内層ストリップ線路の交差
回路の一例を示す模式的斜視図である。同図に示すよう
に、ある層L1で2本の線路101及び102が交差さ
せる場合には、一方の線路が他方と交流的に結合しない
ように、線路101をスルーホール103及び104を
通して他層L2の線路105に接続し、他方の線路10
2の下層あるいは上層を迂回する立体交差構造が採用さ
れていた。
FIG. 5 is a schematic perspective view showing an example of a conventional cross circuit of inner layer strip lines. As shown in the figure, when the two lines 101 and 102 intersect in a certain layer L1, the line 101 is connected to the other layers through the through holes 103 and 104 so that one line is not AC-coupled with the other line. L2 is connected to the line 105, and the other line 10
A grade separation structure that bypasses the lower or upper layer of No. 2 was adopted.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、上記従
来の交差回路では、多層プリント板の層数が増大し、更
に下層L2の配線を制限することにもなる。また、1本
の内層ストリップ線路を複数層に分けて配線するため
に、経路が複雑化し、配線の形成が困難となる。
However, in the above-described conventional crossing circuit, the number of layers of the multilayer printed board increases, and the wiring of the lower layer L2 is also limited. Further, since one inner layer strip line is divided into a plurality of layers for wiring, the route becomes complicated and it becomes difficult to form the wiring.

【0006】そこで、本発明の目的は、2本のストリッ
プ線路の交差を同一層で行い、多層プリント板の配線の
容易化及び層数の削減を可能にする交差回路を提供する
ことにある。
Therefore, an object of the present invention is to provide an intersecting circuit which allows two strip lines to intersect each other in the same layer to facilitate wiring of a multilayer printed board and reduce the number of layers.

【0007】[0007]

【課題を解決するための手段】本発明は、多層プリント
板の1層において、第1の入力節点に入力した第1信号
が第1の出力節点から出力され、第2の入力節点に入力
した同一周波数の第2信号が第2の出力節点から出力さ
れるストリップ線路の交差回路である。
According to the present invention, in one layer of a multilayer printed board, a first signal inputted to a first input node is outputted from a first output node and inputted to a second input node. It is a stripline crossing circuit in which the second signal of the same frequency is output from the second output node.

【0008】即ち、前記第1の入力節点及び第1節点の
間と前記第1節点及び前記第2の入力節点の間とがそれ
ぞれ1/4波長線路で接続され、前記第1の入力節点及
び第2節点の間と前記第2節点及び前記第2の出力節点
の間とがそれぞれ1/4波長線路で接続され、前記第2
の入力節点及び第3節点の間と前記第3節点及び前記第
1の出力節点の間とがそれぞれ1/4波長線路で接続さ
れ、前記第1の出力節点及び第4節点の間と前記第4節
点及び前記第2の出力節点の間とがそれぞれ1/4波長
線路で接続され、前記第1節点及び第5節点の間と前記
第5節点及び前記第4節点の間とがそれぞれ1/4波長
線路で接続され、且つ、前記第2節点及び前記第5節点
の間と前記第5節点及び前記第3節点の間とがそれぞれ
1/4波長線路で接続されている、ことを特徴とする。
That is, the first input node and the first node and the first node and the second input node are respectively connected by a quarter wavelength line, and the first input node and the first input node are connected. The second node and the second node and the second output node are respectively connected by a quarter wavelength line, and the second node
Between the input node and the third node and between the third node and the first output node are respectively connected by a ¼ wavelength line, and between the first output node and the fourth node and between the first node and the third node. The four nodes and the second output node are connected to each other by a quarter wavelength line, and the first node and the fifth node are connected to each other and the fifth node and the fourth node are connected to one another, respectively. A four-wavelength line is connected, and the second node and the fifth node and the fifth node and the third node are respectively connected by a quarter-wave line. To do.

【0009】[0009]

【作用】第1入力節点に入力した第1信号は第1出力節
点のみに現れ、第2入力節点に入力した第2信号は第2
出力節点のみに現れる。
The first signal input to the first input node appears only at the first output node, and the second signal input to the second input node is the second signal.
Appears only at output nodes.

【0010】[0010]

【実施例】以下、本発明の実施例を図面を参照しながら
説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0011】図1は、本発明による交差回路の一実施例
を構成を示す模式的回路図である。
FIG. 1 is a schematic circuit diagram showing the construction of an embodiment of a cross circuit according to the present invention.

【0012】同図に示す交差回路は各節点間が全て1/
4波長(λ/4)線路で接続された構成を有する。即
ち、第1入力信号が入力する第1入力節点IN1は、第
1節点N1及び第2節点N2とそれぞれ1/4波長線路
で接続され、第1節点N1は第2入力節点IN2及び第
5節点N5とそれぞれ1/4波長線路で接続され、第2
節点N2は第2出力節点O2及び第5節点N5とそれぞ
れ1/4波長線路で接続されている。更に、第5節点N
5は第3節点及び第4節点にそれぞれ1/4波長線路で
接続され、第3節点N3は第2入力節点IN2及び第1
出力節点O1とそれぞれ1/4波長線路で接続され、第
4節点N4は第2出力節点O2及び第1出力節点O1と
それぞれ1/4波長線路で接続されている。
In the crossing circuit shown in the figure, the distance between nodes is 1 /
It has a configuration of being connected by a four-wavelength (λ / 4) line. That is, the first input node IN1 to which the first input signal is input is connected to the first node N1 and the second node N2 by ¼ wavelength line, respectively, and the first node N1 is the second input node IN2 and the fifth node N2. It is connected to N5 by 1/4 wavelength line,
The node N2 is connected to the second output node O2 and the fifth node N5 by a 1/4 wavelength line, respectively. Furthermore, the fifth node N
5 is connected to the third node and the fourth node by a quarter wavelength line, respectively, and the third node N3 is the second input node IN2 and the first node N3.
The output node O1 is connected to each of the quarter wavelength lines, and the fourth node N4 is connected to the second output node O2 and the first output node O1 to each one quarter wavelength line.

【0013】このように、各節点間を全て1/4波長線
路で接続した構成にすることで、第1入力節点IN1と
第2入力節点IN2とにそれぞれ入力した同一周波数の
第1及び第2入力信号は、それぞれ第1及び第2出力節
点O1及びO2にのみ現れ、それぞれ第1及び第2出力
信号として出力する。
As described above, by connecting all the nodes by the ¼ wavelength line, the first and second input nodes IN1 and IN2 of the same frequency respectively input to the first input node IN1 and the second input node IN2. The input signals appear only at the first and second output nodes O1 and O2, respectively, and are output as the first and second output signals, respectively.

【0014】従って、図1に示す交差回路は、多層プリ
ント板における1つの層で2本のストリップ線路を平面
交差させることができる。
Therefore, the crossing circuit shown in FIG. 1 is capable of crossing two strip lines in one plane in a multilayer printed board.

【0015】図2は本実施例の交差回路の平面図であ
り、図3は本実施例を用いたストリップ線路の接続状態
を示す模式的斜視図である。
FIG. 2 is a plan view of the cross circuit of the present embodiment, and FIG. 3 is a schematic perspective view showing the connection state of the strip line according to the present embodiment.

【0016】図3において、多層プリント板の誘電体層
1上に4本のストリップ線路3〜6が本実施例の交差回
路2によって接続されている。ストリップ線路3を伝わ
ってきた信号S1は交差回路2によってストリップ線路
4にのみ伝達され、ストリップ線路5を伝わってきた信
号S2は交差回路2によってストリップ線路6にのみ伝
達される。
In FIG. 3, four strip lines 3 to 6 are connected on a dielectric layer 1 of a multilayer printed board by a cross circuit 2 of this embodiment. The signal S1 transmitted through the strip line 3 is transmitted only to the strip line 4 by the cross circuit 2, and the signal S2 transmitted through the strip line 5 is transmitted only to the strip line 6 by the cross circuit 2.

【0017】ただし、多層板における誘電体層1は、交
差回路2が多くの不連続節点を有していることから、各
種高周波的影響を除くために細線化や誘電体低損失化の
対策を施すことが望ましい。
However, since the crossing circuit 2 has many discontinuous nodes in the dielectric layer 1 in the multilayer board, measures for thinning the wire and reducing the loss of the dielectric are taken in order to eliminate various high-frequency influences. It is desirable to apply.

【0018】なお、本発明は図1に示す形状に限定され
るものではなく、同様に全節点間が1/4波長線路で接
続されたものであればよく、例えば図4に示す形状も考
えられる。
Note that the present invention is not limited to the shape shown in FIG. 1, but similarly, all the nodes may be connected by a 1/4 wavelength line. For example, the shape shown in FIG. 4 is also considered. To be

【0019】[0019]

【発明の効果】以上説明したように、本発明による交差
回路は、2入力2出力の交差回路において全節点間を1
/4波長線路で接続することによって、第1入力節点に
入力した第1信号は第1出力節点のみに現れ、第2入力
節点に入力した第2信号は第2出力節点のみに現れる方
向性結合を実現できる。これにより、2本のストリップ
線路を平面交差させることが可能となり、他の層を介し
て迂回する必要がないために、多層プリント板の層数が
増加しない、配線が容易となる、更に1層当たりの配線
効率が向上する、等の効果を有する。
As described above, the crossing circuit according to the present invention has a 2-input 2-output crossing circuit in which every node is 1
By connecting with a / 4 wavelength line, the first signal input to the first input node appears only at the first output node, and the second signal input at the second input node appears only at the second output node Directional coupling Can be realized. As a result, the two strip lines can be made to intersect each other in a plane, and since there is no need to make a detour via another layer, the number of layers of the multilayer printed board does not increase, wiring is facilitated, and one layer is further provided. This has the effect of improving the wiring efficiency per hit.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による交差回路の一実施例を構成を示す
模式的回路図である。
FIG. 1 is a schematic circuit diagram showing a configuration of an embodiment of a cross circuit according to the present invention.

【図2】本実施例の交差回路の平面図である。FIG. 2 is a plan view of a cross circuit according to the present embodiment.

【図3】本実施例を用いたストリップ線路の接続状態を
示す模式的斜視図である。
FIG. 3 is a schematic perspective view showing a connection state of strip lines according to the present embodiment.

【図4】本発明による交差回路の他の実施例を構成を示
す模式的回路図である。
FIG. 4 is a schematic circuit diagram showing the configuration of another embodiment of the cross circuit according to the present invention.

【図5】従来の内層ストリップ線路の交差回路の一例を
示す模式的斜視図である。
FIG. 5 is a schematic perspective view showing an example of a conventional cross circuit of inner layer strip lines.

【符号の説明】[Explanation of symbols]

1 誘電体層 2 交差回路 3 ストリップ線路 4 ストリップ線路 5 ストリップ線路 6 ストリップ線路 IN1 第1入力節点 IN2 第2入力節点 O1 第1出力節点 O2 第2出力節点 N1 第1節点 N2 第2節点 N3 第3節点 N4 第4節点 N5 第5節点 1 Dielectric Layer 2 Crossing Circuit 3 Strip Line 4 Strip Line 5 Strip Line 6 Strip Line IN1 1st Input Node IN2 2nd Input Node O1 1st Output Node O2 2nd Output Node N1 1st Node N2 2nd Node N3 3rd Node N4 4th node N5 5th node

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 第1の入力節点に入力した所望周波数の
第1信号が第1の出力節点から出力され、第2の入力節
点に入力した同一周波数の第2信号が第2の出力節点か
ら出力されるストリップ線路の交差回路において、 前記第1の入力節点及び第1節点の間と前記第1節点及
び前記第2の入力節点の間とがそれぞれ1/4波長線路
で接続され、 前記第1の入力節点及び第2節点の間と前記第2節点及
び前記第2の出力節点の間とがそれぞれ1/4波長線路
で接続され、 前記第2の入力節点及び第3節点の間と前記第3節点及
び前記第1の出力節点の間とがそれぞれ1/4波長線路
で接続され、 前記第1の出力節点及び第4節点の間と前記第4節点及
び前記第2の出力節点の間とがそれぞれ1/4波長線路
で接続され、 前記第1節点及び第5節点の間と前記第5節点及び前記
第4節点の間とがそれぞれ1/4波長線路で接続され、
且つ、 前記第2節点及び前記第5節点の間と前記第5節点及び
前記第3節点の間とがそれぞれ1/4波長線路で接続さ
れている、 ことを特徴とするストリップ線路の交差回路。
1. A first signal of a desired frequency input to a first input node is output from a first output node, and a second signal of the same frequency input to a second input node is output from a second output node. In an output stripline crossing circuit, the first input node and the first node and the first node and the second input node are respectively connected by a quarter wavelength line, One input node and the second node and one of the second node and the second output node are connected by a quarter wavelength line, respectively, and between the second input node and the third node and The third node and the first output node are respectively connected by a quarter wavelength line, and the first node and the fourth node are connected and the fourth node and the second output node are connected. Are connected by a 1/4 wavelength line, respectively, and the first node and the fifth node And between points and between said fifth node and said fourth node are connected to each 1/4 wavelength line,
A strip line crossing circuit is characterized in that the second node and the fifth node and the fifth node and the third node are connected by a quarter wavelength line, respectively.
【請求項2】 多層プリント板における内層ストリップ
線路の交差回路において、 第1入力節点及び第1節点の間と前記第1節点及び第2
入力節点の間とがそれぞれ1/4波長線路で接続され、 前記第1入力節点及び第2節点の間と前記第2節点及び
第2出力節点の間とがそれぞれ1/4波長線路で接続さ
れ、 第2入力節点及び第3節点の間と前記第3節点及び第1
出力節点の間とがそれぞれ1/4波長線路で接続され、 前記第1出力節点及び第4節点の間と前記第4節点及び
前記第2出力節点の間とがそれぞれ1/4波長線路で接
続され、 前記第1節点及び第5節点の間と前記第5節点及び前記
第4節点の間とがそれぞれ1/4波長線路で接続され、
且つ、 前記第2節点及び前記第5節点の間と前記第5節点及び
前記第3節点の間とがそれぞれ1/4波長線路で接続さ
れている、 ことを特徴とするストリップ線路の交差回路。
2. A crossing circuit of inner layer strip lines in a multilayer printed circuit board, wherein the first input node and the first node are connected to each other, and the first node and the second node are connected to each other.
The input nodes are connected to each other by a 1/4 wavelength line, and the first input node and the second node are connected to each other and the second node and the second output node are connected to each other to a 1/4 wavelength line. , Between the second input node and the third node, and between the third node and the first node
The output nodes are connected to each other by a quarter-wave line, and the first output node and the fourth node are connected to each other and the fourth node and the second output node are connected to each other a quarter-wave line. The first node and the fifth node and the fifth node and the fourth node are connected by a quarter wavelength line, respectively.
A strip line crossing circuit is characterized in that the second node and the fifth node and the fifth node and the third node are connected by a quarter wavelength line, respectively.
JP5202078A 1993-07-23 1993-07-23 Cross circuit of strip line Pending JPH0738301A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP5202078A JPH0738301A (en) 1993-07-23 1993-07-23 Cross circuit of strip line
US08/278,162 US5432485A (en) 1993-07-23 1994-07-21 Circuit for crossing strip lines
GB9414861A GB2280548B (en) 1993-07-23 1994-07-22 Circuit for crossing strip lines

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5202078A JPH0738301A (en) 1993-07-23 1993-07-23 Cross circuit of strip line

Publications (1)

Publication Number Publication Date
JPH0738301A true JPH0738301A (en) 1995-02-07

Family

ID=16451598

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5202078A Pending JPH0738301A (en) 1993-07-23 1993-07-23 Cross circuit of strip line

Country Status (3)

Country Link
US (1) US5432485A (en)
JP (1) JPH0738301A (en)
GB (1) GB2280548B (en)

Cited By (3)

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Publication number Priority date Publication date Assignee Title
JP2012165060A (en) * 2011-02-03 2012-08-30 Mitsubishi Electric Corp Intersection circuit
CN103813627A (en) * 2012-11-14 2014-05-21 太阳诱电株式会社 Multilayer circuit substrate
JP2015511442A (en) * 2012-02-13 2015-04-16 ローベルト ボッシュ ゲゼルシャフト ミット ベシュレンクテル ハフツング Coupling structure for crossing transmission lines

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DE10228851B4 (en) * 2002-06-27 2005-05-25 Kathrein-Werke Kg directional coupler
US6930888B2 (en) * 2002-11-04 2005-08-16 Intel Corporation Mechanism to cross high-speed differential pairs

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JPH03129895A (en) * 1989-10-16 1991-06-03 Matsushita Electric Ind Co Ltd High frequency multilayer board
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012165060A (en) * 2011-02-03 2012-08-30 Mitsubishi Electric Corp Intersection circuit
JP2015511442A (en) * 2012-02-13 2015-04-16 ローベルト ボッシュ ゲゼルシャフト ミット ベシュレンクテル ハフツング Coupling structure for crossing transmission lines
US10062945B2 (en) 2012-02-13 2018-08-28 Robert Bosch Gmbh Coupling structure for crossing transmission lines
CN103813627A (en) * 2012-11-14 2014-05-21 太阳诱电株式会社 Multilayer circuit substrate
US9282632B2 (en) 2012-11-14 2016-03-08 Taiyo Yuden Co., Ltd. Multilayer circuit substrate

Also Published As

Publication number Publication date
GB2280548B (en) 1997-04-16
US5432485A (en) 1995-07-11
GB2280548A (en) 1995-02-01
GB9414861D0 (en) 1994-09-14

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