JPH0738120A - High frequency and high output amplifier - Google Patents

Abstract

PURPOSE:To determine the difference of signal path length by unit gate width only by a method wherein a gate wiring is provided in the direction of a drain bonding pad from a gate bonding pad, and a plurality of unit transistor gates are formed in pectination shape almost vertical to a gate wiring. CONSTITUTION:A gate wiring 7 is provided on the region atarting from a gate bonding pad 1 the direction of a drain bonding pad 2. A unit gate 3 is formed in pectination in the direction vertical to the gate wiring 7. Sources 4 and drains 5 are formed, and each drain 5 is connected by an air bridge wiring 6. The signal inputted from the gate bonding pad l is distributed to each unit transistor through the intermediary of the gate electrode 7, the signal is amplified, gathered and propagated as an output signal. The generation of phase difference of the signal amplified in each unit gate 3 is determined by the width only of each unit gate.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency high power amplifier used in the microwave band.

[0002]

2. Description of the Related Art A conventional high frequency high output amplifier is constructed by connecting an input matching circuit and an output matching circuit to a high output transistor. The input matching circuit matches the input impedance of the high output transistor to the input load, and the output matching circuit matches the output impedance of the high output transistor to the output load. The input signal is amplified by the high output transistor, and the output power is increased.

A high-power transistor is used in the high-frequency high-power amplifier having the above-mentioned structure. To form a high-power transistor using a field effect transistor (hereinafter referred to as FET), a threshold voltage is set. By increasing the depth and the gate width, the drain current is increased and the output is increased. The high-power FET is formed by arranging a plurality of FETs having a small gate width side by side, and is a transistor having a large gate width due to the sum of the respective gates. The high-power FET having this structure is called a multi-finger type transistor, each transistor is called a unit transistor, and each gate is called a unit gate.

FIG. 4 shows an example thereof. FIG. 4 is a perspective view showing the structure of a high power FET formed on a semiconductor chip. The unit gates 3 having the same gate width are arranged in a comb shape at regular intervals, and the source 4 and the drain 5 of each unit transistor are formed between the unit gates 3 so as to be combined with each other. The gate bonding pad 1 and the drain bonding pad 2 are arranged so as to sandwich substantially the central portion of the gate array. Each drain 5 is connected to each other by an air bridge wiring 6, and each source 4 is connected to each other by a lead wire of an electrode. In the high-power FET configured in this manner, the input signal is dispersed in the chip, distributed to the unit transistors, amplified, and then reassembled to be propagated as the output signal.

A signal path (shortest path) passing through a unit transistor located in the center as shown by a dotted line in FIG.
And the signal path length (longest path) that passes through the unit transistor located at the end as shown by the alternate long and short dash line has a difference in signal path length. Therefore, there is a problem that a phase difference of signals occurs and the output power gain decreases. The decrease in gain begins to occur when the signal path length difference is about 1/16 of the wavelength of the used frequency, and when it is 1/8 or more of the wavelength, it cannot be used in the high frequency band. Therefore, even when it is desired to increase the number of unit gates in order to increase the output, the number is limited so that the path length difference does not become 1/16 or more of the wavelength, and the output power gain does not increase.

In order to solve this problem, "A C-BAND 25
WATT LINEAR POWER FET BY Y.TANIGUCHI, Y.HASEGAWA,
Y.AOKI AND J.FUKAYA, 1990 IEEE MTT-S Digest ”. FIG. 5 shows this amplifier circuit. This is configured by using four high power FETs shown in FIG. Each FET is divided into four cells 10a to 10d, and an input matching circuit 11 and an output matching circuit 12 are connected to each FET cell. Then, the distribution circuit 13 that distributes the signal input from the input terminal 15 into four is connected to the input matching circuit 11, and the combining circuit 14 that combines the signals amplified by the FETs 10a to 10d is connected to the output matching circuit 12. Has been done. The distribution circuit 13 and the synthesis circuit 14 also have the function of adjusting the phase difference between the input stage and the output stage of each of the FET cells 10a to 10d. This amplifier circuit raises the maximum output power by combining the signals amplified in each FET cell.

[0007]

The gate width of the unit transistor at the final stage of the high frequency high power amplifier used in the microwave band, for example, 30 GHz is 4 when the output is 10 W.
Very large at 0 mm. Therefore, even if the gate width per FET cell is 4 mm, 10 FET cells are required, and a circuit for distributing and synthesizing signals is required. Since each FET cell is provided with the input matching circuit and the output matching circuit, 10 input matching circuits and 10 output matching circuits are required as a whole, and the size of the high-frequency high-power amplifier becomes large.

Therefore, when the high-frequency high-power amplifier is formed on the same semiconductor substrate, the chip area increases, which hinders reduction of chip cost and miniaturization. Further, even in the case of a hybrid configuration, the number of parts increases, which hinders reduction of mounting cost and miniaturization.

Therefore, the present invention has been made to solve the above problems, and an object of the present invention is to provide a small-sized, low-cost, high-frequency, high-output amplifier.

[0010]

A high-frequency high-power amplifier according to the present invention includes a high-output field-effect transistor formed by commonly connecting gates, sources, and drains of a plurality of unit transistors on a semiconductor substrate. , An input matching circuit that is connected to the gate of this high output field effect transistor and that matches the input load and the input impedance of the high output field effect transistor, and that is connected to the drain of the high output field effect transistor, With an output matching circuit that matches the output impedance of the effect transistor, the high output field effect transistor,
Gate wiring is arranged from the gate bonding pad to the drain bonding pad direction, and the gates of the unit transistors are arranged in a comb shape in a direction substantially perpendicular to the gate wiring and connected to the gate wiring. Here, the gate array of the unit transistors may be formed on only one side or both sides of the gate wiring.

[0011]

According to the high frequency high power amplifier of the present invention, the high power field effect transistor used in the amplifier is
The gate wiring is arranged from the bonding pad in the direction of the drain bonding pad, and the gates of the plurality of unit transistors are formed in a comb shape substantially perpendicular to the gate wiring, so that they pass through each unit transistor. The maximum signal path length difference is only twice the unit gate width. That is, the signal path length difference is determined only by the unit gate width, and does not depend on the interval at which the unit gates are arranged and the number of unit gates. Therefore, the phase difference between the signals does not become so large as to deteriorate the operating characteristics of the high-power FET, so that the output power gain is not reduced. Therefore, since the phase difference does not change even if the number of unit gates is increased, there is no limitation on the total gate width and a desired maximum output can be obtained. Since this high output field effect transistor is used, it is not necessary to use a distribution circuit and a matching circuit, and the number of parts or elements constituting the circuit can be reduced. Therefore, it is possible to realize a small-sized and low-cost high-frequency high-power amplifier.

[0012]

Embodiments of the present invention will be described below with reference to the accompanying drawings. In the description of the drawings, the same elements will be denoted by the same reference symbols, without redundant description.

The structure of the high frequency high power amplifier of the embodiment is shown in FIG.
As shown in, the input matching circuit 11 is connected to the gate of the high-power FET 10, and the output matching circuit 12 is connected to the drain. Input matching circuit 11 and output matching circuit 12
Are inductors L ₁ and L ₂ and capacitors C ₁ and
It is composed of C ₂ and. The input matching circuit 11 has a high output F
The input impedance of the ET 10 is matched to the input load, and the output matching circuit 12 matches the output impedance of the high power FET 10 to the output load. The signal input from the input terminal 15 is amplified by the high output FET 10 to have high output power, and propagated to the output terminal 16.

FIG. 2 shows the structure of the high power FET 10 used in the high frequency high power amplifier of the embodiment. The gate wiring 7 is arranged in the direction from the gate bonding pad 1 to the drain bonding pad 2,
The unit gate 3 is formed in a comb shape in the vertical direction, and the source 4 and the drain 5 are formed so as to interlock between them. Each drain 5 is air bridge wiring 6
Are connected to each other by.

The signal input from the gate bonding pad 1 is distributed to each unit transistor via the gate wiring 7, amplified, and then reassembled and propagated as an output signal. In FIG. 2, a signal path passing through the unit transistor located closest to the gate bonding pad 1 is shown by a dotted line (shortest path), and a signal path passing through the unit transistor located furthest away (longest path) is shown. It is indicated by a dashed line. Since the distance of the signal path in the vertical direction of the chip (Y direction in FIG. 2) does not change between the shortest path and the longest path, the maximum difference in signal path length is only twice the width of the unit gate 3. That is, the phase difference of the signals amplified in each unit gate 3 is determined only by the unit gate width, and does not depend on the interval between the unit gates 3 and the number of unit gates. If the signal path difference is set to 1/16 or less of the wavelength, no remarkable decrease in gain is seen.
It can be increased up to 32. Therefore, in order to further increase the output, it can be dealt with by increasing the number of unit gates and increasing the total gate width, so that the signal path difference does not increase, and theoretically, there is no limitation on the maximum output.

Since the high-power FET having the above-mentioned structure is used in the high-frequency high-power amplifier shown in FIG. 1, even if the operating frequency becomes high, the unit gate width can be increased or the number of unit gates can be increased. The total gate width of the high output FET 10 can be changed to cope with this. Therefore, since there is no limitation on the total gate width, the FET does not have to be divided into cells as in a conventional amplifier, and it is not necessary to provide a distributor and a combiner. Further, one input matching circuit and one output matching circuit circuit may be provided for each FET cell.

Therefore, since there is no limit on the maximum output power,
High-output FET with one input matching circuit and one output matching circuit
A high-frequency high-power amplifier can be constructed only by itself. Therefore, the number of parts or forming elements forming the amplifier is significantly reduced, so that the high frequency and high output amplifier can be downsized and the cost can be reduced.

The present invention is not limited to the above embodiment, but various modifications can be made.

For example, in the structure of the high power FET of the embodiment, the unit gates 3 are formed on both sides of the gate wiring 7, but they may be formed on only one side as shown in FIG. Even in this case, the maximum difference in signal path length is only twice the unit gate width. Therefore, in order to further increase the output, it is possible to increase the total number of gates by increasing the number of unit gates. Further, although the unit gate 3 is formed at right angles to the direction of the gate wiring 7, the formation angle may be set arbitrarily. Further, although the unit gates 3 having the same gate width are arranged at equal intervals, the unit gate width and the arrangement intervals may be changed for each unit gate. In other words, the FET used is from the gate bonding pad to the drain bonding
If the gate wiring is arranged in the pad direction and the gate is formed in a comb shape on one side or both sides of the gate wiring, the output power can be adjusted without lowering the gain. The thickness, the unit gate width, the arrangement interval, and the like may be set arbitrarily.

[0020]

As described above in detail, according to the high-frequency high-power amplifier of the present invention, in order to further increase the output, it can be dealt with by changing the total gate width of the high-output FET. The maximum output power is not limited, and the number of components or elements that compose the amplifier can be significantly reduced. Therefore, miniaturization and cost reduction of the high frequency and high output amplifier can be realized.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a high frequency high output amplifier according to an embodiment.

FIG. 2 is a perspective view showing the configuration of a high-power FET used in the high-frequency high-power amplifier of the embodiment.

FIG. 3 is a perspective view showing a configuration of a modified example of the high power FET used in the high frequency high power amplifier of the embodiment.

FIG. 4 is a pattern diagram showing a configuration of a high-power FET used in a conventional high-frequency high-power amplifier.

FIG. 5 is a diagram showing a configuration of a conventional high-frequency high-power amplifier.

[Explanation of symbols]

1 ... Gate bonding pad, 2 ... Drain bonding pad, 3 ... Unit gate, 4 ... Source, 5
... Drain, 6 ... Air bridge wiring, 7 ... Gate wiring, 10 ... High output FET, 10a, 10b, 10c, 1
0d ... FET cell, 11 ... Input matching circuit, 12 ... Output matching circuit, 13 ... Distribution circuit, 14 ... Combining circuit, 15 ... Input terminal, 16 ... Output terminal.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁶ Identification number Internal reference number FI Technical indication location 7376-4M H01L 29/80 L (72) Inventor Jiro Fukui 1 Taya-cho, Sakae-ku, Yokohama-shi, Kanagawa Sumitomo Denki Kogyo Co., Ltd. Yokohama Works (72) Inventor Ryoji Sakamoto 1 Taya-cho, Sakae-ku, Yokohama-shi, Kanagawa Sumitomo Denki Kogyo Co., Ltd.

Claims (3)

[Claims] 1. A high output field effect transistor formed by commonly connecting gates, sources, and drains of a plurality of unit transistors on a semiconductor substrate, and a high output field effect transistor connected to a gate of the high output field effect transistor.
An input matching circuit for matching an input load and an input impedance of the high output field effect transistor, and an output connected to a drain of the high output field effect transistor for matching an output load and an output impedance of the high output field effect transistor. A matching circuit, wherein the high-output field-effect transistor has a gate wiring arranged in a direction from a gate bonding pad to a drain bonding pad, and a gate of the unit transistor is substantially perpendicular to the gate wiring. A high-frequency high-power amplifier, characterized in that it is arranged in a comb shape in a direction and connected to the gate wiring. 2. The high frequency high power amplifier according to claim 1, wherein the gate array of the unit transistors is formed only on one side of the gate wiring and is connected to the gate wiring. 3. The high-frequency high-power amplifier according to claim 1, wherein the gate array is formed on both sides of the gate wiring and is connected to the gate wiring.