JPH0738093A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To increase the processing accuracies of upper layers through the reductions of steps and improve the quick responses of the operations of circuits through the increases of the current capabilities of transistors, by removing selectively the insulation films of the sidewalls of the gate electrodes of the transistors therefrom. CONSTITUTION:By the selective removal of insulation films 6a on the sidewalls of the gate electrodes of transistors, steps are reduced, and the processing accuracies of the upper layers thereof are improved. Also, on a single chip, the transistors having different current capabilities from each other are formed, and thereby, the improvement of the quick response of a semiconductor device which counterbalances microminiaturization is realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a gate electrode sidewall insulating film of a transistor of a semiconductor device having an LDD structure transistor.

[0002]

2. Description of the Related Art FIG. 2 is a sectional view showing a conventional manufacturing process of a semiconductor device. First, a silicon oxide film 2 to be an element isolation region and a gate electrode 3 of a transistor are formed, and then, using this gate electrode 3 as a mask, an ion implantation 5 is performed to form a thin diffusion layer region 4 of a concentration opposite to that of the substrate. Next, the insulating film 6 is grown on the upper layer, and the sidewall insulating film 6a is formed on the side surface of the gate electrode 3 by anisotropic etching.
Then, ion implantation 8 is performed using the sidewall insulating film 6a as a mask to form a diffusion layer region 7 having a high concentration, which is the opposite type to the substrate and becomes the source and drain regions.

[0003]

As the miniaturization and the multi-layered wiring progress, the influence of the step of the lower layer on the processing accuracy of the upper layer is increasing, and as shown in FIG. When the gate electrode 3 is formed on the part,
Gate electrode sidewall insulating film 6a at the step portion of the silicon oxide film 2
There is a problem that the step difference is large, the processing accuracy of the upper layer is lowered, and the yield is lowered.

Further, in order to cope with high speed, a transistor having a large current capacity is required, and in order to cope with miniaturization, it is desired to properly use a transistor having a current capacity suitable for the purpose on the same chip. In the prior art, since the transistors have the same structure, it is difficult to partially increase the current capacity of the transistors.

The object of the present invention is to eliminate the conventional defects, reduce the step difference and improve the processing accuracy of the upper layer, and to form transistors having different current capabilities on the same chip to cope with miniaturization. It is an object of the present invention to provide a semiconductor device and a method of manufacturing the same that can achieve high speed.

[0006]

A semiconductor device according to a first aspect of the present invention is a semiconductor device having a transistor having an LDD structure and having an insulating film on a side wall of a gate electrode.
Wiring without insulating film on one or both side walls or LD
It is characterized in that it includes a transistor having a non-D structure.

In the method for manufacturing a semiconductor device according to the second aspect of the present invention, after forming the gate electrode, the first ion implantation is performed using the gate electrode as a mask, and then the insulating film is formed on the side wall of the gate electrode. And perform second ion implantation L
In a method of manufacturing a semiconductor device including a step of forming a transistor having a DD structure, a step of forming an insulating film on a sidewall of a gate electrode or a wiring, and a sidewall insulating film on the wiring region or a gate region of a transistor are selectively removed. And a step of forming a wiring having no insulating film on one side wall or both side walls and a transistor not having an LDD structure partially.

[0008]

The present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view of a semiconductor device shown in the order of steps for explaining an embodiment of the present invention.

As shown in FIG. 1A, after forming the side wall insulating film 6a of the gate electrode 3, the portion except the side wall insulating film 6a having a stricter step is removed as shown in FIG.
Patterning is performed so as to cover the photoresist 9.

Next, the sidewall insulating film 6 is formed by isotropic etching.
a is removed and the photoresist 9 is removed. After that, as shown in FIG. 1C, a diffusion layer region 7 of high concentration, which is the opposite type to the substrate and becomes the source and drain regions, is formed by ion implantation 8.

2A to 2D are sectional views of a semiconductor device shown in the order of steps for explaining another embodiment of the present invention. Figure 2
After forming the gate electrode side wall insulating film 6a as shown in (a), as shown in FIG. 2 (b), in any transistor, the whole transistor is covered with photoresist 9, and only the drain region side photoresist is used. Pattern to form what is covered with 9 and what is not covered at all. Next, as shown in FIG. 2C, the sidewall insulating film 6a is removed by isotropic etching, and the photoresist 9 is removed. Thereafter, ion implantation 8 is performed to form the source and drain regions of the substrate and the opposite type of diffusion layer region 7 having a high concentration.
By forming a transistor, a transistor having a thin diffusion layer region 4 opposite to the substrate on both sides of the source and drain, a transistor having only the drain side, and a transistor not having both sides can be arbitrarily formed on the same chip. it can.

[0012]

As described above, according to the present invention, by selectively removing the gate electrode side wall insulating film, the step height is reduced and the processing accuracy of the upper layer is improved. By forming a diffusion layer having a low concentration only in an arbitrary transistor, transistors having different current capabilities can be formed on the same chip, and high speed corresponding to miniaturization can be realized.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor device shown in the order of steps for explaining an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor device showing steps in order to explain another embodiment of the present invention.

FIG. 3 is a cross-sectional view of a semiconductor device showing a conventional semiconductor device having an LDD-structured transistor and a method for manufacturing the same, in the order of steps.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Silicon oxide film 3 Gate electrode 4 Diffusion layer with a reverse type and a low concentration 5 Ion implantation 6 Insulation film 6a Gate electrode side wall insulating film 7 Diffusion layer with a high concentration and a reverse type to the substrate 8 Ion implantation 9 Photoresist

Claims (2)

[Claims] 1. An LDD including an insulating film on a sidewall of a gate electrode
What is claimed is: 1. A semiconductor device having a transistor having a structure, comprising a wiring having no insulating film on one side wall or both side walls and a transistor not partially having an LDD structure. 2. A transistor having an LDD structure in which, after forming a gate electrode, first ion implantation is performed using the gate electrode as a mask, and then an insulating film is attached to a side wall of the gate electrode and second ion implantation is performed. In a method of manufacturing a semiconductor device including a step of forming a gate insulating film, a step of forming an insulating film on a side wall of a gate electrode or a wiring and a step of selectively removing a side wall insulating film in the wiring region or a gate region of a transistor are included. Then, a method for manufacturing a semiconductor device is characterized in that a wiring having no insulating film or a transistor not having an LDD structure is partially formed on one or both side walls.