JPH0737872A - Semiconductor and its manufacturing method - Google Patents

Abstract

PURPOSE:To provide a method of manufacturing a semiconductor device having a plasma CVD insulation film composed of a single film having low stress feature and high passivation capability and excellent resistance and SM resistance against contamination such as an alkali metal, etc. CONSTITUTION:This embodiment comprises: a step of forming a wiring 3 having specific patterns on a semiconductor substrate 1a; and a step of depositing and forming a plasma CVD insulation film 6 composed of a single film by a method wherein, on a semiconductor substrate containing on this wiring, by a plasma CVD method, a first film part 4 having minute film quality with high passivation capability and a second film part 5 having film quality with low stress to be given to groundwork are alternately deposited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing method, and more particularly to an insulating film deposited on a semiconductor substrate and its forming method.

[0002]

2. Description of the Related Art Conventionally, in the process of manufacturing a semiconductor device having a multi-layered wiring, plasma CVD is used in a step of depositing an insulating film on a semiconductor substrate by a plasma CVD (chemical vapor deposition) method on a wiring having a predetermined pattern. A film of the same material is continuously deposited while maintaining the plasma conditions determined according to the application of the insulating film from the initial stage to the end of the insulating film deposition,
It is formed as a single film.

By the way, as the characteristics of the plasma CVD insulating film, the degree of stress applied to the underlayer and the resistance (passivation ability) to the contamination such as alkali metal typified by Na (sodium) blocking property are emphasized. It may be desirable to have low and high passivation capabilities.

However, the plasma CVD insulating film formed as a single film by the above-mentioned conventional method has a trade-off relationship between low stress property and high passivation capability, and simultaneously satisfies the requirements for stress property and passivation capability. Is difficult.

FIG. 5 shows a profile of Na concentration in the depth direction (interface direction with the substrate) from the film surface by SIMS (secondary ion mass) analysis of a plasma SiON film formed by a conventional method. An example of the result is shown.

In FIG. 5, the Na of the plasma SiON film is
The concentration is 1 x 10 overall from the film surface to the vicinity of the substrate interface.
High as ⁹ atom / cc or more and sufficient Na blocking property is obtained, but stress is 800 to 1000MP
It becomes as high as a.

When the stress is high as described above, the SM (stress migration) life of the Al (aluminum) wiring formed in the lower layer of the plasma SiON film becomes 1/4 or less as compared with the case where the stress is low. Moreover, a notch is generated in the Al wiring, and the EM (electro-migration) life is also shortened.

On the other hand, plasma S with low stress
The iON film cannot obtain the sufficient Na blocking property as in the case where the stress is high as described above. As a passivation film deposited for protecting the surface of the semiconductor substrate, a plurality of different types of plasma CVD are usually used.
The insulating film is laminated. In this case, a plasma SiN film having an excellent passivation ability and a plasma SiO film having a low stress applied to the underlying layer are often stacked, and the plasma conditions for depositing the SiN film are maintained during the deposition process of the plasma SiN film. SiO during the deposition process of the SiO film
It is necessary to maintain the plasma conditions for film deposition.

However, stacking two kinds of insulating films as the passivation film in this way increases the number of steps. Further, since the plasma SiN film does not pass ultraviolet rays, an ultraviolet erasable nonvolatile semiconductor memory (EPROM)
Cannot be used as a passivation film.

[0010]

As described above, in the plasma CVD insulating film formed by the conventional method, there is a trade-off relationship between low stress property and high passivation capability, and there is a demand for stress property and passivation capability. There is a problem that it is difficult to satisfy both at the same time.

Further, a passivation film formed by laminating a plurality of types of plasma CVD insulating films by the conventional method has a large number of deposition steps and cannot be used as a passivation film for an EPROM when a plasma SiN film is included. There was a problem.

The present invention has been made to solve the above problems, and has a plasma CVD insulating film composed of a single film having both low stress property and high passivation ability, and has resistance to contamination by alkali metal and SM. An object of the present invention is to provide a semiconductor device having excellent durability and a method for manufacturing the same.

[0013]

The semiconductor device of the present invention comprises:
A semiconductor substrate on which a semiconductor element is formed, a wiring having a predetermined pattern formed on the semiconductor substrate, and a dense film having a high passivation ability deposited on the semiconductor substrate including the wiring. CVD consisting of a single film deposited so that the film part of the second film part and the second film part having a film quality with low stress applied to the underlayer are alternately overlapped.
And an insulating film.

The method of manufacturing a semiconductor device according to the present invention is
A step of forming a wiring having a predetermined pattern on the semiconductor substrate, and plasma C on the semiconductor substrate including the wiring.
A plasma CVD insulating film formed of a single film by alternately depositing a first film portion having a dense film quality with high passivation ability and a second film portion having a film quality with low stress applied to a base by the VD method. And a step of depositing and forming.

[0015]

Operation: Plasma CVD deposited and formed in the present invention
The insulating film is formed of a single film in which a first film portion having a dense film quality having a high passivation ability and a second film portion having a film quality having a low stress applied to a base are alternately stacked. By using such a plasma CVD insulating film, it is possible to realize a semiconductor device having excellent resistance to contamination by alkali metals and the SM resistance of wiring.

[0016]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a sectional view schematically showing the structure of an example of a plasma CVD apparatus (a cold wall type plasma CVD apparatus having a load lock chamber) used in the method for manufacturing a semiconductor device according to the first embodiment of the present invention. is there.

In FIG. 1, a first upper electrode 111 and a second upper electrode 112 are arranged side by side in a reaction chamber 10 surrounded by stainless steel, and these two upper electrodes (shower heads) are selective. The lower electrode 12 is provided so as to be movable in parallel so as to face the.

A high frequency power source 14 for supplying high frequency power to the upper electrodes 111 and 112 is provided outside the reaction chamber, and a first gas for introducing a reaction gas from outside the reaction chamber to below the first upper electrode 111 is provided. A second reaction gas introduction part 152 for introducing a reaction gas is provided below the reaction gas introduction part 151 and the second upper electrode 112.

The lower electrode 12 is one on which the semiconductor wafer 1 is placed, the electrode body is connected to the ground potential, and a heater 13 electrically insulated from the electrode body is built-in. is doing.

Further, the reaction chamber 10 is provided with a vacuum exhaust port 16 for exhausting from the reaction chamber by a vacuum pump (not shown) provided outside the reaction chamber. A load lock chamber 20 is provided adjacent to the reaction chamber 10 for loading / unloading the wafer 1 to / from the reaction chamber 10. The load lock chamber 20 has a wafer transfer arm 21 and an atmospheric pressure. A gas inlet 22 for introducing an active gas (for example, N ₂ gas), a vacuum exhaust port 23, and a door 24 for taking in and out the wafer 1 from the outside are provided.

Next, an example of a method of depositing a plasma CVD film by using the plasma CVD apparatus having the configuration of FIG. 1 will be described with reference to FIG. First, as the wafer 1, a semiconductor element (not shown) is formed on the semiconductor substrate 1a in each chip area, and then the wiring 3 having a predetermined pattern is formed on the interlayer insulating film 2 is prepared.

Then, the wafer 1 is placed on the lower electrode 12, and the wafer 1 is, for example, the first upper electrode 11.
1, the lower electrode 12 is moved so as to face the reaction chamber 1, the temperature of the reaction chamber 10 is, for example, 300 ° C., and the pressure in the chamber is, for example, 40 ° C.
Keeping at Pa, the high frequency power supply 14 to the upper electrodes 111, 11
A high-frequency electric power of, for example, 1000 W is supplied to 2 and the reaction gas is introduced from the first reaction gas introduction part 151 to induce plasma between the counter electrodes (111, 12).

In this case, as the reaction gas, for example, SiH
The flow rate of ₄ / N ₂ O / NH ₃ gas is 200/50
By using the mixed first mixed gas controlled to 0/2000 sccm, the first plasma SiON film 4 having a film quality close to that of the plasma SiN film is thinly formed (10 nm to 10 nm-on the semiconductor substrate including the wiring 3). In the range of 100 nm, for example, 10 nm) is deposited.

The first plasma Si thus deposited
The ON film 4 has a high stress value (for example, 800 MPa).
However, since it has a dense film quality, it has an excellent Na blocking property.

Next, the wafer 1 is attached to the second upper electrode 112.
The lower electrode 12 is moved to face the reaction chamber 1
The temperature, pressure and high frequency power in 0 are the same as above,
By introducing a reaction gas from the second reaction gas introduction unit 152, plasma is induced between the counter electrodes (112, 12).

In this case, the flow rate of a part of the reaction gas is changed, and the flow rate of the SiH ₄ / N ₂ O / NH ₃ gas is correspondingly controlled to 240/2000/300 sccm for the second mixing. By using the gas, the second plasma SiON film 5 is thinly formed on the first plasma SiON film 4 (within the range of 10 nm to 100 nm, for example, 90 nm).
m) Deposit. The second plasma S deposited in this way
The iON film 5 has a low stress value applied to the base (for example, 5 to 10 MPa).

Hereinafter, the wafer 1 is set to the first upper electrode 111.
The lower electrode 12 is moved so as to alternately face the second upper electrode 112 and the second upper electrode 112, and the plasma conditions are alternately changed as described above, so that the first film having a high blocking property and a dense film quality of about 10 nm is formed. Plasma Si
The ON film 4 and the base have a film quality with low stress 9
The plasma SiON film 6 is formed by alternately depositing the second plasma SiON film 5 having a thickness of about 0 nm at regular intervals, for example, 5 times (for a total of 10 layers).

FIG. 3 shows an example of the result of measuring the Na concentration profile of the plasma SiON film 6 formed as described above by SIMS analysis in the depth direction (interface direction with the substrate) from the film surface. ing.

In FIG. 3, the Na of the plasma SiON film is
The concentration is 1 × 10 ⁹ atom / cc or more near the film surface, but decreases as it approaches the substrate interface. Plasma SiON film 6 deposited and formed by the above embodiment
Is composed of a single film in which a plasma SiON film 4 having a high blocking property and a dense film quality and a plasma SiON film 5 having a film quality having a low stress applied to the base are alternately deposited, and the stress value is, for example, 80 MPa, Stress value of the conventional plasma CVD insulating film (800 to 10
00 MPa) and is excellent in Na blocking property.

According to the semiconductor device using the plasma SiON film 6 as described above, the plasma SiON film 6 is different from the conventional semiconductor device using the plasma CVD insulating film.
It was confirmed that, for example, the SM life of the Al wiring 3 formed in the lower layer is four times or more, no notch is formed in the Al wiring 3, and the EM life is improved by about 30%.

Further, since the plasma SiON film 6 deposited and formed according to the above-mentioned embodiment allows ultraviolet rays to pass therethrough, EPROM
Can be used as a passivation film. In the above embodiment, the film thickness of the film 4 having a high blocking property and the film thickness of the film 5 having a low stress applied to the base are 10 n in correspondence.
m and 90 nm, the film thickness ratio is not limited.

Further, in the above-mentioned embodiment, the film 4 having a high blocking property and the film 5 having a low stress applied to the underlayer.
Although the plasma SiON film is deposited as the above, the invention is not limited to this, and other films (plasma SiN film, plasma SiO film, etc.) may be deposited.

In the first embodiment, the lower electrode 12 is moved so that the wafer 1 is alternately opposed to the first upper electrode 111 and the second upper electrode 112, but the present invention is not limited to this. The plasma condition (film forming condition) in the vicinity of the wafer 1 may be alternately changed by the method described above.

FIG. 4 is a sectional view schematically showing an example of a plasma CVD apparatus used in the method of manufacturing a semiconductor device according to the second embodiment of the present invention. In FIG. 4, 30 is a reaction chamber, 31 is an upper electrode (shower head), 32 is a lower electrode which is provided so as to face the upper electrode and is connected to the ground potential, and 33 is a heater incorporated in the lower electrode 33. , 34 is a high-frequency power source for supplying high-frequency power to the upper electrode 31, 35 is a reaction gas introducing portion for introducing a reaction gas from outside the reaction chamber to below the upper electrode 31, and 36 is for exhausting the reaction chamber. A vacuum exhaust port, 20 is a load lock chamber, 21 is a wafer transfer arm, 22 is a gas introduction port, 23 is a vacuum exhaust port, and 24 is a door. The semiconductor wafer 1 placed on the lower electrode 32 is one in which wiring having a predetermined pattern is formed after forming a semiconductor element on the semiconductor substrate in each chip region.

Next, an example of a method for depositing the above-described plasma SiON film using the plasma CVD apparatus having the structure shown in FIG. 4 will be described. First, the temperature in the reaction chamber 30 is kept at 300 ° C. and the pressure in the chamber is kept at 40 Pa, for example, and the high frequency power source 34 is connected to the upper electrode 31 at 1000 ° C., for example.
By supplying high-frequency power of W and introducing the reaction gas from the reaction gas introduction part 35, plasma is induced between the opposing electrodes. In this case, as the reaction gas, for example, SiH ₄
/ N ₂ O / NH ₃ gas flow rate corresponding to 200/500
Plasma SiN on the wafer 1 by using the mixed first mixed gas controlled at / 2000sccm
For example, a first plasma SiON film having a film quality close to that of the film is deposited to a thickness of 10 nm.

Next, the temperature, pressure, and high-frequency power in the reaction chamber 30 are set to the same conditions as above, and a reaction gas is introduced to induce plasma between the opposing electrodes. in this case,
By changing the flow rate of a part of the reaction gas,
The flow rate of H ₄ / N ₂ O / NH ₃ gas is 240/2
By using the second mixed gas controlled at 000/300 sccm, the second plasma SiON film can be formed, for example, 9 times.
Deposit 0 nm.

Hereinafter, by alternately supplying the first mixed gas and the second mixed gas, the film forming conditions are switched and controlled (the plasma conditions in the vicinity of the wafer 1 are alternately changed) to obtain the blocking property. A first plasma SiON film of about 10 nm having a high and dense film quality and a second plasma film of about 90 nm having a low stress on the base
It is possible to deposit and form the plasma SiON film by alternately depositing the plasma SiON film and the plasma SiON film at constant intervals.

[0038]

As described above, according to the present invention, the plasma CVD insulating film composed of a single film having both low stress property and high passivation ability is provided, and the resistance to contamination by alkali metal and the SM resistance is excellent. A semiconductor device and its manufacturing method can be realized.

[Brief description of drawings]

FIG. 1 is a sectional view schematically showing an example of a plasma CVD apparatus used in a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing an example of a semiconductor device formed by the method for manufacturing a semiconductor device according to the first embodiment of the present invention.

3 is a diagram showing an example of characteristics of a plasma CVD film in the semiconductor device shown in FIG.

FIG. 4 is a sectional view schematically showing an example of a plasma CVD apparatus used in the method of manufacturing a semiconductor device according to the second embodiment of the invention.

FIG. 5 is a diagram showing an example of characteristics of a plasma CVD film formed by a conventional semiconductor device manufacturing method.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor wafer, 1a ... Semiconductor substrate, 2 ... Interlayer insulating film, 3 ... Wiring, 4 ... 1st plasma SiON film, 5 ... 2nd plasma SiON film, 6 ... Plasma SiON film, 1
0, 30 ... Reaction chamber, 111, 112, 31 ... Upper electrode (shower head), 12, 32 ... Lower electrode, 13, 3
3 ... Heater, 14, 34 ... High frequency power supply, 151, 15
2, 35 ... Reaction gas introduction part, 16, 36 ... Vacuum exhaust port,
20 ... Load lock chamber, 21 ... Wafer transfer arm, 2
2 ... Gas inlet port, 23 ... Vacuum exhaust port, 24 ... Door.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masayasu Abe 1 Komukai Toshiba-cho, Kouki-ku, Kawasaki-shi, Kanagawa Stock company Toshiba Tamagawa factory

Claims (7)

[Claims] 1. A semiconductor substrate on which a semiconductor element is formed, a wiring having a predetermined pattern formed on the semiconductor substrate, and a dense and highly-passivated layer formed by deposition on the semiconductor substrate including the wiring. A semiconductor device, comprising: a first film portion having a film quality and an insulating film made of a single film deposited so as to alternately overlap a second film portion having a film quality having a low stress applied to a base. . 2. The semiconductor device according to claim 1, wherein the insulating film is used as a passivation film. 3. The first film portion and the second film portion are deposited so as to alternately overlap with each other so that the thickness of each of the first film portion and the second film portion is within a range of 10 nm to 100 nm. Item 1. The semiconductor device according to item 1. 4. The semiconductor device according to claim 1, wherein the insulating film is a plasma CVD insulating film. 5. A step of forming a wiring having a predetermined pattern on a semiconductor substrate, and a stress applied to a first film portion having a dense film quality having a high passivation ability and a base on the semiconductor substrate including the wiring. And a second film portion having a low film quality are alternately deposited to form an insulating film composed of a single film. 6. The method of manufacturing a semiconductor device according to claim 5, wherein each of the first film portion and the second film portion is formed so that a film thickness thereof is within a range of 10 nm to 100 nm. . 7. The method of manufacturing a semiconductor device according to claim 5, wherein the deposition of the first film portion and the second film portion is performed by a plasma CVD method.