JPH0736670A - Integration time control type digital integration circuit - Google Patents

Abstract

PURPOSE:To economically control integration time. CONSTITUTION:The result calculated by a difference absolute value circuit 3 is converted into a prescribed value based on the change ratio control signal supplied from the outside by a table ROM 4, the converted digital signal is converted into an analog signal by a D/A converter 5, a clock signal generated in a VCO 6 is controlled by the analog signal and a digital integration circuit 7 performs the digital integration of the input signal supplied from the outside based on the clock signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integration time control type digital integration circuit which is used, for example, in a process control device and which arbitrarily controls the integration time.

[0002]

2. Description of the Related Art Conventionally, when performing feedback control as shown in FIG. 5, when the sensor output fluctuates as indicated by the symbol "a" in FIG. 6, if the sensor output is directly fed back, the system may vibrate. is there. In order to prevent this, control is performed by an output whose change is delayed, such as the integral output of the symbol "b". To obtain a digital integrated output with a digital input, for example, as shown in FIG.
A converter converts a digital signal into an analog signal, which is integrated by, for example, a CR integrating circuit, and then converted into a digital signal by an A / D converter. As another method, FIG.
As shown in, the digital input is added to the computer, and the program is executed to integrate and output.

[0003]

Although the method of FIG. 7 is economically efficient, it is difficult to control the integration time and the integration characteristic in a programmable manner. Further, the method of FIG. 8 requires a computer with a high operation speed, but such a thing is very expensive. The present invention has been made in view of such a situation, and has an object to control the integration time and the integration characteristic with good economical efficiency.

[0004]

In order to solve such a problem, the present invention provides a digital integrator circuit for integrating a digital input signal externally input each time a clock signal is supplied, and a digital input signal Digital integrator circuit Absolute value difference circuit for calculating absolute value of difference between output signals, table ROM for outputting the output signal of the absolute difference circuit as a value based on the change rate control signal supplied from the outside, and table And a digital VCO for generating a clock signal having a frequency corresponding to the ROM output and supplying the clock signal to the digital integrating circuit.

[0005]

The result calculated by the absolute value difference circuit is converted into a predetermined value by the table ROM based on the change rate control signal supplied from the outside, and the clock signal generated by the digital VCO by the converted digital signal. Are controlled, and the digital integrator circuit performs digital integration of the input signal supplied from the outside based on the clock signal.

[0006]

1 is a block diagram showing an embodiment of the present invention, in which a digital integrator circuit 6 is composed of a comparator 1 and an up / down counter 2, and a digital input signal supplied to a terminal A of the comparator 1 is Figure 2 (a)
If it changes like the solid line, the comparator 1 compares the digital input signal of the terminal A with the integrated output of the up / down counter 2 supplied to the terminal B, determines which signal component is larger, and responds. The judgment result is output from the output terminal.

Assuming that the digital input is A and the integral output is B, the up / down counter 2 counts up if A> B, and the down count otherwise. A
When = B, the up / down counter is stopped. If a clock pulse of a constant cycle is applied to the T input of the up / down counter as it is, the integrated output changes linearly as shown by the alternate long and short dash line in FIG.

In the process control, it is ideal to follow rapidly when the input largely changes and to follow slowly when approaching the target, and the CR integrating circuit has a logarithmic characteristic and is close to the ideal characteristic. Therefore, in order to approximate the characteristics, the difference absolute value circuit 3, the table ROM 4, and the digital VCO 5 are added.

In FIG. 1, the digital input signal A and the output B of the up / down counter 2 are fed back via the absolute difference circuit 3, the table ROM 4, and the digital VCO 5. At this time, when the difference between A and B is large, the frequency of the pulse output is high and the up-down counter 2 changes quickly, and when the difference is small, the up-down counter 2 changes slowly, so that the characteristic shown by the broken line in FIG. To have
Similar to the CR integrator circuit, logarithmic characteristics can be obtained.

Further, since the table ROM 4 is inserted between the absolute difference circuit 3 and the D / A converter 5, for example, the fuzzy rule changes the response characteristic as shown in FIG. 3 or as shown in FIG. You can change the response time. This control can be controlled by the supply state of the change rate control input A / B shown in FIG. This response characteristic or response time can be obtained as an arbitrary characteristic by a method in which the same data is supplied to a plurality of table ROMs and the data read therefrom is processed by addition or subtraction. The fuzzy rule may be written in the ROM table by a known technique such as Japanese Patent Laid-Open No. 4-39703.

[0011]

As described above, the present invention changes the absolute value of the difference between the digital input signal and the digital integrated output signal to a predetermined value based on the change rate control signal supplied from the outside, and then Since the changed signal is converted into an analog signal, the VCO is controlled by the analog signal to generate a clock signal, and the digital input signal is integrated by the clock signal, it is not necessary to use a high-speed computer. Also, since the integration time can be programmable controlled while performing digital signal processing, there is an advantage that the economical efficiency is improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a time chart for explaining the operation of the device in FIG.

FIG. 3 is a diagram showing a change rate control state of an integration result.

FIG. 4 is a diagram showing a change rate control state of an integration time.

FIG. 5 is a diagram for explaining a feedback system.

FIG. 6 is a diagram showing a relationship between a sensor change and an integrated output in FIG.

FIG. 7 is a block diagram showing an example of a conventional digital integrating circuit.

FIG. 8 is a block diagram showing another example of a conventional digital integrating circuit.

[Explanation of symbols]

 1 Comparator 2 Integration Circuit 3 Difference Absolute Value Circuit 4 Table ROM 5 Digital VCO 6 Digital Integration Circuit

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[Procedure amendment]

[Submission date] November 19, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction content]

Further, the absolute difference circuit 3 and the digital VCO
Since the table ROM 4 is inserted between 5 and 5, for example, the response characteristic is changed by the fuzzy rule as shown in FIG.
The response time can be changed as shown in FIG. This control can be controlled by the supply state of the change rate control input A / B shown in FIG. The response characteristics or response time, multiple
Number table is written in table ROM and the table
Any property can be obtained by a well-known method of selecting a rule . The fuzzy rule may be written in the ROM table by a known technique such as Japanese Patent Laid-Open No. 4-39703.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction content]

[0011]

As described above, the present invention changes the absolute value of the difference between the digital input signal and the digital integrated output signal to a predetermined value based on the change rate control signal supplied from the outside, and then to generate a clock signal to control the VCO in signal is varied, the since to carry out the integration of the digital input signal by a clock signal, the integration time while the digital signal processing without using a high-speed computer Can be programmable control
It has the effect of improving economic efficiency.

[Procedure 3]

[Document name to be corrected] Drawing

[Name of item to be corrected] Figure 2

[Correction method] Change

[Correction content]

[Fig. 2]

Claims (1)

[Claims] 1. A digital integrator circuit that integrates a digital input signal input from the outside every time a clock signal is supplied, and a difference calculation unit that calculates an absolute value of a difference between the digital input signal and the digital integrator circuit output signal. Absolute value circuit and table R for outputting the output signal of the absolute value circuit of the difference as a value based on a change rate control signal supplied from the outside
OM and D / which converts the table ROM output into an analog signal
An integration time control type digital integration, comprising an A converter and a VCO which generates a clock signal having a frequency corresponding to the D / A converter output signal and supplies it to the digital integration circuit as a clock signal. circuit.