JPH0736418A - Driving method for display device - Google Patents

Abstract

PURPOSE:To attain the reducing of the unevenness and the flicker of a display by making the effective values of driving voltages corresponding to low levels of sub-screens coincide to a prescribed voltage. CONSTITUTION:This device is provided with a field counter 3, a reference voltage selector 2 and a non-selection voltage generator 14 and performs a gradation display by assigning field screens to every bit of a video signal and changing both row and column driving voltage reference values corresponding to a bit weight while using a plural row electrodes simultaneous selection and an orthogonal function conversion. The video signal from a frame memory 1 is taken out according to a field number and address data, however, bit weights processed with the field number are decided and the signal is transferred to a video signal buffer memory 5. Then, digital video signal for a picture is divided into respective sub-pictures being the same numbers as that of bits length at every bit weight and driving voltages are impressed so that the peak value of driving voltage in each sub-screen corresponds to the bit weight of a signal bit and the effective value of a driving voltage corresponding to the low level of each sub-screen coincides with the prescribed value in spite of the bit weight.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is a display device arranged in a grid pattern, that is, a so-called simple matrix type display device, in which a plurality of row electrodes are simultaneously selected and a driving method using a signal converted by an orthogonal function is adopted. The present invention relates to a display device in which the light transmittance changes when the applied voltage at the crosswise electrodes of the grid pattern, that is, at the intersections of the row electrodes and the column electrodes exceeds a threshold value.

[0002]

2. Description of the Related Art A conventional technique will be described by taking a liquid crystal display device as an example. Conventionally, when driving a simple matrix type liquid crystal display panel having N _r row electrodes and M _c column electrodes, a set of pixel signals corresponding to pixels on any one row electrode is used as a column electrode. A row electrode selection voltage is applied to the row electrodes at the same time when the voltage is applied to change the light transmittance of each selected pixel, and this operation is performed by so-called line-sequential scanning driving method in which N _r lines are scanned for each row electrode. Alternatively, there is known a simultaneous multiple selection drive method in which a plurality of row electrodes are simultaneously selected by utilizing orthogonal transformation and corresponding orthogonally transformed composite signals of a plurality of rows are applied to column electrodes.

[0003]

In a liquid crystal display device, the light transmittance of a pixel has a threshold characteristic which depends on the effective value of the voltage received by the pixel. In the above driving method, the maximum / minimum ratio of light transmittance, that is, the condition that the contrast is maximum is given by Equation 1 when the maximum row voltage absolute value is V _r and the maximum column voltage absolute value is V _c. Known (Reference: Paul M. Alt, Peter Pleshko, "Scanning Limitati
ons of Liquid-Crystal-Displays '', IEEE Transaction
s on Electron Devices, vol.ED-21, No2, February 197
4, pp146-155).

[0004]

[Formula 1] V _r / V _c = N _r ^1/2

The ratio of the effective value V _{on of the} pixel voltage that gives the maximum (or minimum) light transmittance to the effective value V _off of the pixel voltage that gives the minimum (or maximum) light transmittance under the condition of Expression 1 is
Given in.

[0006]

## EQU00002 ## V _on / V _off = ((N _r ^1/2 -1) / (N _r ^1/2 +
1)) ^1/2

Further, V _off is given by the _equation 3.

[0008]

## _EQU3 ## V _off = V _c (2 (N _r −N _r ^1/2 ) / N _r ² ) ^1/2

Equations 1 and 3 to 4 are obtained.

[0010]

## EQU4 ## V _r = V _off [N _r / (2 (1-1 / N _r
^1/2 ))] ^1/2 = V _th [N _r / (2 (1-1 /
N _r ^1/2 ))] ^1/2

That is, since V _off is usually set to the threshold value V _th of the transmittance vs. RMS value characteristic, V _c ,
V _r will be determined. Therefore, there is a drawback in that a very large row voltage is required as the number of row electrodes increases.

By the way, in order to obtain gradation display in a simple matrix display device, the voltage applied to the row electrodes is + V during the selection period.
_r or −V _r, and 0 v in the non-selection period,
This can be achieved by amplitude modulation in which the column voltage is changed according to the gradation or by changing the application time. Methods of changing the application time include a method of changing the pulse width of the column voltage (pulse width modulation) and a method of changing the number of pulses with a constant pulse width. The method of pulse number modulation is, for example, that one screen is represented by the number of frames (or the number of fields) of the number of gradations, and the number of frames (the number of fields) to which the column electrode pulse that becomes V _on is added according to the gradation of each pixel is determined. I should do it. This method is called frame modulation or frame thinning.

On the other hand, if the amplitude modulation is left as it is, the effective value of the voltage applied to the column electrodes, that is, the square root of the root mean square value, differs for each column electrode or for each frame, which causes display unevenness and requires a correction signal. There is a drawback that the processing circuit becomes complicated.

Further, in the pulse width modulation, for a signal with a narrow pulse width, the drive waveform distortion becomes large in the pixel far from the driving point due to the electrode resistance, and display unevenness occurs. When the modulation is performed, the frame frequency becomes too small, which causes flickering of the screen, that is, flicker. The frame modulation has a drawback that if the frame frequency cannot be increased, the number of low-frequency drive signal components increases as the number of gradations increases, and flicker becomes noticeable.

[0015]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a display device which solves the above drawbacks and enables gradation display with less display unevenness and flicker without the need for adding a correction signal generating circuit. That is, it is a driving method of a display device in which the light transmittance of a pixel selected by the row electrode and the column electrode changes in accordance with the difference in applied voltage between the row electrode and the column electrode, and the column electrode signal indicates the display. In the driving method, an orthogonal transformation signal obtained by transforming a video signal corresponding to the position of the selected row electrode on the panel by an orthogonal function is added, and the row electrode signal to the selected row electrode is the signal of the orthogonal function. , In order to obtain a predetermined gradation level, the digital video signal of one screen is distributed for each bit weight to the same number of sub-screens as the bit length, and the peak value of the driving voltage in each sub-screen is used as the signal bit weight. The present invention provides a method for driving a display device, characterized in that the effective value of the drive voltage corresponding to the low level of the sub-screen is matched with a predetermined voltage regardless of the bit weight.

Specifically, a display panel having a plurality of row electrodes and a plurality of column electrodes arranged therein, and a row voltage generator for receiving a drive signal and applying a drive voltage to the row electrodes and the column electrodes of the display panel. A video signal corresponding to the position of the simultaneously selected row electrodes on the panel, comprising a column voltage generator, a quadrature function generator, and a drive signal generator that synthesizes a display drive signal from the quadrature function signal and the video signal. Is applied as a column electrode signal and a signal of the orthogonal function is applied to the selected plurality of row electrodes. A digital video signal of one screen is bit-weighted for each bit weight. It is distributed to each sub-screen of the same number as the length, the peak value of the drive voltage in each sub-screen is made to correspond to the weight of the signal bit, and the effective value of the drive voltage corresponding to the low level of each sub-screen is made to be the bit weight. Matches the given value regardless Characterized in that to realize the gray level of the target by applying to the so that. In the present invention, a plurality of row electrodes can be selected simultaneously, but in the case of performing line-sequential scanning, the present invention can be applied by using [1] as the above orthogonal function. The following description will be made on the assumption that a plurality of row electrodes are simultaneously selected.

First, when the number of row electrodes increases, the peak value of the drive voltage becomes large to obtain the effective value of the drive voltage above a certain level, but a plurality of row electrodes are simultaneously selected. In addition, the driving voltage can be reduced by combining the conversion of the video signal by the orthogonal function and the inverse conversion thereof. A driving voltage reduction method will be described with reference to FIG.

FIG. 2 shows processing after the video signal is converted into a digital signal. The video signal is temporarily stored in the frame memory 1 and then the function value is -1 for the signal of L horizontal lines corresponding to L arbitrary row electrodes (row number = i, i = 1 to L) of the display panel 11. Signal conversion is performed by an orthogonal function system consisting only of +1 to obtain a column signal element g _{kj '} . "'" Indicates a column signal element in a state in which a correction signal described later is not added. That is, G _ij is the video signal (gradation signal) of the pixel (i, j) corresponding to the row number i (i = 1 to L) and the column number j (j = 1 to M _c ) and is output from the orthogonal function generator. When the signal is represented by the matrix [d _ki ], the converted signal is as shown in _Equation 5.

[0019]

## _EQU00005 ## g _{kj '} (Δt _k ) = Σd _ki G _ij , {k = 1 to 1
L, i = 1 to L}

K is a subscript for time and takes a value from 1 to L. (Δt _k ) is a set of row electrodes [i (i = 1 to 1
L)] has the relationship of Expression 6 with respect to the selected time Δt _s .

[0021]

[Equation 6] ^L Σ _{k = 1} {t _k } = Δt _s

Here, ^L Σ _{k = 1} {} means
It is shown that the summation from k = 1 to L of the expression in {} is taken. Hereinafter, the same notation is used. i represents the row electrode number as described above. This means that the L pixels on the j-th column are grouped into one set and expanded to L signals on the time axis. Hereinafter, unless otherwise specified, g _{kj '} is g _kj' (Δt _k ).
Shall be represented. Here, [d _ki ] takes a function value shown in Table 1 when a Walsh function system is used as an orthogonal function.

[0023]

[Table 1]

First, the description will be made assuming that the order L of the Walsh function and the number of simultaneously selected row electrodes are equal to each other.

Video signal G _ij having column number j and row number i
(I = 1 to L) is a set of L signals g related to the j-th column electrode.
_It is converted into _{kj '} (k = 1 to L) and expanded on the time axis. On the other hand, in order to display on the display panel 11 corresponding to the original video signal, g _{kj ′} may be inversely converted. The inverse transformation is expressed by Equation 7.

[0026]

## _EQU7 ## [G _ij ] = [d _ki ] ^-1 [g _{kj '} ]

From the property of the orthogonal function, [d _ki ] = [d _ik ] is _satisfied , so that the following equation 8 is obtained.

[0028]

[G _ij ] = (1 / L) [d _ik ] [g _{kj '} ] = (1 / L) ^L Σ _{k = 1} {d _ik g _kj' }

In order to realize this, the orthogonal function [d _ik ] may be used as a drive signal for the row electrodes i (i = 1 to L) selected simultaneously. In this case, the light transmittance of the liquid crystal responds to the effective value of the applied voltage, that is, the square root of the root mean square value, so that the display signals are the row signal (d _ik ) and the column signal (g _{kj '} ) as shown below. Sum of products with ^L Σ _{k = 1} {d _ik g
_{This is because kj '} } is included, and a restored signal corresponding to the original video signal can be obtained. This will be described in detail below.

When the effective value of the voltage applied in one frame of the pixel (i, j) is V _ij , the equations 9 and 10 are obtained.

[0031]

[ _Equation 9] V _ij ² = [ ^L Σ _{k = 1} {(d _ik V _r −g _{kj ′} V _c ) ² } + ^F
Σ _{k = L + 1} {(g _{uj '} V _c ) ² }] / F

[0032]

[Equation 10] F = L · M F ≧ N _r

Here, M is the number of simultaneous selections required to scan the number N _r of row electrodes when L row electrodes are simultaneously selected at one time, that is, the simultaneous selection required to complete one frame. Since it is a count, F is an integer greater than or equal to N _r .

Further, (d _ik V _r ) is a row drive signal d _ik obtained from the orthogonal function generator 8 is sent to the row signal generator 9, and as a result, is applied from the row voltage generator 10 to the row electrode i. The voltage (g _{kj ′} V _c ) is the voltage applied to the column electrode j as a result of the conversion signal g _{kj ′} being sent from the column signal buffer memory 6 to the column voltage generator 7. The first term of the equation 9 corresponds to the period when the row electrode is selected, and the second term thereof corresponds to the root mean square value of the non-selected period. The row voltage in the non-selected period is 0, and the time in the meantime is represented by Expression 11.

[0035]

[Equation 11] L · (M−1) · (Δt _k )

When Formula 9 is expanded and arranged, Formula 12 is obtained.

[0037]

V _ij ² = [ ^L Σ _{k = 1} {(d _ik V _r ) ² } + ^F Σ _{u = 1
{(G uj 'V c)} 2} -2 L Σ k = 1 {(d ik g kj') V r
V _c }] / F

Since d _ik = ± 1, the first term of Expression 12 is Expression 13
It becomes like this and is constant.

[0039]

[Formula 13] ^L Σ _{k = 1} {(d _ik V _r ) ² } = LV _r ²

It is clear from Equation 8 that the third term of _Equation 12 is an inverse transformation of g _{kj '} . Substituting equation 8 into the third term of equation 12 yields equation 14.

[0041]

2 ^L Σ _{k = 1} {(d _ik g _{kj ′} ) V _r V _c } = 2
LG _ij V _r V _c

Therefore, if the second term of Expression 12 is kept constant, V _ij corresponds to the video signal G _ij in a one-to-one relationship, and the video is restored.

The second term of the equation 12 is originally ^F Σ _{u = 1} {(g _uj V _c ) ² } = [ ^F Σ _{k = L + 1} {(g _{lj '} )
² } + ^L Σ _{k = 1} {(g _{kj ′} ) ² ] V _c ^2, so that Σ _k {(g _{kj ′} ) ² }, which is the net squared addition value of the signals obtained by orthogonally converting the video signal G _ij I will examine it. Using that the matrix [d _ki ] is an orthogonal function, _Equation 15 is obtained.

[0044]

Σ _k {(g _{kj '} ) ² } = Σ _k {(Σ _i {d _ki
G _ij }) ² } = LΣ _i {G _ij ² }

Considering here a case where G _ij is a binary signal only, that is, only "bright" or "dark",
If G _ij = ± q and q is a constant value, then Equation 16 is obtained.

[0046]

Σ _k (g _{kj '} ) ² = L ² q ²

Therefore, the second term of Expression 12 is as follows.

[0048]

^F Σ _p (g _pj V _c ) ² = FLq ² V _c ²

That is, if the video signal is a binary signal,
The second term of 2 is constant. On the other hand, when the video signal has an intermediate level other than binary, the second term of Expression 12 is not constant and requires a correction signal.

Rewriting Eq. 12 using Eqs. 13, 14, and 17 gives the following equation. V _ij ² = [LV _r ² + FLq ² V _c ² -2 LG _ij V _r V _c ]
/ F

The above equation shows that if the row voltage peak value V _r and the column voltage peak value V _c are constant, the effective voltage of the pixel is directly associated with the video signal.

Next, the maximum value and the minimum value of (V _ij ² ) are obtained. This is for comparison with Formulas 1 to 3 in the description of the conventional system. Since the first and second terms in the above equation are constants, the third term determines the maximum or minimum value. Also G _ij = ±
Since q and (q = constant), the minimum value: (V _ij ² ) _MIN and the maximum value: (V _ij ² ) _MAX are expressed by _Equation 18 and Equation 19, respectively.
become that way.

[0053]

(V _ij ² ) _MIN = L [V _r ² + Fq ² V _c ² -2
qV _r V _c ] / F

[0054]

(V _ij ² ) _MAX = L [V _r ² + Fq ² V _c ² +2
qV _r V _c ] / F

A ratio between the maximum value and the minimum value of (V _ij ² ), that is, the selection ratio is obtained. This has the same meaning as the on / off ratio described in Equation 2. If the selection ratio is (SR), it is as shown in Expression 20.

[0056]

[Number 20] _{^{(SR) 2 = [V r}} 2 + Fq 2 V c 2 + 2q | V r V c |] / [V r 2 + Fq 2 V c 2 -2q | V r V c |]

The maximum value of the expression 20 is the case where (V _r ² + Fq ² V _c ² ) takes the minimum value, that is, the case where the expression 21 is satisfied.

[0058]

[Expression 21] V _r ² = Fq ² V _c ²

Substituting this into Equation 20 and rearranging it yields Equation 22
become.

[0060]

(22) (SR) ² _MAX = (F ^1/2 +1) / (F ^1/2 -1)

Further, the minimum value of the pixel voltage under the condition of the expression 21 becomes as shown in the expressions 19 to 23.

[0062]

(V _ij ² ) _MIN = L [V _r ² + Fq ² V _c ² -2
_{q | V r V c |]} / F = 2L [1-1 / F 1/2)] V r 2
/ F

If this is set to the threshold voltage V _th , F
Since ML, the equation 24 is obtained.

[0064]

V _r = V _th [M / (2 (1-1 / (F ^1/2 ))] ^1/2

Comparing Equation 24 and Equation 4, when the number of row electrodes is large, N _r ^1/2 >> 1 and F ^1/2 >> 1 can be established, so the row voltage peak value shown in Equation 24 can be obtained. Is reduced to (M / N _r ) ^1/2 times. The row drive peak voltage V _r and the column drive peak voltage V _c as shown in the equation 21.
And the ratio is (F ^1/2 q), which is usually larger than 1, so that V _r > V _c . Further, since F = LM, which is a number close to N _r , the on / off ratio, that is, the selection ratio (Equation 22) is almost the same value as the on / off ratio (Equation 2) of the conventional method.

Next, the relationship between the number of simultaneous selections and the degree L of the Walsh function will be described. In the range described above, the number of simultaneously selected row electrodes is S, and S = L. However, when S ≠ L, it is necessary to select the Walsh function so that L> S. In that case, the number of simultaneous selections M is a minimum integer such that M · S> N _r, and the time per frame is F = L · M · Δt _k , which is longer than when S and L are equal. And the selection ratio also becomes smaller.

As described above, it has been shown that the driving voltage can be reduced by simultaneously selecting a plurality of row electrodes and orthogonal function conversion.

Next, the relationship between the video signal and the column drive signal will be described. The relationship of Expression 25 is obtained from Expression 16 and the function values shown in Table 1.

[0069]

(25) (g _{kj '} ) _MAX = Lq

This indicates that the scale factor between the video signal and the drive signal is L. Therefore, the number of gradation levels of the column drive signal is required to be L for binary display of light and dark. Next, a method of expressing gradation using a sub-screen for only binary display will be described.

The display gradation can be realized by utilizing a visual afterimage characteristic, for example, by superimposing a screen of binary light and dark on the time axis. For example, as one of them, one frame may be divided into sub-screens (field screens) that are smaller by one than the number of gradations, and “bright” and “dark” may be distributed and displayed according to the gradation of each pixel (so-called frame thinning). ). However, with this method, the number of fields is only one less than the number of gradations, and if the number of gradations increases, the frame frequency must be reduced and flicker easily occurs. In order to solve such a drawback, the inventor has proposed a method of weighting the brightness of the "bright" part in each field.

According to this method, the number of fields can be reduced as compared with the former case. That is, one field is applied to each bit of the video signal, and the peak value of the column driving voltage and the peak value of the row driving voltage are adjusted according to the weight of the bit. This adjustment may be performed for the column driving voltage and the row driving voltage at the same time, or may be performed for only one of them. The former requires (2N-1) fields for N-bit video signals, but the method proposed by the inventor requires only N fields.

The drive voltage peak value of each field can be determined by the following method. Looking at the voltage-transmittance characteristic of a normal STN type liquid crystal display device, for example, the characteristic shown in FIG. 12 may be obtained. In FIG. 12, as is apparent from the figure, at a pixel voltage lower than the threshold voltage V _th , the transmittance is rather higher than the V _th point.
In such a case, if the column voltage and the row voltage are simply determined so that the V _on / V _off ratio is maximized, the pixel voltage V _off corresponding to “dark” becomes lower than the V _th point. Therefore, the contrast is lowered, and the transmittance level higher than the V _th point determines the lower limit of gradation display.

In the present invention, in order to realize better gradation display, V _off is set to the minimum transmittance point in any field. Next, a driving method for making V _off always coincide with V _th , that is, the minimum transmittance point will be described. In the above description, the row electrode bias at the time of non-selection is 0 v, but when a constant bias voltage V _R0 that is not 0 is applied, the root mean square value of the pixel voltage becomes the formula 26 with V _ij as the effective value.

[0075]

V _ij ² = [ ^L Σ _{K = 1} {(d _ik V _r −g _{kj ′} V
^{_{c) 2} + F Σ u}} = L + 1 {(V R0 -g uj 'V c) 2}] /
F When this is expanded and arranged, it becomes number 27.

[0076]

V _ij ² = [ ^L Σ _{k = 1} {(d _ik V _r ) ² } -2
^L Σ _{K = 1} {d _ik g _{kj '} } V _r V _c + ^F Σ _{u = 1} {(g _uj'
V _c ) ² } + (F−L) (V _r0 ² ) −2 ^F Σ _{u = L + 1} {g
_{uj '} } V _R0 V _c ] / F

As will be described in the latter embodiment, generally, the sign of the driving voltage is AC for a set of field data in order not to leave a DC potential on the liquid crystal panel. Therefore, regarding the _expression 27, only the sign of the fourth term of the expression 27 changes including the sign inversion of the drive voltage while the sign of V _R0 remains unchanged, so that the expression is arranged as the expression 28.

[0078]

[ _Equation 28] V _ij ² = [ ^L Σ _{k = 1} {(d _ik V _r ) ² } + ^F
_{Σ u = 1 {(g uj} 'V c) 2} -2 L Σ k = 1 {d ik g
_{kj '} V r V c +} (F-L) V R0 2] / F

In the present method, it is sufficient to consider the case where the video signal has only two values of brightness and darkness, and therefore the value of _Expression 28 is the maximum / minimum value when V _R0 is 0, and is the same as _Expression 29 and Expression 29.
become that way.

[0080]

(V _ij ² ) = L [V _r ² + Fq ² V _c ² ± 2q | V
_r V _c | + (M-1) V _R0 ² ] / F

Next, the case where the column voltage peak value and the row voltage peak are changed at the same time in determining the drive voltage peak value of each field will be described. The peak voltage ratio is the same ratio, that is, when the drive voltage peak value is multiplied by k (k is a drive voltage reduction ratio, 0 <k <1) so that the relationship of Formula 21 is maintained, the pixel voltage becomes Equations 24 and 30 are obtained.

[0082]

(V _ij ² ) = L {k ² [V _r ² + Fq ² V _c ² ±
2q | V _r V _c |] + [(M-1) V _R0 ² ]} / F

The minimum value / maximum value of the above equation for the given V _{R0 is} given by the equation 31.

[0084]

(V _ij ² ) _MIN = L {k ² [V _r ² + Fq ² V
^{_{c 2 -2q | V r V c}} |] + [(M-1) V R0 2]} / F (V ij 2) MAX = L {k 2 [V r 2 + Fq 2 V c 2 + 2q |
V _r V _c |] + [(M-1) V _R0 ² ]} / F

The video signal of the pixel (ij) is set to 2 with an N-bit length.
It is represented as a number 32 as a base number.

[0086]

[ _Expression 32] G _ij = {d1 _ij , d2 _ij , d3 _ij , ..., dN _ij }

Here, the bit with the smaller subscript number is the bit with the larger weight. The pixel voltage corresponding to “bright” for the bit (dN _ij ) is V _N. Further, since V _th corresponds to “dark”, when Eq. 31 is associated, Eq. 33 is obtained.

[0088]

(V _th ² ) = L {K _N ² [V _r ² + Fq ² V _c ² −
_{2q | V r V c |]} + [(M-1) V RN 2]} / F (V N 2) = L {K N 2 [V r 2 + Fq 2 V c 2 + 2q | V r V
_c |] + [(M-1) V _RN ² ]} / F

In Expression 33, V _RN is the non-selection voltage of the N-bit subfield, and K _N is the driving voltage reduction ratio of the N-bit subfield. Here, for the heaviest (d1 _ij ) field, K _N = 1 and V _RN = 0, and the drive voltages V _r and V _c determined so as to satisfy Expressions 21 to 24 are used as they are. To do. V _th at this time (Equation 24)
Is the threshold value shown in FIG. 12, and V ₁ in FIG. 12 corresponds to (V _ijMAX ) in the _equation 19. If V _th is given, V
₁ is uniquely determined. Here, V _ijMAX will be _referred to as V _MAX . For (d1 _ij ), _Formula 33 is as follows.

(V _th ² ) = L {[V _r ² + Fq ² V _c ² -2
q | V _r V _c |]} / F (V ₁ ² ) = L {[V _r ² + Fq ² V _c ² + 2q | V _r V _c
|]} / F When this is used to rewrite Equation 33, Equation 34 is obtained.

[0091]

(V _th ² ) = K _N ² V _th ² + L (M-1) V _RN ² / F ( _VN ² ) = K _N ² V _MAX ² + L (M-1) V _RN ² / F

By solving this for (K _N ) and (V _RN ), Formula 35 is obtained.

[0093]

Equation 35] ^{_{(K N) 2 = (V}} N 2 -V th 2) / (V MAX 2 -V th 2) (V RN) 2 = V th 2 M (V MAX 2 -V N 2) / ( M-1)

If V _N is given in equation 35, the driving condition is determined. Therefore, for example, for (d2 _ij ), the weight is ½ of (d1 _ij ), so V ₁
The pixel voltage effective value V ₂ which is half of the transmittance corresponding to is calculated, and the necessary driving voltage reduction rate (K ₂ ) and the bias voltage V _R2 are calculated from this and the equation (35). Similarly, the column voltage peak value corresponding to the bits of (d3 _ij ) or less can be determined.

FIG. 1 is a block diagram of a liquid crystal display device according to the present invention, in which a field counter 3, a reference voltage selector 2 and a non-selection voltage generator 14 are added to the configuration of FIG. A field screen is assigned to each bit of the video signal by using, and gradation display can be performed by changing both the row and column drive voltage reference values corresponding to the bit weight. The video signal from the frame memory 1 is taken out according to the field number and the address data, but the bit weight to be processed is determined by the field number and sent to the video signal buffer memory 5.

As a method of displaying a field for each bit weight, one of the row voltage and the column voltage may be fixed and the other reference voltage may be changed in addition to the above method.

[0097]

The above method contributes to the reduction of the display panel drive voltage peak value as compared with the conventional method, and in the gradation display, the drive reference voltage of the row electrode and the column electrode of the field screen is made to correspond to the weight of the image signal. , And by applying a bias voltage to the non-selected row electrodes, it is possible to realize with the minimum number of fields as a method of expressing gradation by combining one screen with multiple fields. However, since it matches the threshold value, the contrast is large and flicker can be reduced, and since the correction signal is not required, the performance-to-price ratio can be increased.

[0098]

Example: 240 row electrodes, 320 column electrodes 320 × 3 = 96
Three liquid crystal display panels were prepared, and the number of row electrodes simultaneously selected was eight, and an embodiment of the present invention was constructed as shown in FIG.
There are 320 pixels per row on the image, but 960 column electrodes are required because they are separated into three primary colors of RGB for display. The configuration of FIG. 3 has a frame memory 1, a reference voltage selector 2, a field counter 3, an orthogonal conversion signal generator 4, a video signal buffer memory 5, a column signal buffer memory 6, a column voltage generator 7, an orthogonal function generator 8, and rows. It comprises a signal generator 9, a row voltage generator 10, a controller 12, a non-selection voltage generator 14, and a display panel 11.

The frame memory 1 has 240 rows × 960 columns ×
FIG. 10 shows a block diagram of a 5-bit configuration. In the frame memory 1, RGB signals are converted from analog to digital and then subjected to gamma correction and stored in the order of RGB corresponding to each horizontal line. In this embodiment, since the data length of the luminance signal (gradation signal) of each pixel is 5 bits, the configuration of the memory 1 is also 5 bits long, but if the input signal is 8 bits long, the gamma correction circuit has 8 / The configuration shown in FIG. 7 may be included by including 5-bit conversion. Display panel 1 used
1 has an average response time of 50 ms and a threshold voltage of 2.5 V
It was _rms .

For the most significant bit (MSB) of the video signal, the peak value V _r of the row electrode driving voltage was ± 10.0 V and the peak value V _c of the column electrode driving voltage was ± 5.164 V. At this time, the voltage of the non-selected row is 0v. The row voltage peak value, the column voltage peak value, and the non-selected row voltage for the other bits are set as shown in Table 2. The following selection voltage in each bit is ± V _R.

[0101]

[Table 2]

The column electrodes are arranged in the order of the three primary colors of RGB, each consisting of 320 electrodes, totaling 960 electrodes. A group of eight row electrodes in total is selected simultaneously every 30 horizontal lines from the row electrodes on the upper side of the display panel, and a signal is first transferred from the MSB area of the memory of the corresponding horizontal line to the buffer memory 5. The buffer memory 5 is composed of eight line memories, and the lines are output in parallel from the beginning of the lines, that is, with an 8-bit length. This is the field signal G
_I'll call it _{ij '} . One line memory has a double structure, and a serial memory of 1 × 960 bit structure is provided for writing and reading, and each of them operates by an independent clock. A data transfer signal is used to collectively transfer between writing and reading.

The field counter 3 is a 2-bit up-counter and sends a field number to the address decoder 13 of the frame memory 1 to determine from which weight bit the video signal is extracted. The field signal has an 8-bit length and is sequentially input to the orthogonal transformer 4. The quadrature converter 4 has the configuration shown in FIG. 4 and takes the complement of the field signal G _{ij ′} through the inverter 42 and inputs it to the exclusive OR 43. The signal d _ki from the orthogonal function generator 8 is also input to the exclusive OR 43, and according to the function value shown in Table 1, (+ d _ki )
Or output (-d _ki ). The calculation of (d _ki · G _ij ) is performed by the inverter 42 and the exclusive OR 43. The output of the exclusive OR 43 is cumulatively added by the accumulator 41 for the row numbers (i = 1 to L) in the simultaneous selection.

The function of the inverter 44 is to send a carry control signal to the adder 41 when the value of the orthogonal row function is (-1). The orthogonal transformation signal generator 4 has eight blocks, which is the number of time slots in one simultaneous selection period, with one block including the accumulator 41 to the inverter 44, and the addition process is performed in parallel for each time slot number k. To be done. Here, the time slot is the minimum pulse width of the orthogonal function used as the drive signal for the row electrode and is Δt _k .

The column signal buffer memory 6 is composed of two sets of line memory arrays as shown in FIG. 6, and one line memory array is composed of eight line memories. The structure of the line memory used here is the same as that of the line memory of the video signal buffer described above, but the bit length is 3 bits.

The output g _{kj '} from the accumulator 41 is 3
The bit length is stored in the line memory corresponding to the time slot number k in the line memory array 61 or 62 of the next column signal generator 6.

As described above, the orthogonal transformation signals of the pixels (i, j) (: i = 1 to 8, j = 1 to 960) are cumulatively added in parallel by the eight accumulators, and orthogonally added to the rows in the simultaneous selection. Perform conversion and addition operations. The cumulatively added signals are stored in the line memory and the calculation of the conversion of the video signal of the next column is started. When the same conversion is performed for all the columns in the simultaneous selection and the signals for one field are stored in the eight line memories, the signals are sent to the column voltage generator 7 from the line memory having the orthogonal conversion number k which is early. Orthogonal transformation number k is 1 to 8
Is.

The orthogonal function generator 8 generates the function values shown in Table 1 and sends it to the orthogonal transformation signal generator 4 and the row signal generator 9 as a signal of (d _ki ) or (d _ik ). The signals to the orthogonal transform signal generator 4 are transmitted in parallel for (k) and according to the timing of the row number of the calculation target for (i).

The row signal generator 9 receives a function value from the orthogonal function generator 8 and produces a row drive pattern and a simultaneous selection pattern signal for each time slot to generate a row voltage generator 10.
Send to.

The row voltage generator 10 has the structure shown in FIG. 8, and has a drive pattern register 101, a selection signal register 102, and a decoder (voltage level selector) 103.
It consists of The simultaneous selection row is determined by the contents of the selection signal register 102, and the driving pattern register 101
Or each line selected by the contents of the outputs of the (+ V _R), or is determined whether to output a (-V _R). (+ V _RN ) or (-V _RN ) is output to the non-selected row, which is connected to either one in accordance with the level of the non-selected voltage inversion terminal connected to the decoder 103, and for every subfield scan. Flipped. Note that these values are relative.

The column voltage generator 7 has the structure shown in FIG. 7 and is composed of a shift register 71, a latch 72, a voltage level selector 73, and a voltage divider 74. When the data for one row is sent to the shift register 71, the conversion of the column voltage and the conversion of the orthogonal function corresponding to the orthogonal conversion number to the row voltage are performed at the same time.

The sign of the driving voltage is inverted with respect to one set of field data, and the same signal is driven again. That is, by activating the inverting output terminals of the column voltage generator 7 and the row voltage generator 10 and repeating the signal of the previous field once more, a drive waveform that is completely opposite to that of the previous field can be obtained. The reason for such a driving sequence is that no DC potential is left on the liquid crystal panel.
To prepare for the next field while displaying one field, another set of line memory arrays stores similar operation data for the next field number as shown in FIG. Signal conversion is performed sequentially up to the fifth field with the line memory of the lid set.

The reference voltage selector 2 has the configuration shown in FIG. 5 and outputs the reference voltage to the column voltage generator 7 and the row voltage generator in the relationship shown in Table 2 according to the signal from the field counter 3, that is, the bit weight to be displayed. Output to the device 10. Here, the peak value of the row voltage and the peak value of the column voltage are made equal to the absolute value of the supplied reference voltage.

The frame frequency at which good display can be obtained by the above method is 30 to 40 Hz.

The time T required for one frame is as follows. T = 2 (5F ′) Δt _k = 25 to 35 ms (F ′ = F + 8 = 248, Δt _k = 10 to 14 μs)

In a region where the frame frequency is high, the signal calculation cannot catch up, and in the low frequency, flicker becomes noticeable. The reason why F ′ is used instead of the time slot number F is that the vertical blanking period is provided by (8Δt _k ). A settling time is required to switch the reference voltage, but within the vertical blanking period (± 15
mV).

Further, in the configuration of FIG. 4, the column electrodes are divided into six groups every 160 lines, and the signal processing system from the frame memory to the column voltage generator is processed in parallel corresponding to the column electrode groups. It was possible to widen the range of use of the frame frequency to be performed.

[0118]

As is apparent from the above description, according to the present invention, the display panel can be driven at a low voltage, the gradation display drive signal can be generated with a simple structure, and the high frequency component and the low frequency component can be reduced. It is possible to provide a display device of good quality that has low display unevenness and little flicker at low cost.

[Brief description of drawings]

FIG. 1 is a block diagram illustrating the present invention.

FIG. 2 is a block diagram illustrating the present invention.

FIG. 3 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of an orthogonal transformation signal generator 4.

FIG. 5 is a block diagram showing a configuration of a reference voltage selector 2.

FIG. 6 is a block diagram showing a configuration of a column signal generator 6.

FIG. 7 is a block diagram showing the configuration of a column voltage generator 7.

FIG. 8 is a block diagram showing a configuration of a row voltage generator 10.

FIG. 9 is a block diagram showing another configuration example of the frame memory 1.

FIG. 10 is a block diagram showing a configuration of a frame memory 1.

FIG. 11 is a block diagram showing a configuration of a video signal buffer memory 5.

FIG. 12 is a graph showing the relationship between light transmittance and pixel applied voltage effective value.

[Explanation of symbols]

G _ij : video signal corresponding to pixel (i, j), g _kj : signal obtained by converting G _ij with an orthogonal function [d _ki ], d _ik : element of matrix [d _ik ], [d _ik ]: matrix [ d _ki ] transposed matrix 1: frame memory 2: reference voltage selector 3: field counter 4: orthogonal conversion signal generator 5: video signal buffer memory 6: column signal buffer memory 7: column voltage generator 8: orthogonal function generation 9: Row signal generator 10: Row voltage generator 11: Display panel 12: Controller 13: Frame memory address decoder 14: Non-selection voltage generator

Claims (3)

[Claims] 1. A driving method of a display device, wherein a light transmittance of a pixel selected by the row electrode and the column electrode is changed in accordance with a difference in applied voltage between the row electrode and the column electrode, wherein a column electrode signal is used. Is an orthogonal transformation signal obtained by transforming a video signal corresponding to the position of the selected row electrode on the display panel by an orthogonal function, and a signal of the orthogonal function is added as a row electrode signal to the selected row electrode. In the driving method, in order to obtain a predetermined gradation level, the digital video signal of one screen is distributed to the same number of sub-screens as the bit length for each bit weight, and the peak value of the driving voltage in each sub-screen is signal bit. And the effective value of the drive voltage corresponding to the low level of the sub-screen is made to match a predetermined voltage regardless of the bit weight. 2. A method of driving a display device according to claim 1, wherein a plurality of row electrodes are simultaneously selected. 3. The row voltage and the column voltage are generated based on a common reference voltage source while keeping the ratio of the peak value of the row voltage and the peak value of the column voltage constant, and each sub-screen is generated. The target gray level is realized by changing the row voltage and the column voltage at the same ratio according to the weight of the bit corresponding to, and applying a constant bias voltage to the row electrode when not selected. The driving method of the display device according to claim 1.