JPH0736409A - Driving circuit for display device - Google Patents

Driving circuit for display device

Info

Publication number
JPH0736409A
JPH0736409A JP17832593A JP17832593A JPH0736409A JP H0736409 A JPH0736409 A JP H0736409A JP 17832593 A JP17832593 A JP 17832593A JP 17832593 A JP17832593 A JP 17832593A JP H0736409 A JPH0736409 A JP H0736409A
Authority
JP
Japan
Prior art keywords
light emitting
signal
emitting element
electrodes
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17832593A
Other languages
Japanese (ja)
Other versions
JP3313830B2 (en
Inventor
Mitsunao Sakamoto
三直 坂本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP17832593A priority Critical patent/JP3313830B2/en
Priority to US08/273,816 priority patent/US5594463A/en
Publication of JPH0736409A publication Critical patent/JPH0736409A/en
Application granted granted Critical
Publication of JP3313830B2 publication Critical patent/JP3313830B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To provide a driving circuit for a display device capable of attaining a proper light emitting state after a light emitting element is used for a long period and reducing power consumption in the initial state of using the light emitting element. CONSTITUTION:This device is constituted so as to incorporate a display panel constituted of plural scanning electrodes 16 and plural signal electrodes 12-12' arranged in matrix and the light emitting elements 14-14' connected to the scanning electrodes 16 and the signal electrodes 12-12', a driving means supplying constant current driving signals to the signal electrodes 12-12' according to an input signal, a detection means detecting a forward voltage drop in the light emitting elements 14-14' and a control means controlling so that a prescribed voltage is applied to the driving means according to a detection signal from the detection means.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、表示装置の駆動回路に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit for a display device.

【0002】[0002]

【従来の技術】表示装置では、複数の走査電極及び複数
の信号電極がマトリクス状に配置され、走査電極と信号
電極との交点部分では、該走査電極及び信号電極に発光
素子が接続されている。そして、1つの共通走査電極に
対して、所望の信号電極に定電流駆動信号を供給するこ
とにより、対応する発光素子を発光状態にしている。
2. Description of the Related Art In a display device, a plurality of scanning electrodes and a plurality of signal electrodes are arranged in a matrix, and light emitting elements are connected to the scanning electrodes and the signal electrodes at the intersections of the scanning electrodes and the signal electrodes. . Then, by supplying a constant current drive signal to a desired signal electrode with respect to one common scanning electrode, the corresponding light emitting element is brought into a light emitting state.

【0003】[0003]

【発明が解決しようとする課題】上記表示装置におい
て、発光素子(EL素子)は、長期間使用すると性能が
劣化し、順方向電圧降下(VF )が大きくなることが知
られている。そこで、表示装置では、発光素子の順方向
電圧降下VF が大きくなることを見込んで、駆動手段に
印加される電圧を予め高く設定している。ところが、こ
のように駆動手段への電圧を予め高く設定すると、発光
素子の性能が劣化していない初期状態においても駆動手
段に高い電圧が印加されることになり、この結果、駆動
手段のトランジスタで消費される電力が多くなり、消費
電力の無駄が生じていた。
In the above display device THE INVENTION An object you try solving], the light emitting element (EL element), a long period of time when using the performance is deteriorated, it is known that the forward voltage drop (V F) is increased. Therefore, in the display device, the voltage applied to the driving means is set to a high value in advance in consideration of the increase in the forward voltage drop V F of the light emitting element. However, if the voltage to the driving means is set high in advance, a high voltage is applied to the driving means even in the initial state where the performance of the light emitting element is not deteriorated, and as a result, the transistor of the driving means is applied. The amount of power consumed increases, resulting in wasted power consumption.

【0004】本発明の目的は、発光素子の長期間使用後
に適切な発光状態を達成できるとともに、発光素子の使
用の初期状態においては、消費電力を低減することがで
きる表示装置の駆動回路を提供することにある。
An object of the present invention is to provide a drive circuit for a display device, which can achieve an appropriate light emitting state after long-term use of the light emitting element and can reduce power consumption in the initial state of use of the light emitting element. To do.

【0005】[0005]

【課題を解決するための手段】本発明は、マトリクス状
に配置された複数の走査電極及び複数の信号電極と、該
走査電極及び信号電極に接続された発光素子と、から構
成される表示パネルと、入力信号に応じて前記信号電極
に定電流駆動信号を供給する駆動手段と、前記発光素子
での順方向電圧降下を検出する検出手段と、該検出手段
からの検出信号に応じて前記駆動手段に所定の電圧が印
加されるように制御する制御手段と、を含むことを特徴
とする。
The present invention is a display panel comprising a plurality of scanning electrodes and a plurality of signal electrodes arranged in a matrix, and a light emitting element connected to the scanning electrodes and the signal electrodes. Drive means for supplying a constant current drive signal to the signal electrode in response to an input signal, detection means for detecting a forward voltage drop in the light emitting element, and the drive means in response to a detection signal from the detection means. Control means for controlling such that a predetermined voltage is applied to the means.

【0006】[0006]

【作用】発光素子(EL素子)を長期間使用すると、性
能が徐々に劣化し、発光素子での順方向電圧降下VF
大きくなるので、駆動手段に印加されている電圧が不足
し、その結果、駆動手段が正常に動作しない可能性があ
る。そこで、駆動手段から発光素子に接続された信号電
極の電圧を検出する検出部を設けて、発光素子の電圧降
下VF を測定し、該電圧降下VF が小さい場合には、駆
動手段への電圧を低く設定する。これにより、駆動手段
には必要最小限度の電圧が印加されるので、消費電力を
低減することができる。一方、発光素子の長期間の使用
により、発光素子の電圧降下VF が大きくなると、駆動
手段への電圧を上昇させ、駆動手段が正常な定電流動作
を行うようにする。
When the light emitting element (EL element) is used for a long period of time, the performance gradually deteriorates and the forward voltage drop V F in the light emitting element increases, so that the voltage applied to the driving means becomes insufficient, As a result, the drive means may not operate normally. Therefore, by providing a detector for detecting a voltage of the connected signal electrodes in the light-emitting element from the driving means to measure the voltage drop V F of the light emitting element, when the voltage drop V F is small, to the drive means Set the voltage low. As a result, the minimum necessary voltage is applied to the driving means, so that power consumption can be reduced. On the other hand, when the voltage drop V F of the light emitting element becomes large due to the long-term use of the light emitting element, the voltage to the driving means is increased so that the driving means performs a normal constant current operation.

【0007】次に、図1には、本発明の原理による表示
装置の駆動回路が示されており、図1は、単純マトリク
スの例(定電流駆動)を示す。図1において、電流電圧
(+V)は、駆動手段の定電流源10〜10及び信号電
極12〜12を介して発光素子14〜14に供給され、
該発光素子14〜14は、走査電極16を介してGND
に接続される。なお、発光素子14〜14はその陽極が
信号電極12〜12に接続され、その陰極が走査電極1
6に接続されている。また、符号12a〜12aは信号
電極12〜12の抵抗分を示し、符号16a〜16aは
走査電極16の抵抗分を示す。
Next, FIG. 1 shows a drive circuit of a display device according to the principle of the present invention, and FIG. 1 shows an example of a simple matrix (constant current drive). In FIG. 1, the current voltage (+ V) is supplied to the light emitting elements 14 to 14 through the constant current sources 10 to 10 and the signal electrodes 12 to 12 of the driving means,
The light emitting elements 14 to 14 are connected to the GND via the scanning electrode 16.
Connected to. The light emitting elements 14 to 14 have their anodes connected to the signal electrodes 12 to 12 and their cathodes to the scanning electrode 1.
Connected to 6. Reference numerals 12a to 12a indicate resistance components of the signal electrodes 12 to 12, and reference numerals 16a to 16a indicate resistance components of the scanning electrode 16.

【0008】上記の構成において、選択されている走査
電極16に対して最も電位差が大きくなるのは、画面の
中心付近を駆動する信号電極12´(図1では右端の信
号電極)と走査電極16とが選択され、しかも、その走
査電極16につながる全ての発光素子14〜14がON
する場合である。なお、画面の中心付近を駆動する信号
電極12´が走査電極16に対して最も電位差が大きく
なる理由としては、他の信号電極12と比較して、信号
電極12´に接続された発光素子14´がGNDに達す
るまでの走査電極16の長さが最も長く、すなわち、走
査電極16の抵抗分16a〜16aが最も大きいからで
ある。
In the above structure, the potential difference becomes the largest with respect to the selected scanning electrode 16 because the signal electrode 12 '(the rightmost signal electrode in FIG. 1) for driving near the center of the screen and the scanning electrode 16 are used. Is selected, and all the light emitting elements 14 to 14 connected to the scanning electrode 16 are turned on.
This is the case. The reason why the signal electrode 12 ′ driving near the center of the screen has the largest potential difference with respect to the scanning electrode 16 is that the light emitting element 14 connected to the signal electrode 12 ′ is larger than the other signal electrodes 12. This is because the length of the scan electrode 16 until ′ reaches GND is the longest, that is, the resistance components 16a to 16a of the scan electrode 16 are the largest.

【0009】以上のように、信号電極12´の電圧が最
も上昇するので、この信号電極12´の電位差を検出端
子18で測定し、該検出電圧に基づいて、電源電圧(+
V)を適切に設定することができる。すなわち、発光素
子14´の長期間の使用により該発光素子14´の電圧
降下VF が大きくなると、検出端子18での検出電圧に
基づいて、電源電圧(+V)を上昇させ、定電流源10
´が正常な定電流動作を行うようにする。
As described above, since the voltage of the signal electrode 12 'rises most, the potential difference of the signal electrode 12' is measured at the detection terminal 18, and the power supply voltage (+
V) can be set appropriately. That is, when the voltage drop V F of the light emitting element 14 ′ becomes large due to the long-term use of the light emitting element 14 ′, the power supply voltage (+ V) is raised based on the detection voltage at the detection terminal 18, and the constant current source 10
Let ´ perform normal constant current operation.

【0010】なお、図1においては、画面の中心付近を
駆動する信号電極12´の電圧を検出端子18で検出し
ているが、検出点は画面の中心付近に限られず、他のど
の画素にも設定することができる。この場合には、配線
の電圧降下等の分を考慮して検出電圧を修正し、定電流
源10〜10が正常に動作するように定電流源10〜1
0の電源電圧(+V)を設定する。
In FIG. 1, the voltage of the signal electrode 12 'driving near the center of the screen is detected by the detection terminal 18, but the detection point is not limited to the vicinity of the center of the screen, and any other pixel may be detected. Can also be set. In this case, the detected voltage is corrected in consideration of the voltage drop of the wiring, etc., so that the constant current sources 10 to 10 operate normally.
The power supply voltage (+ V) of 0 is set.

【0011】[0011]

【実施例】以下、図面に基づいて本発明の好適な実施例
を説明する。図2には、表示装置の概略構成が示されて
いる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings. FIG. 2 shows a schematic configuration of the display device.

【0012】図2において、符号30は、表示パネルを
示し、該表示パネル30はXドライバ32及びYドライ
バ34により駆動される。一方、ビデオ信号はA/Dコ
ンバータ36を介してメモリ38に供給され、該メモリ
38からのデータは、Xドライバ32に供給される。な
お、Xドライバ32,Yドライバ34及びメモリ38は
コントローラ42により制御される。
In FIG. 2, reference numeral 30 indicates a display panel, which is driven by an X driver 32 and a Y driver 34. On the other hand, the video signal is supplied to the memory 38 via the A / D converter 36, and the data from the memory 38 is supplied to the X driver 32. The X driver 32, the Y driver 34, and the memory 38 are controlled by the controller 42.

【0013】図3には、表示装置の回路構成が示されて
いる。図3において、映像信号は、A/Dコンバータ3
6を介してメモリとしてのシフトレジスタ38に供給さ
れ、該シフトレジスタ38は、複数のフリップフロップ
回路(以下FFという)44〜44を含む。シフトレジ
スタ38内のFF44〜44からの信号は、Xドライバ
40内でFF46〜46を介してPWM変調器48〜4
8に供給される。PWM変調器48〜48からの信号
(輝度データに対応したパルス幅を示すアナログ信号)
は、信号電極A0 ,A1 ,A2 ,A3 ,…に供給され、
一方、Yドライバ34内のFF50〜50からの信号
は、走査電極K0 ,K1 ,K2 ,K3 ,…に供給され、
これらの信号電極A0 ,A1 ,A2 ,A3 ,…及び走査
電極K0 ,K1 ,K2 ,K3 ,…により、表示パネル3
0のマトリクスが構成される。表示パネル30におい
て、信号電極A0 ,A1 ,A2 ,A3 ,…と走査電極K
0 ,K1 ,K2 ,K3 ,…との交点部分では信号電極A
0,A1 ,A2 ,A3 ,…及び走査電極K0 ,K1 ,K
2 ,K3 ,…に発光素子52〜52が接続されている。
FIG. 3 shows a circuit configuration of the display device. In FIG. 3, the video signal is the A / D converter 3
6 is supplied to a shift register 38 as a memory, and the shift register 38 includes a plurality of flip-flop circuits (hereinafter referred to as FF) 44 to 44. The signals from the FFs 44 to 44 in the shift register 38 are fed to the PWM modulators 48 to 4 in the X driver 40 via the FFs 46 to 46.
8 are supplied. Signals from the PWM modulators 48 to 48 (an analog signal indicating a pulse width corresponding to luminance data)
Are supplied to the signal electrodes A 0 , A 1 , A 2 , A 3 , ...
On the other hand, the signals from the FFs 50 to 50 in the Y driver 34 are supplied to the scan electrodes K 0 , K 1 , K 2 , K 3 , ...
By these signal electrodes A 0 , A 1 , A 2 , A 3 , ... And scan electrodes K 0 , K 1 , K 2 , K 3 ,.
A matrix of 0s is constructed. In the display panel 30, the signal electrodes A 0 , A 1 , A 2 , A 3 , ...
At the intersection with 0 , K 1 , K 2 , K 3 , ...
0 , A 1 , A 2 , A 3 , ... And scan electrodes K 0 , K 1 , K
Light emitting elements 52 to 52 are connected to 2 , K 3 ,.

【0014】コントローラとしてのタイミングジェネレ
ータ42は、水平同期信号及び垂直同期信号を受取り、
信号SCLK,LCLK,FPUL,及びFCLKを出
力する。信号SCLKは、A/Dコンバータ36及びシ
フトレジスタ38内のFF44〜44に供給され、信号
LCLKはXドライバ40内のFF46〜46に供給さ
れ、信号FPUL及びFCLKは、Yドライバ34内の
FF50〜50に供給される。
The timing generator 42 as a controller receives the horizontal synchronizing signal and the vertical synchronizing signal,
It outputs the signals SCLK, LCLK, FPUL, and FCLK. The signal SCLK is supplied to the FFs 44 to 44 in the A / D converter 36 and the shift register 38, the signal LCLK is supplied to the FFs 46 to 46 in the X driver 40, and the signals FPUL and FCLK are supplied to the FF 50 to FF in the Y driver 34. 50.

【0015】前記Xドライバ40内のPWM変調器48
〜48には、水平同期信号H〜Hが供給される。図4に
は、図3の表示装置のタイミングチャートが示されてい
る。
A PWM modulator 48 in the X driver 40
Horizontal synchronization signals H to H are supplied to the signals to 48. FIG. 4 shows a timing chart of the display device of FIG.

【0016】図4(A)のXドライバのタイミングチャ
ートを説明すると、映像信号をA/Dコンバータ36で
A/D変換してサンプリングする毎に、A/D変換され
たデータDATAは、信号SCLKにより、シフトレジ
スタ38内のFF44〜44に順次シフトされる。そし
て、1水平同期期間のデータDATAが全てFF44〜
44に送られると、信号LCLKにより、FF44〜4
4内のデータはXドライバ32内のFF46〜46を介
してPWM変調器48〜48に供給される。PWM変調
器48〜48は送られたデータをPWM変調し、データ
に対応する長さのパルスを信号電極A0 ,A1 ,A2
3 ,…に出力する。
Explaining the timing chart of the X driver of FIG. 4A, every time the video signal is A / D converted by the A / D converter 36 and sampled, the A / D converted data DATA is converted into the signal SCLK. Thus, the FFs 44 to 44 in the shift register 38 are sequentially shifted. Then, all the data DATA in one horizontal synchronization period are FF44-
44 is sent to the FFs 44 to 4 by the signal LCLK.
The data in 4 is supplied to the PWM modulators 48 to 48 via the FFs 46 to 46 in the X driver 32. The PWM modulators 48 to 48 perform PWM modulation on the transmitted data, and generate a pulse having a length corresponding to the data to the signal electrodes A 0 , A 1 , A 2 ,
Output to A 3 , ....

【0017】図4(B)のYドライバのタイミングチャ
ートを説明すると、信号FPULは、垂直同期期間に1
回“High”レベルになり、信号FCLKにより、信号F
PULのパルスが走査電極(ライン)K0 ,K1
2 ,K3 ,…に順次転送されていく。そして、走査ラ
インKn (n=0,1,2,3,…)が“High”レベル
のとき、そのラインKn が点火することになる。なお、
信号FCLKは1水平同期期間に1回パルスを出力し、
信号FPULは1垂直同期期間に1回パルスを出力す
る。
Explaining the timing chart of the Y driver of FIG. 4B, the signal FPUL is 1 in the vertical synchronization period.
It goes to “High” level, and the signal FCLK
The pulse of PUL is applied to the scan electrodes (lines) K 0 , K 1 ,
The data is sequentially transferred to K 2 , K 3 , .... When the scanning line K n (n = 0, 1, 2, 3, ...) Is at the “High” level, the line K n is ignited. In addition,
The signal FCLK outputs a pulse once in one horizontal synchronization period,
The signal FPUL outputs a pulse once in one vertical synchronization period.

【0018】次に、図5には本発明の実施例による表示
装置の駆動回路の概略構成が示されている。図5におい
て、符号54はCPUを示し、該CPU54は、バス5
6に接続されており、また、バス56には、ROM5
8、RAM60、D/Aコンバータ62,64、入力ポ
ート66,68が接続されている。なお、D/Aコンバ
ータ62,64は、それぞれ、駆動電圧指令,駆動電流
指令を出力し、また、入力ポート66,68には、それ
ぞれ、走査電極(陰極)タイミング,信号電極(陽極)
タイミングが供給されている。
Next, FIG. 5 shows a schematic structure of a drive circuit of a display device according to an embodiment of the present invention. In FIG. 5, reference numeral 54 denotes a CPU, and the CPU 54 is the bus 5
6 and the ROM 56 on the bus 56.
8, RAM 60, D / A converters 62 and 64, and input ports 66 and 68 are connected. The D / A converters 62 and 64 output driving voltage commands and driving current commands, respectively, and the input ports 66 and 68 respectively scan electrode (cathode) timing and signal electrode (anode).
Timing is being supplied.

【0019】前記バス56には、マルチプレクサ70が
A/Dコンバータ72を介して接続され、該マルチプレ
クサ70はS/H回路74,76,78からの信号を受
ける。ここで、S/H回路74,76,78は、それぞ
れ、端子A,端子B,表示パネルの温度センサ80から
の信号を受ける。なお、端子A,端子B,温度センサ8
0については後述する。
A multiplexer 70 is connected to the bus 56 via an A / D converter 72, and the multiplexer 70 receives signals from S / H circuits 74, 76 and 78. Here, the S / H circuits 74, 76 and 78 receive signals from the terminal A, the terminal B and the temperature sensor 80 of the display panel, respectively. The terminals A, B, and the temperature sensor 8
Zero will be described later.

【0020】次に、図6には本発明の実施例による表示
装置の駆動回路の回路構成が示されている。図6におい
て、符号30は表示パネルを示し、該表示パネル30
は、Xドライバ32及びYドライバ34により駆動され
る。Xドライバ32からの信号電極A 0 ,A1 ,…及び
走査電極K0 ,K1 ,K2 …により表示パネル30のマ
トリクスが構成され、信号電極A0 ,A1 ,…と走査電
極K0 ,K1 ,K2 ,…との交点部分では、該信号電極
0 ,A1 ,…及び走査電極K0 ,K1 ,K2 ,…に発
光素子52〜52が接続されている。
Next, FIG. 6 shows a display according to an embodiment of the present invention.
The circuit configuration of the drive circuit of the device is shown. Smell in Figure 6
Reference numeral 30 denotes a display panel, and the display panel 30
Are driven by the X driver 32 and the Y driver 34.
It Signal electrode A from the X driver 32 0, A1,…as well as
Scan electrode K0, K1, K2The display panel 30
Tricks are configured and signal electrode A0, A1,… And Scanning
Pole K0, K1, K2,, ... at the intersection with the signal electrode
A0, A1, And scan electrode K0, K1, K2Departs from
The optical elements 52 to 52 are connected.

【0021】まず、Yドライバ34について説明する。
Yドライバ34において、走査電極K0 ,K1 ,K2
…が1走査期間(すなわち1水平周期期間)ずつ順次
“High”レベルになると、その“High”レベルになった
走査電極Kn (n=0,1,2,…)に接続された発光
素子52〜52が点灯する。ここで、素子52〜52が
どの程度の輝度で点灯するかは、Xドライバ32からの
信号電極A0 ,A1 ,…の信号により決定される。
First, the Y driver 34 will be described.
In the Y driver 34, the scan electrodes K 0 , K 1 , K 2 ,
When the scanning signal sequentially becomes "High" level for one scanning period (that is, one horizontal cycle period), the light emitting element connected to the scanning electrode K n (n = 0, 1, 2, ...) At the "High" level 52 to 52 are lit. Here, how bright the elements 52 to 52 are turned on is determined by signals from the signal electrodes A 0 , A 1 , ... From the X driver 32.

【0022】次に、Xドライバ32について説明する。
符号82は、電源回路を示し、該電源回路82内のコン
パレータ84の一端子には、CPU54からの電圧指令
がA/Dコンバータ62を介して供給されている。
Next, the X driver 32 will be described.
Reference numeral 82 indicates a power supply circuit, and a voltage command from the CPU 54 is supplied to one terminal of a comparator 84 in the power supply circuit 82 via the A / D converter 62.

【0023】このCPU54からの電圧指令を制御する
ことにより、電源回路82からの信号電極(陽極)の電
源電圧VD を制御することができる。前記電源回路82
からの電源電圧VD は、定電流源88に供給され、該定
電流源88内のトランシジスタ90,91,91,…に
は、CPU54からの電流指令がD/Aコンバータ64
及び電圧/電流交換器(V/I変換器)94を介して供
給されている。このCPU54からの電流指令を制御す
ることにより、定電流源88からの定電流値を制御する
ことができる。
By controlling the voltage command from the CPU 54, the power supply voltage V D of the signal electrode (anode) from the power supply circuit 82 can be controlled. The power supply circuit 82
The power supply voltage V D from the constant current source 88 is supplied to the constant current source 88, and the current commands from the CPU 54 are supplied to the transistors 90, 91, 91, ... In the constant current source 88.
And a voltage / current exchanger (V / I converter) 94. By controlling the current command from the CPU 54, the constant current value from the constant current source 88 can be controlled.

【0024】前記停電流源88からの停電流は、信号電
極A0 ,A1 ,…に供給され、該信号電極A0 ,A1
…は、分岐してトランジスタ96−0,96−1,…の
コレクタに接続されている。このトランジスタ96−
0,96−1,…のベースは、PWM変調器48−0,
48−1,…に接続されている。そして、例えば、PW
M変調器48−0が“High”レベルであると、トランジ
スタ96−0がオン状態になって、該トランジスタ96
−0内を信号電極A0 の定電流が流れるので、信号電極
0 に接続された発光素子52は、消灯状態である。一
方、PWM変調器48−0が“Low ”レベルであると、
トランジスタ96−0がオフ状態になり、信号電極A0
の定電流は、発光素子52に供給されるので、該発光素
子52は、点灯状態である。なお、発光素子52の点灯
時に、該発光素子52の輝度は、PWM変調器48が
“Low ”レベルになる時間により決定される。
The stop current from the stop current source 88 is supplied to the signal electrodes A 0 , A 1 , ... And the signal electrodes A 0 , A 1 ,.
Are branched and connected to the collectors of the transistors 96-0, 96-1 ,. This transistor 96-
The bases of 0, 96-1, ... Are PWM modulators 48-0,
48-1, ... And, for example, PW
When the M modulator 48-0 is at the "High" level, the transistor 96-0 is turned on and the transistor 96-0 is turned on.
The constant current of the signal electrodes A 0 within -0 flows, the light emitting element 52 connected to the signal electrode A 0 is in the off state. On the other hand, if the PWM modulator 48-0 is at "Low" level,
The transistor 96-0 is turned off, and the signal electrode A 0
Since the constant current of is supplied to the light emitting element 52, the light emitting element 52 is in a lighting state. When the light emitting element 52 is turned on, the brightness of the light emitting element 52 is determined by the time when the PWM modulator 48 is at the “Low” level.

【0025】前記発光素子52の電圧降下VF を検出す
るために、信号電極A0 には、検出用端子Aが設けら
れ、走査電極K0 には、検出用端子Bが設けられてい
る。両端子A,Bからの検出信号は、CPU54に供給
され、CPU54では、両端子A,Bからの検出信号に
基づいて発光素子52の電圧降下VF を求め、該電圧降
下VF に基づいて電圧指令を発生する。この電圧指令
は、前述したように、D/Aコンバータ62を介して電
源回路82内のコンパレータ84の一端子に供給され、
これにより、電源回路82からの電源電圧VD が適切な
値に制御される。
In order to detect the voltage drop V F of the light emitting element 52, the signal electrode A 0 is provided with a detection terminal A, and the scanning electrode K 0 is provided with a detection terminal B. The detection signals from both terminals A and B are supplied to the CPU 54, and the CPU 54 obtains the voltage drop V F of the light emitting element 52 based on the detection signals from both terminals A and B, and based on the voltage drop V F. Generate voltage command. As described above, this voltage command is supplied to one terminal of the comparator 84 in the power supply circuit 82 via the D / A converter 62,
As a result, the power supply voltage V D from the power supply circuit 82 is controlled to an appropriate value.

【0026】以下、電源電圧VD を制御する過程を図7
のフローチャートを参照しながら説明する。ステップ1
00でスタートし、ステップ102で駆動電流値を設定
し、すなわち、輝度を設定する。ステップ104で測定
すべき発光素子を選択し、走査電極(陰極)がアクティ
ブになると、ステップ106に進み、ステップ106で
測定すべき発光素子を駆動し、信号電極(陽極)がアク
ティブになると、ステップ108に進む。
The process of controlling the power supply voltage V D will be described below with reference to FIG.
This will be described with reference to the flowchart of FIG. Step 1
Starting at 00, a drive current value is set at step 102, that is, brightness is set. When the light emitting element to be measured is selected in step 104 and the scanning electrode (cathode) becomes active, the process proceeds to step 106, in which the light emitting element to be measured in step 106 is driven, and when the signal electrode (anode) becomes active, step Proceed to 108.

【0027】ステップ108で端子A,GND間または
端子A,B間の電位差VX を測定する。ステップ110
で駆動電流値,信号電極(陽極)及び走査電極(陰極)
の抵抗値から陽極及び陰極での電圧降下分を推定し、こ
の推定した電圧降下を前記電位差VX から引き、発光素
子の電圧降下VF を求める。ステップ112で求めた電
圧降下VF と予め設定してある電流値から必要最小限の
駆動電圧VD を推定する。
In step 108, the potential difference V X between the terminals A and GND or between the terminals A and B is measured. Step 110
Drive current value, signal electrode (anode) and scan electrode (cathode)
The amount of voltage drop at the anode and the cathode is estimated from the resistance value of 1, and the estimated voltage drop is subtracted from the potential difference V X to obtain the voltage drop V F of the light emitting element. The minimum required drive voltage V D is estimated from the voltage drop V F obtained in step 112 and the preset current value.

【0028】なお、前記ステップ108,110におい
て、要するに、電圧が最も上昇する部分と、電源との電
位差を求めている。次のステップ114で、設定できる
D の最大値が推定したVD の値より大きいと、ステッ
プ116で推定したVD を駆動電圧に設定する。一方、
ステップ114の結果が“NO”であると、ステップ1
18で表示パネルの寿命が来たことを表示し、ステップ
120で終了する。
In steps 108 and 110, the potential difference between the portion where the voltage rises most and the power supply is obtained. In the next step 114, it sets the value larger than V D where the maximum value of V D is estimated that can be set, the V D estimated in step 116 to the driving voltage. on the other hand,
If the result of step 114 is "NO", step 1
In step 18, it is displayed that the display panel has reached the end of its life, and in step 120, the process ends.

【0029】次に、図8には上記図7のフローチャート
の変形例が示されている。図8において、ステップ10
0〜110までは、図7のステップ100〜110と同
じであるが、ステップ110からはステップ122に進
み、表示パネルの温度TP を測定し(図5の温度センサ
80を参照)、ステップ124で表示パネルの温度TP
が上限温度を越えていると、ステップ126で駆動電流
値を下げる。一方、ステップ124で“NO”である
と、ステップ128で表示パネルの温度TP に基づいて
発光素子の電圧降下VF を補正し、その後、図7と同じ
ステップ112,114,116に進む。なお、ステッ
プ114で“NO”であると、ステップ118で表示パ
ネルの寿命が来たことを表示し、ステップ130で駆動
電流値を下げ、輝度を下げる。
Next, FIG. 8 shows a modification of the flowchart of FIG. In FIG. 8, step 10
Although 0 to 110 are the same as steps 100 to 110 in FIG. 7, the process proceeds from step 110 to step 122 to measure the temperature T P of the display panel (see the temperature sensor 80 in FIG. 5) and step 124. Display panel temperature T P
Is higher than the upper limit temperature, the drive current value is decreased in step 126. On the other hand, if “NO” in the step 124, the voltage drop V F of the light emitting element is corrected based on the temperature T P of the display panel in a step 128, and then the process proceeds to the same steps 112, 114 and 116 as in FIG. 7. If "NO" in step 114, it is displayed in step 118 that the display panel has reached the end of its life. In step 130, the drive current value is reduced and the brightness is reduced.

【0030】次に、図9には、定電流駆動回路の回路構
成が2つ示されている。図9(A)の第1構成におい
て、電源電圧+Vはカレントミラー構成の定電流源88
に供給され、該定電流源88内のトランジスタ90,9
1には基準電流Irefが供給されている。定電流源88か
らの定電流は、信号電極A0 を介して発光素子52に供
給される。信号電極A0 は、分岐してトランジスタ96
のコレクタに接続され、該トランジスタ96のベースに
は、発光のオンオフ信号が供給される。
Next, FIG. 9 shows two circuit configurations of the constant current drive circuit. In the first configuration of FIG. 9A, the power supply voltage + V is the constant current source 88 of the current mirror configuration.
Is supplied to the transistors 90 and 9 in the constant current source 88.
The reference current Iref is supplied to 1. The constant current from the constant current source 88 is supplied to the light emitting element 52 via the signal electrode A 0 . The signal electrode A 0 branches to the transistor 96.
And a base of the transistor 96 is supplied with a light emission ON / OFF signal.

【0031】そして、発光のオンオフ信号が“High”レ
ベルであると、トランジスタ96がオン状態であるの
で、該トランジスタ96内を信号電極A0 の定電流が流
れ、発光素子52は、消灯状態である。一方、発光のオ
ンオフ信号が“Low ”レベルであると、トランジスタ9
6がオフ状態になり、信号電極A0 の定電流は、発光素
子52に供給されるので、該発光素子52は点灯状態で
ある。
When the light emission on / off signal is at the "High" level, the transistor 96 is in the on state, so a constant current of the signal electrode A 0 flows in the transistor 96, and the light emitting element 52 is in the off state. is there. On the other hand, when the light emission on / off signal is at the “Low” level,
Since 6 is turned off and the constant current of the signal electrode A 0 is supplied to the light emitting element 52, the light emitting element 52 is in a lighting state.

【0032】図9(B)の第2構成において、発光のオ
ンオフ信号に応じてTTL132からの出力はVOHある
いはVOLになり、これにより、トランジスタ134はオ
ン状態あるいはオフ状態になる。この結果、トランジス
タ134からの定電流IF が発光素子52に供給された
り、供給されなかったりする。なお、トランジスタ13
4のオン時に、定電流IF は、次の式で示される。
In the second configuration shown in FIG. 9B, the output from the TTL 132 becomes V OH or V OL in response to the light emission ON / OFF signal, whereby the transistor 134 is turned on or off. As a result, the constant current I F from the transistor 134 may or may not be supplied to the light emitting element 52. Note that the transistor 13
When ON, the constant current I F is expressed by the following equation.

【0033】IF =(VC −VOL+VBE)/RI F = (V C −V OL + V BE ) / R

【0034】[0034]

【発明の効果】以上説明したように、本発明によれば、
発光素子での電圧降下を測定し、該電圧降下に応じて駆
動手段に所定の電圧が印加される構成であるので、発光
素子の長期間の使用により該発光素子の電圧降下が大き
くなった場合には、駆動手段に高い電圧が印加され、こ
れにより、発光素子の適切な発光状態が達成される。一
方、発光素子の性能が劣化していない初期状態において
は、発光素子の電圧降下が小さいので、駆動手段に低い
電圧が印加され、この結果、駆動手段での消費電力を低
減させることができる。
As described above, according to the present invention,
When the voltage drop of the light emitting element becomes large due to the long-term use of the light emitting element because the voltage drop in the light emitting element is measured and a predetermined voltage is applied to the driving means according to the voltage drop. A high voltage is applied to the driving means to achieve an appropriate light emitting state of the light emitting element. On the other hand, in the initial state where the performance of the light emitting element is not deteriorated, the voltage drop of the light emitting element is small, so that a low voltage is applied to the driving means, and as a result, the power consumption of the driving means can be reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の原理による表示装置の駆動回路の回路
図である。
FIG. 1 is a circuit diagram of a drive circuit of a display device according to the principles of the present invention.

【図2】表示装置の概略構成図である。FIG. 2 is a schematic configuration diagram of a display device.

【図3】表示装置の回路構成図である。FIG. 3 is a circuit configuration diagram of a display device.

【図4】表示装置のタイミングチャート図であり、
(A)はXドライバのタイミングチャートを示し、
(B)はYドライバのタイミングチャートを示す。
FIG. 4 is a timing chart of the display device,
(A) shows a timing chart of the X driver,
(B) shows a timing chart of the Y driver.

【図5】本発明の実施例による表示装置の駆動回路の概
略構成図である。
FIG. 5 is a schematic configuration diagram of a drive circuit of a display device according to an embodiment of the present invention.

【図6】本発明の実施例による表示装置の駆動回路の回
路構成図である。
FIG. 6 is a circuit configuration diagram of a drive circuit of a display device according to an embodiment of the present invention.

【図7】実施例による駆動回路の作用を示す第1のフロ
ーチャート図である。
FIG. 7 is a first flowchart showing the operation of the drive circuit according to the embodiment.

【図8】実施例による駆動回路の作用を示す第2のフロ
ーチャート図である。
FIG. 8 is a second flowchart showing the operation of the drive circuit according to the embodiment.

【図9】定電流駆動回路の回路構成図であり、(A)
(B)はそれぞれ、第1構成,第2構成を示す。
FIG. 9 is a circuit configuration diagram of a constant current drive circuit, (A)
(B) shows the 1st structure and the 2nd structure, respectively.

【符号の説明】[Explanation of symbols]

10〜10,10´…定電流源 12〜12,12´…信号電極 14〜14,14´…発光素子 16…走査電極 18…検出端子 10-10, 10 '... Constant current source 12-12, 12' ... Signal electrode 14-14, 14 '... Light emitting element 16 ... Scan electrode 18 ... Detection terminal

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 マトリクス状に配置された複数の走査電
極及び複数の信号電極と、該走査電極及び信号電極に接
続された発光素子と、から構成される表示パネルと、 入力信号に応じて前記信号電極に定電流駆動信号を供給
する駆動手段と、 前記発光素子での順方向電圧降下を検出する検出手段
と、 該検出手段からの検出信号に応じて前記駆動手段に所定
の電圧が印加されるように制御する制御手段と、 を含むことを特徴とする表示装置の駆動回路。
1. A display panel comprising a plurality of scan electrodes and a plurality of signal electrodes arranged in a matrix, and a light emitting element connected to the scan electrodes and the signal electrodes, and a display panel according to an input signal. Driving means for supplying a constant current driving signal to the signal electrode, detecting means for detecting a forward voltage drop in the light emitting element, and a predetermined voltage is applied to the driving means according to the detection signal from the detecting means. A drive circuit of a display device, comprising:
JP17832593A 1993-07-19 1993-07-19 Display device drive circuit Expired - Fee Related JP3313830B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP17832593A JP3313830B2 (en) 1993-07-19 1993-07-19 Display device drive circuit
US08/273,816 US5594463A (en) 1993-07-19 1994-07-12 Driving circuit for display apparatus, and method of driving display apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17832593A JP3313830B2 (en) 1993-07-19 1993-07-19 Display device drive circuit

Publications (2)

Publication Number Publication Date
JPH0736409A true JPH0736409A (en) 1995-02-07
JP3313830B2 JP3313830B2 (en) 2002-08-12

Family

ID=16046517

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP3313830B2 (en)

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