JPH0734239A - Sputtering device - Google Patents
Sputtering deviceInfo
- Publication number
- JPH0734239A JPH0734239A JP18116993A JP18116993A JPH0734239A JP H0734239 A JPH0734239 A JP H0734239A JP 18116993 A JP18116993 A JP 18116993A JP 18116993 A JP18116993 A JP 18116993A JP H0734239 A JPH0734239 A JP H0734239A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- bias
- resistor
- film
- arc discharge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
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- Physical Vapour Deposition (AREA)
- Magnetic Heads (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、半導体や薄膜磁気ヘッ
ドなど薄膜応用デバイスの薄膜形成に使用するスパッタ
リング装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sputtering apparatus used for forming a thin film in a thin film application device such as a semiconductor or a thin film magnetic head.
【0002】[0002]
【従来の技術】基板にバイアスを印加するスパッタリン
グ装置は、基板にバイアス電位を印加することで、プラ
ズマの状態を変え、基板に到達するスパッタ粒子やアル
ゴンイオンの入射角度や入射エネルギーの制御を行いな
がら、成膜を行うものである。バイアスを印加すること
で、スパッタ粒子やアルゴンイオンの入射角度やエネル
ギーを制御でき、その結果、形成される膜の応力,硬度
などの物性値を制御することができるため、このスパッ
タリング装置は、近年薄膜応用デバイスの薄膜形成に多
く用いられている。2. Description of the Related Art A sputtering apparatus for applying a bias to a substrate changes the state of plasma by applying a bias potential to the substrate to control the incident angle and incident energy of sputtered particles and argon ions reaching the substrate. However, the film is formed. By applying a bias, the incident angle and energy of sputtered particles or argon ions can be controlled, and as a result, physical properties such as stress and hardness of a formed film can be controlled. It is often used for thin film formation in thin film applied devices.
【0003】以下に図5を用いて従来のスパッタリング
装置について説明する。図5は従来のスパッタリング装
置である。同図において51はチャンバー、52はター
ゲット、53はマグネット、54はカソード、55は直
流または高周波電源、56は基板、57は基板保持部、
58はバイアス印加用直流定電圧電源である。A conventional sputtering apparatus will be described below with reference to FIG. FIG. 5 shows a conventional sputtering device. In the figure, 51 is a chamber, 52 is a target, 53 is a magnet, 54 is a cathode, 55 is a direct current or high frequency power supply, 56 is a substrate, 57 is a substrate holder,
Reference numeral 58 is a DC constant voltage power supply for bias application.
【0004】以上のように構成されたスパッタリング装
置について、以下にその動作を説明する。スパッタチャ
ンバー51内に1〜10-1Pa程度の圧力のアルゴンガ
スを充満させる。カソード54を通じて、高周波または
直流電力をターゲットに印加することによって、ターゲ
ット52の表面近傍にプラズマを発生させる。このと
き、マグネット53によってターゲット52の表面に発
生させた磁界により、電子がサイクロトロン運動をする
ため、電子とアルゴンガスとの衝突回数が増加し、プラ
ズマが高密度化する。高密度化したプラズマ中の陽イオ
ンであるアルゴンイオンが、マイナス電位を持つターゲ
ット52に衝突することによって、ターゲット52を構
成する原子を叩きだす。その叩きだされた原子はスパッ
タ粒子と呼ばれる。そのスパッタ粒子がターゲット52
に対向して設置された基板56上に堆積することによっ
て、膜が形成される。膜を形成する際、基板56に直流
定電圧電源58より負のバイアス電位を印加することに
よって、基板に入射するスパッタ粒子やアルゴンイオン
のエネルギーや入射角度、またプラズマの状態を制御す
ることができ、その結果、膜の応力や硬度等の物性値を
制御することができる。The operation of the sputtering apparatus constructed as above will be described below. The sputtering chamber 51 is filled with argon gas having a pressure of about 1 to 10 −1 Pa. Plasma is generated in the vicinity of the surface of the target 52 by applying high frequency or DC power to the target through the cathode 54. At this time, the magnetic field generated on the surface of the target 52 by the magnet 53 causes cyclotron motion of the electrons, so that the number of collisions between the electrons and the argon gas increases and the density of the plasma increases. Argon ions, which are cations in the densified plasma, collide with the target 52 having a negative potential to knock out the atoms forming the target 52. The knocked out atoms are called sputtered particles. The sputtered particles are the target 52
A film is formed by depositing it on a substrate 56 placed opposite to. When a film is formed, by applying a negative bias potential from the DC constant voltage power source 58 to the substrate 56, the energy and incident angle of sputtered particles and argon ions incident on the substrate, and the plasma state can be controlled. As a result, physical properties such as stress and hardness of the film can be controlled.
【0005】[0005]
【発明が解決しようとする課題】しかしながら上記従来
の構成では、高い電気伝導性を持つ基板や、基板表面に
高電気伝導性の膜がついた基板上にバイアスを印加しな
がら成膜する際、アーク放電が発生し、基板表面にダメ
ージが生じてしまうという問題があった。図6にその時
のバイアスラインに流れる電流の時間変化を示す。通常
の電流値レベルと比較して5〜10倍のアーク電流が数
百マイクロ秒のオーダーで発生する。However, in the above conventional structure, when a film is formed while applying a bias on a substrate having high electrical conductivity or a substrate having a highly electrically conductive film on the substrate surface, There is a problem that arc discharge occurs and the substrate surface is damaged. FIG. 6 shows the time change of the current flowing through the bias line at that time. An arc current that is 5 to 10 times that of a normal current value level is generated in the order of hundreds of microseconds.
【0006】本発明は上記従来の問題を解決するもの
で、基板にバイアスを印加しながら成膜を行ってもアー
ク放電が起きないスパッタリング装置を提供することを
目的とする。The present invention solves the above conventional problems, and an object of the present invention is to provide a sputtering apparatus in which arc discharge does not occur even when a film is formed while applying a bias to a substrate.
【0007】[0007]
【課題を解決するための手段】この目的を達成するため
に、本発明の第1の発明においては、抵抗体を介してバ
イアスを基板に印加できるようにするものである。To achieve this object, in the first aspect of the present invention, a bias can be applied to the substrate through a resistor.
【0008】本発明の第2の発明においては、基板にバ
イアスを印加する直流定電圧電源を周波数特性が10k
Hz以上の直流定電圧電源とすることを特徴とするもの
である。In a second aspect of the present invention, a DC constant voltage power source for applying a bias to a substrate has a frequency characteristic of 10 k.
It is characterized by using a DC constant voltage power source of Hz or higher.
【0009】本発明の第3の発明においては、基板にバ
イアスを印加する直流電源を定電流制御と定電圧制御の
切替え可能な直流電源にし、かつその切替えを可能とす
る制御回路を持つことを特徴とするものである。In a third aspect of the present invention, the DC power supply for applying a bias to the substrate is a DC power supply capable of switching between constant current control and constant voltage control, and has a control circuit for enabling the switching. It is a feature.
【0010】[0010]
【作用】本発明の第1の発明では、基板と基板ホルダー
の間に抵抗体を設けることによって、基板にバイアスを
印加するラインの入力インピーダンスを高くすることが
できる。その結果、電流が流れやすい、即ち入力インピ
ーダンスが低いために起きるアーク放電が発生するのを
防ぐことができる。According to the first aspect of the present invention, by providing the resistor between the substrate and the substrate holder, the input impedance of the line for applying the bias to the substrate can be increased. As a result, it is possible to prevent the occurrence of arc discharge which is caused by easy current flow, that is, low input impedance.
【0011】本発明の第2の発明では、数百マイクロ病
のオーダーで発生するアーク放電を、10kHz以上の
周波数特性を持つ直流電源を用い、電流リミッタを掛け
ることで基板表面にダメージを与えるアーク電流が発生
するのを防ぐことができる。According to the second aspect of the present invention, an arc discharge which causes damage to the surface of the substrate by applying a current limiter to the arc discharge generated on the order of several hundred micro-disease using a DC power supply having a frequency characteristic of 10 kHz or more. It is possible to prevent an electric current from being generated.
【0012】本発明の第3の発明では、成膜する膜の抵
抗値が高い場合、まず定電流制御で基板にバイアスを印
加して、アーク電流の発生を防ぎながら数十Åの初期層
の成膜を行う。成膜された膜の抵抗値が高いため、第1
の発明と同様に、バイアスラインの入力インピーダンス
が高くなるため、その後膜質が安定する定電圧制御でバ
イアスを印加してもアーク放電が発生しない。According to the third aspect of the present invention, when the resistance value of the film to be formed is high, first, a bias is applied to the substrate by constant current control to prevent the generation of an arc current and prevent the generation of an initial layer of several tens of liters. A film is formed. Since the resistance of the formed film is high,
Similarly to the invention described above, since the input impedance of the bias line becomes high, arc discharge does not occur even if a bias is applied by constant voltage control after which the film quality stabilizes.
【0013】[0013]
【実施例】図1は、本発明の第1の発明の実施例を示す
スパッタリング装置である。同図において、図5と同一
物には同一番号を付し説明を省略する。本実施例におい
ては同図に示したように、抵抗体1を介して基板56を
保持するようになっているため、基板56,抵抗体1,
バイアス印加用直流電源58から構成されるバイアスラ
インの入力インピーダンスが高くなる。その結果、イン
ピーダンスが低いところへ発生するアーク放電が発生し
にくくなる。インピーダンスが高ければ高いほど、この
実施例の場合、抵抗体の抵抗値が高ければ高いほど、ア
ーク放電は発生しにくくなるが、基板にバイアス電位を
印加する場合、抵抗体の抵抗値を大きくするとその抵抗
体での電圧降下も比例して大きくなるため、電圧降下分
だけ余分に電力が必要になる。アーク放電を防止しなが
ら、もっとも効果的に基板にバイアスを印加できる抵抗
値はターゲット52と基板56の間のプラズマインピー
ダンスと同程度の抵抗値である。例えば、抵抗体1には
その中に含まれる銀の量で抵抗値を変えることが可能な
導電性ゴムシートを使用する。このゴムシートは熱伝導
性も良く、基板の温度制御が必要な場合も使用できる。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sputtering apparatus showing a first embodiment of the present invention. In the figure, the same parts as those in FIG. In this embodiment, as shown in the figure, since the substrate 56 is held via the resistor 1, the substrate 56, the resistor 1,
The input impedance of the bias line composed of the bias applying DC power supply 58 becomes high. As a result, it becomes difficult for arc discharge to occur where the impedance is low. The higher the impedance, in the case of this example, the higher the resistance value of the resistor, the less likely arc discharge will occur, but when applying a bias potential to the substrate, the resistance value of the resistor is increased. Since the voltage drop across the resistor also increases proportionally, extra power is required for the voltage drop. The resistance value that can most effectively apply the bias to the substrate while preventing arc discharge is a resistance value similar to the plasma impedance between the target 52 and the substrate 56. For example, as the resistor 1, a conductive rubber sheet whose resistance value can be changed by the amount of silver contained therein is used. This rubber sheet has good thermal conductivity and can be used when the temperature control of the substrate is required.
【0014】図2は、本発明の第2の発明の実施例を示
すスパッタリング装置である。このスパッタリング装置
は、図5に示した従来のものとはほぼ同様の構成であ
る。しかしながら、基板にバイアス電位を印加する直流
定電圧電源2は従来のものと異なり、周波数特性が10
kHz以上、つまり電源の反応速度が100マイクロ秒
以上のものとする。この構成にすることによって、数百
マイクロ秒のオーダーで発生するアーク電流を、定電流
電源の電流リミッタで防ぐことができる。図3にその時
のバイアスラインに流れる電流値の時間変化を示す。数
百マイクロ秒のオーダーでアーク電流が流れようとする
が、それ以上速さで電流リミッタが効いて、アーク電流
を未然に防ぐため、アーク放電は発生しない。FIG. 2 is a sputtering apparatus showing a second embodiment of the present invention. This sputtering apparatus has almost the same structure as the conventional one shown in FIG. However, the DC constant voltage power supply 2 for applying a bias potential to the substrate has a frequency characteristic of 10 unlike the conventional one.
It is assumed that the frequency is kHz or more, that is, the reaction speed of the power source is 100 microseconds or more. With this configuration, the arc current generated in the order of hundreds of microseconds can be prevented by the current limiter of the constant current power supply. FIG. 3 shows the time change of the current value flowing through the bias line at that time. The arc current tries to flow in the order of hundreds of microseconds, but the current limiter works at a higher speed to prevent the arc current, so that arc discharge does not occur.
【0015】図4は、本発明の第3の発明の実施例を示
すスパッタリング装置である。同図において、図5と同
一物には同一番号を付し説明を省略する。同図において
3は定電流制御と定電圧制御の切替え可能な直流電源、
4は膜厚モニターである。成膜する膜の抵抗値が高い場
合、まず最初の数十Åの層をアーク放電が防げるよう
に、電源3を定電流電源として使用して基板4にバイア
ス電位を印加する。その時同時に膜厚を膜厚モニターで
モニターしながら成膜を行い、膜厚が数十Åになった時
点で、電源3を定電流から定電圧電源に切替えるような
制御回路を設ける。成膜する膜の抵抗値が高いため、第
1の発明と同様に、バイアスラインのインピーダンスが
高くなるため、その後定電圧電源に切替えてもアーク放
電の発生を防ぐことができる。FIG. 4 is a sputtering apparatus showing a third embodiment of the present invention. In the figure, the same parts as those in FIG. In the figure, 3 is a direct current power source capable of switching between constant current control and constant voltage control,
4 is a film thickness monitor. When the resistance value of the film to be formed is high, first, a bias potential is applied to the substrate 4 by using the power source 3 as a constant current power source so that arc discharge can be prevented in the first several tens of layers. At that time, the film thickness is simultaneously monitored while monitoring the film thickness with a film thickness monitor, and when the film thickness reaches several tens of liters, a control circuit is provided to switch the power supply 3 from a constant current to a constant voltage power supply. Since the resistance value of the film to be formed is high, the impedance of the bias line becomes high as in the first aspect of the invention, so that arc discharge can be prevented even after switching to the constant voltage power supply.
【0016】初期の膜厚が薄すぎた場合、連続な膜では
なく島状の膜となるため、局所的にインピーダンスの低
いところが生じてしまい、アーク放電を防止することは
できない。また定電流電源を使用した場合、不安定なプ
ラズマのインピーダンスによって、基板に印加される電
圧も不安定となるため、初期の膜厚が厚すぎると膜質が
不安定となってしまう。よってアーク放電を防ぎ、かつ
安定した膜質を得るためには、定電流電源でバイアスを
印加する初期層の膜厚の最適化が必要である。アーク放
電の起きない膜厚は、膜の抵抗値にもよるが、50Å以
上、安定した膜質が得られる膜厚は全膜厚の10%以下
である。If the initial film thickness is too thin, the film becomes an island-shaped film instead of a continuous film, so that a portion with a low impedance locally occurs, and arc discharge cannot be prevented. Further, when a constant current power supply is used, the voltage applied to the substrate becomes unstable due to unstable plasma impedance, so that the film quality becomes unstable if the initial film thickness is too thick. Therefore, in order to prevent arc discharge and obtain stable film quality, it is necessary to optimize the film thickness of the initial layer to which a bias is applied by a constant current power supply. The film thickness at which arc discharge does not occur depends on the resistance value of the film, but is 50 Å or more, and the film thickness at which stable film quality is obtained is 10% or less of the total film thickness.
【0017】[0017]
【発明の効果】以上説明したように本発明の第1の発明
は、プラズマインピーダンスと同程度の抵抗値を持つ抵
抗体を介して基板を保持することで、バイアスラインの
入力インダンスを高くし、その結果アーク放電の発生の
防止を可能とする。As described above, according to the first aspect of the present invention, the input impedance of the bias line is increased by holding the substrate through the resistor having a resistance value similar to the plasma impedance. As a result, it is possible to prevent the occurrence of arc discharge.
【0018】本発明の第2の発明は、周波数特性が10
kHz以上の定電流電源によって基板にバイアスを印加
することで、数百マイクロ秒のオーダーで発生するアー
ク放電を電流リミッタによって未然に防ぐことができ
る。A second aspect of the present invention has a frequency characteristic of 10
By applying a bias to the substrate with a constant current power source of kHz or higher, arc discharge that occurs on the order of hundreds of microseconds can be prevented by the current limiter.
【0019】本発明の第3の発明は、成膜する膜の抵抗
値が高い場合、最初の数十Åの層をアーク放電が防げる
ように定電流制御によって基板にバイアスを印加して成
膜を行う。その結果、第1の発明と同様にバイアスライ
ンのインピーダンスが高くなり、その後膜質が安定する
定電圧制御に切替えてもアーク放電の発生を防ぐことが
できる。According to a third aspect of the present invention, when the resistance value of the film to be formed is high, a bias is applied to the substrate by constant current control so that arc discharge can be prevented from forming the first tens of layers. I do. As a result, the impedance of the bias line becomes high as in the case of the first aspect of the present invention, and the occurrence of arc discharge can be prevented even after switching to constant voltage control that stabilizes the film quality.
【図1】本発明の第1の発明の実施例を示すスパッタリ
ング装置の断面図FIG. 1 is a sectional view of a sputtering apparatus showing an embodiment of the first invention of the present invention.
【図2】本発明の第2の発明の実施例を示すスパッタリ
ング装置の断面図FIG. 2 is a sectional view of a sputtering apparatus showing an embodiment of the second invention of the present invention.
【図3】本発明の第2の実施例のバイアス電流の時間変
化を示す図FIG. 3 is a diagram showing a change over time of a bias current according to a second embodiment of the present invention.
【図4】本発明の第3の発明の実施例を示すスパッタリ
ング装置の断面図FIG. 4 is a sectional view of a sputtering apparatus showing an embodiment of the third invention of the present invention.
【図5】従来のスパッタリング装置の断面図FIG. 5 is a sectional view of a conventional sputtering device.
【図6】従来のスパッタリング装置のバイアス電流の時
間変化を示す図FIG. 6 is a diagram showing the change over time of the bias current of a conventional sputtering apparatus.
1 抵抗体 56 基板 1 resistor 56 substrate
Claims (3)
れ以上の抵抗値を有する抵抗体を介して基板を支持する
ことを特徴とするスパッタリング装置。1. A sputtering apparatus, wherein a substrate is supported via a resistor having a resistance value substantially equal to or higher than plasma impedance.
源が、周波数特性が10kHz以上の定電流電源である
ことを特徴とする請求項1記載のスパッタリング装置。2. The sputtering apparatus according to claim 1, wherein the constant current power supply for applying a bias potential to the substrate is a constant current power supply having a frequency characteristic of 10 kHz or more.
が定電流制御と定電圧制御とに切替え可能な直流電源で
あり、かつ膜厚もしくは成膜時間で定電流制御と定電圧
制御との切替えを行うことのできる制御手段を有するこ
とを特徴とする請求項1記載のスパッタリング装置。3. A DC power supply for applying a bias potential to a substrate is a DC power supply capable of switching between constant current control and constant voltage control, and switching between constant current control and constant voltage control depending on film thickness or film formation time. The sputtering apparatus according to claim 1, further comprising a control unit capable of performing the above.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18116993A JPH0734239A (en) | 1993-07-22 | 1993-07-22 | Sputtering device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18116993A JPH0734239A (en) | 1993-07-22 | 1993-07-22 | Sputtering device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0734239A true JPH0734239A (en) | 1995-02-03 |
Family
ID=16096098
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18116993A Pending JPH0734239A (en) | 1993-07-22 | 1993-07-22 | Sputtering device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0734239A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007291439A (en) * | 2006-04-24 | 2007-11-08 | Tokyo Electron Ltd | Film deposition method, plasma film deposition apparatus, and storage medium |
WO2010008636A1 (en) * | 2008-07-17 | 2010-01-21 | Mks Instruments, Inc. | Sputtering system and method including an arc detection system |
DE112008002320T5 (en) | 2007-09-11 | 2010-07-29 | Smc K.K. | Fluid pressure cylinder |
US7798052B2 (en) | 2006-11-29 | 2010-09-21 | Smc Kabushiki Kaisha | Fluid pressure cylinder |
US7836816B2 (en) | 2006-12-06 | 2010-11-23 | Smc Kabushiki Kaisha | Retaining ring for fluid pressure cylinder |
US7836817B2 (en) | 2006-12-06 | 2010-11-23 | Smc Kabushiki Kaisha | Fluid pressure cylinder |
US10195722B2 (en) | 2014-12-26 | 2019-02-05 | Smc Corporation | Magnet chuck |
-
1993
- 1993-07-22 JP JP18116993A patent/JPH0734239A/en active Pending
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007291439A (en) * | 2006-04-24 | 2007-11-08 | Tokyo Electron Ltd | Film deposition method, plasma film deposition apparatus, and storage medium |
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