JPH07327358A - Dc-dc converter - Google Patents

Abstract

PURPOSE:To obtain an RCC type DC-DC converter in which the temperature dependency of a power converter circuit is compensated with no influence of the input power supply voltage while reducing the power loss. CONSTITUTION:Current generated from a variable current generating means comprising an input power supply 1 and a main transistor 180 is stored in an inductor, i.e., the winding 171 of a transformer 170, and then the current is fed through a rectifier means, i.e., a diode 190, to the output terminal. The control current of the variable current generating means for regulating the output voltage, i.e., the collector current of an output transistor 134 in a drive circuit 130, depends not on the voltage of the input power supply 1 but on the base-emitter voltage thereof. Furthermore, temperature dependency of the variable current generating means is compensated by imparting temperature dependency no the current from a current supply 120.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an RCC type DCDC converter device based on blocking oscillation.

[0002]

[Prior art]

(Background of Prior Art) Recent DCDC converter devices include
Power MOSFET for switch element and PW for control method
Those using the M method are becoming mainstream. But,
Controlling the conduction and cutoff of the MOSFET requires a gate voltage of 2.5 to 5 V and a large transient current to charge the gate capacitance, so a power supply voltage that operates with 1 to 2 dry cells is required. The use of MOSFETs in low equipment requires special measures such as control via a booster circuit for gate drive and consumption of the converted output voltage as its own power supply. The power consumption, the number of parts, the mounting area increase to cover the device, and the instability at start-up are brought about. On the other hand, the conventional RCC type DCDC converter using the bipolar transistor has a low power supply voltage of the control circuit and is simple in configuration, and is therefore often used for a small capacity application because of its low power supply voltage. .

(Constitution of Prior Art) Conventionally, this type of DCD
The C converter device is composed of a control circuit composed of a starting resistor, a transistor, a Zener diode, etc., and a main circuit for converting power by blocking oscillation composed of a transformer, a main transistor, a diode, a feedback resistor, a feedback capacitor, etc. It was common.

FIG. 20 is a circuit diagram of a step-up DCDC converter configured for equipment having a low power supply voltage that operates with one or two dry batteries. Since the input / output insulation is unnecessary, the transformer has two windings. The components of the control circuit are reduced and the size is reduced. The configuration will be described below with reference to FIG.

In FIG. 20, 1 is an input power source, 2 is an output capacitor, 3 is an output load, 170 is a transformer having a first winding 171 and a second winding 172 sharing a magnetic circuit, and 180 is a main A transistor, 181 is a feedback capacitor, 182 is a feedback resistor, 421 and 1422 are starting resistors, 190 is an output diode, 111 is a Zener diode, 112 is a resistor, 113 is a capacitor, and 114 is a transistor. Then, the transformer 170, the main transistor 180, the output diode 190, the output capacitor 2, the feedback capacitor 181, and the feedback resistor 182 constitute a main circuit 1401 for converting power by blocking oscillation. In addition, Zener diode 111 and resistor 11
2, the capacitor 113, and the transistor 114 form a comparison circuit 110. The comparison circuit 110 and the starting resistor 14
21 and 1422 configure a control circuit 1402 that guides the output voltage to a target voltage.

(Operation of Prior Art) Next, the operation of the above conventional example will be described. (Start of current accumulation phase) In FIG. 20, input power supply 1
Since the output voltage Vo immediately after being applied is still sufficiently lower than the target voltage, the base potential of the transistor 114 is low and its collector current is also small. Therefore, the base current of the main transistor 180 changes from the current flowing from the input power source 1 through the starting resistor 1421, to the starting resistor 142.
It becomes a current of a value obtained by subtracting the current flowing out to the output end from 2.
Due to the base current, the collector current of the main transistor 180 is about to be multiplied by the current amplification factor. However, since the winding 171 of the transformer 170 that is the collector load behaves as an inductor, the current cannot be increased immediately. Therefore, the collector of the main transistor 180 saturates while having the potential to flow a current of a current multiplication factor of the base current.

(Current accumulation phase) If the collector-emitter voltage of the main transistor 180 during saturation is ignored,
Since the Vi of the input power supply 1 is applied to both ends of the winding 171,
If the inductor of the winding 171 is L, the current is Vi
It increases with the slope of / L. Then, a positive voltage is generated in the winding 172. This voltage is configured to increase the current flowing into the base of the main transistor 180 (positive feedback) via the feedback resistor 182 and the feedback capacitor 181. As a result, the base current of the main transistor 180 is increased by adding the current flowing through the feedback resistor 182 to the current derived from the starting resistors 1421, 1422. The current flowing in via the feedback resistor 182 is reduced with time by the feedback capacitor 181. The feedback capacitor 181 may be omitted.

(End of current accumulation phase-start of current discharge phase) Further, when the current of the winding 171 increases to reach the potential collector current of the main transistor 180, the collector of the main transistor 180 comes out of the saturated state, The collector-emitter voltage suddenly rises. As a result, the increase in the current in the winding 171 stops and the positive voltage generated in the winding 172 goes to zero. Therefore, the current flowing into the base of the main transistor 180 via the feedback resistor 182 and the feedback capacitor 181 decreases, and the collector current of the main transistor 180 also decreases.

On the other hand, the magnetic flux generated in the magnetic circuit by the winding 171 acts to cause a current commensurate with its magnitude to flow in any of the windings sharing the magnetic circuit.
A current corresponding to the reduced collector current of the main transistor 180 tries to flow through the diode 190 to the output capacitor 2 or load 3. The behavior of flowing the current of the winding 171 is the same as the behavior of the current source. Therefore, even if the output voltage is higher than that of the input power source 1 or the forward voltage of the diode 190 is exceeded, the load 3
Current can be applied to the.

(Current emission phase) Load from winding 171
When the current starts to flow to 3, the output terminal voltage increases, but the current value of the winding 171 turns to decrease. for that reason,
The positive voltage generated in the winding 172 is inverted and becomes negative, and the base current of the main transistor 180 decreases. At that time, the starting resistors 1421, 1422 and the feedback resistor 182
Is set to a value such that the main transistor 180 is completely cut off, the current accumulated in the winding 171 is entirely passed through the diode 190 to the output capacitor 2
And can be applied to the load 3.

(End of current discharge phase to start of current accumulation phase) Then, with time, the current flowing from the winding 171 to the load 3 decreases, and when the value exceeds zero, the diode 190 blocks the current flow. 17
The current of 1 stops decreasing, and the negative voltage generated in the winding 172 goes to zero. As a result, the current flowing out from the node at the base of the main transistor 180 via the feedback resistor 182 and the feedback capacitor 181 decreases, and the collector current of the main transistor 180 increases. Then, the collector of the main transistor 180 saturates again and repeats the above cycle to increase the terminal voltage of the output load 3.

With such repetition, the terminal voltage of the output load 3 increases, and when this exceeds the sum of the Zener voltage of the Zener diode 111 and the base-emitter forward voltage of the transistor 114, the transistor 11
4 collector current begins to flow, reducing the base current of the main transistor 180. As a result, the main transistor 1
The collector current of 80 decreases, the current accumulated in the winding 171 decreases, and the current flowing from the winding 171 to the load 3 decreases, so that the terminal voltage of the load 3 stops rising. Thus, the output voltage can be controlled by adjusting the base current of the main transistor 180. The resistor 112 is provided for the purpose of passing a bias current through the Zener diode, and the capacitor 113 is provided for the purpose of suppressing the ripple of the output voltage.

From the above operation, the RCC type DCDC converter includes a transformer 170, a main transistor 180, a diode 190, a feedback resistor 182, and a feedback capacitor 18.
1 is a blocking oscillator composed of 1 for converting the current accumulated from the input power source in the current accumulation phase by the transformer 170 to the load at the output end in the current emission phase, and the output voltage is the transformer 170. It can be said that this is a device that controls the amount of accumulated electric current by the base current of the main transistor 180.

(Effect of Prior Art) As described above, even the above-mentioned conventional step-up DCDC converter device can be constructed with a low power supply voltage, a small capacity, and a small number of parts.

[0015]

[Problems to be Solved by the Invention]

(Problems of Prior Art) However, in the above conventional step-up DCDC converter device, the base current value of the main transistor 180 at the time of startup, that is, the upper limit value of the base current is set by the input power supply 1 and the startup resistors 1421, 1422. Therefore, in the case of a low-voltage input power source that fluctuates like a dry cell battery, the starting resistance corresponding to the required upper limit value of the base current cannot be uniquely determined, and the upper limit value of the base current depends on the input power source. . Therefore, the waste current due to the output voltage control increases, and wasteful power is consumed.
There is a first problem of reducing the power conversion efficiency of the DCDC converter.

Further, in the above conventional step-up DCDC converter device, the temperature dependence of the current amplification factor of the main transistor 180 brings about the temperature dependence of the upper limit value of the base current of the main transistor 180. Since the value is set by the input power supply 1 and the starting resistors 1421, 1422, the upper limit value of the base current depends on the temperature. Therefore, there is a second problem in that the waste current associated with the output voltage control increases, wasting power, and lowering the power conversion efficiency of the DCDC converter.

Further, in the above-mentioned conventional step-up DCDC converter device, by setting an upper limit on the base current value of the main transistor 180, the maximum current value of the collector at the time of start-up or overload is limited to protect the main transistor. However, due to the above-mentioned first and second problems, the upper limit value of the base current is set to a large value, so other protection measures should be provided and transistors with a sufficient rating should be used. However, there is a third problem that the cost of the DCDC converter increases.

Further, in the above-mentioned conventional step-up DCDC converter device, when the fluctuation of the input voltage and the load current becomes large, the fluctuation of the oscillation cycle also becomes large, and the feedback capacitor 18
There will be an excess or deficiency in the charge amount of 1. When the fluctuation range becomes large, the main circuit 1401 designed in the critical mode becomes a discontinuous mode or a continuous mode, and a sudden change in the operation mode occurs, causing a large change in the oscillation frequency, and thus a filter for removing switching noise. There is a fourth problem that the design condition of is difficult.

Further, in the above-mentioned conventional step-up DCDC converter device, since the input voltage and the output voltage are small, the loss due to the forward voltage of the diode 190 at the output end occupies a considerable part of the total loss, and the conversion efficiency is lowered. There was the fifth problem of being invited.

That is, the first problem is that the upper limit value of the base current required by the main transistor depends on the input voltage, and the second problem is the upper limit value of the base current required by the main transistor itself. Change due to temperature, and the third problem is the first problem and the second problem.
This is due to the side effect of trying to satisfy the above problem with the starting resistance value. The fourth problem is that the time constant is fixed by the feedback capacitor capacity and the starting resistance value although the charging time varies, and the fifth problem is that a diode with a large voltage drop is used. Is the cause.

To help understand the first, second, and third problems, consider the case where the starting resistor 1422 is not provided. The base current at startup is the current that flows from the input power supply 1 through the startup resistor 1421, and is the value obtained by dividing the difference between the power supply voltage and the base-emitter forward voltage (about 0.7 V) by the value of the startup resistor 1421. become.

That is, the power supply voltage is from 1.6 V to 0.9
When it changes to V, the inter-terminal voltage of the starting resistor 1421 changes from 0.9V to 0.2V, and thus the change of the base current also changes 4.5 times. Moreover, the current amplification factor of a transistor having a value of 300 at room temperature is −20.
The temperature changes from ℃ to +80 ℃, it varies about 200 to 450. The value of the starting resistance under such a condition is determined so that the upper limit value of the base current can be secured even in the worst condition. In the worst case, the input voltage is 0.9V min.
Then, it is a low temperature of -20 ° C at which the current amplification factor becomes the minimum.
If the upper limit value of the base current at this time is 1 mA, the starting resistance is (0.9 V-0.7 V) / 1 mA = 200Ω. When this value is used, the upper limit value of the base current at the maximum input voltage of 1.6V is (1.6V-0.7V)
/200Ω=4.5 mA. Taking the temperature dependence of the current amplification factor into consideration, the ratio between the best condition and the worst condition of the collector current value of the main transistor is estimated to be (4.5 mA
/ 1 mA) x (450/200) = 10.125 times. In this way, even if the setting is appropriate under the worst conditions,
Under the best conditions, the value is 10 times as large as this, so it can be seen that some kind of mechanism that does not destroy the main transistor at the time of startup or overload is required.

Under the best condition, more current than necessary is supplied to the base node of the main transistor, so that the discard current accompanying the output voltage control is large and the power loss becomes large. Furthermore, this discard current is
As it flows as a collector current of 4, transistor 1
The operation of 14 is also greatly affected. That is, the increase in the collector current brings about an increase in the transconductance of the transistor 114, which increases the open loop gain of the control system of the DCDC converter and reduces the phase margin.
On the other hand, under the worst conditions, the open loop gain is reduced, so the output performance such as output voltage and equivalent output resistance is degraded. There is also a sixth problem that design is difficult because such influence on the control system also needs to be taken into consideration at the time of design.

The conventional circuit shown in FIG.
Although the starting resistor 1422 is provided for the purpose of reducing the above problem, it has the side effect of being less effective and increasing the power loss. That is, the current flowing through the starting resistor 1422 is
When the output voltage is lower than the base-emitter forward voltage (about 0.7V) of the main transistor 180, it acts to reduce the base current at startup, but when it is higher than that, it starts to add and the output voltage is the target. When the voltage stabilizes, the value becomes stable. Therefore, the upper limit value of the base current after the output voltage stabilizes at the target voltage is the current of the fluctuating starting resistor 1421 and the stable starting resistor 142.
It becomes the algebraic sum of the current of 1, and by adjusting its distribution,
The first problem can be alleviated.
However, since the current at the output end obtained at the cost of conversion loss is included in the current discarded for control, DCD
The efficiency as a C converter decreases. Further, since there is feedback other than output voltage control, it is necessary to consider the reliability of startup such as startup in the state where the load current is large, and there is the seventh problem that design is difficult.

The above first to seventh problems are the problems of the conventional step-up type RCC type DCDC converter shown in FIG. 20, and at the same time, the step-down type and the polarity reversal type RCC type DCDC are included. This is also a problem with converters.

(Object of the Invention) A first object of the present invention is to provide a DCDC converter device in which the upper limit value of the base current of the main transistor is not affected by the power supply voltage.

A second object of the present invention is to provide a DCDC converter device in which the required upper limit value of the base current of the main transistor at each temperature is supplied and the change of the discard current due to the temperature change is reduced.

A third object of the present invention is to provide a large input voltage,
An object of the present invention is to provide a DCDC converter device in which abrupt changes in the operation mode caused by changes in load current and the like and drastic changes in the oscillation frequency due to the changes are alleviated.

A fourth object of the present invention is to provide a DCDC converter device in which loss power is suppressed.

A fifth object of the present invention is to prevent instability at the time of starting such as a starting resistor and to minimize power loss, so that the output voltage after power conversion is not used as its own power source. To provide a device.

A sixth object of the present invention is to provide a DCDC converter device equipped with a low power consumption display means.

The seventh object of the present invention is to provide a step-up type, step-down type,
An object of the present invention is to provide a DCDC converter device in which the basic part of the circuit can be used in common even if the type is different from the polarity reversal type.

[0033]

The first structure of the present invention is as follows.
In order to achieve the first object, a main transistor and
A DC / DC converter device is configured by providing a transformer, a diode, a feedback capacitor, and a driving means.

In order to achieve the above first and second objects, the second structure of the present invention comprises a main transistor, a transformer, a diode, a feedback capacitor, and a temperature-dependent current generating means. A DCDC converter device is configured by providing driving means.

In order to achieve the third object, the third structure of the present invention comprises a main transistor, a transformer, a diode, a feedback capacitor, a driving means, a state detecting means and a modulating means. It is provided to configure a DCDC converter device.

According to a fourth aspect of the present invention, in order to achieve the fourth object, a main transistor, a transformer, a sub transistor, a main feedback capacitor, a sub feedback capacitor, and a driving means are provided. , A DCDC converter device.

In order to achieve the above-mentioned third and fourth objects, the fifth structure of the present invention comprises a main transistor, a transformer, a slave transistor, a main feedback capacitor, a slave feedback capacitor, and a driving means. A DCDC converter device is configured by providing a state detecting means and a modulating means.

In order to achieve the sixth object, the sixth structure of the present invention is provided with state detecting means and display means,
This is a configuration of a DCDC converter device.

In order to achieve the above-mentioned seventh object, the seventh structure of the present invention comprises a DCDC converter device in which at least the driving means, the current generating means and the comparing means are respectively integrated or modularized. It's done.

[0040]

According to the first structure of the present invention, the collector current of the output transistor of the driving means is determined by the base-emitter voltage, and is not affected by the fluctuation of the collector-emitter voltage due to the fluctuation of the power supply voltage. Since this flows into the base of the main transistor, even if there is a change in the input voltage of the main circuit configured with the transformer, diode, and feedback capacitor, it is possible to suppress the change in the upper limit value of the base current of the main transistor.

According to the second structure of the present invention, the current of the current generating means having temperature dependency for compensating the temperature dependency of the upper limit value of the base current of the main transistor becomes the collector current of the output transistor of the driving means. , Since it flows to the base of the main transistor, even if there is a change in the operating environment temperature of the main circuit configured with the transformer, diode, and feedback capacitor, it is possible to suppress the change in the discard current due to output voltage control.

According to the third aspect of the present invention, the modulation means controlled by the state of the main circuit obtained by the state detection means,
The magnitude of the collector current of the output transistor of the driving means is distinguished from the current that controls the output voltage of the device and the current that regulates the charging of the feedback capacitor. The operation mode of the main circuit can be controlled even if the input voltage or load current of the circuit fluctuates.

According to the fourth structure of the present invention, the feedback voltage from the secondary winding of the transformer is supplied to the bases of the main transistor and the slave transistor of the opposite polarity via the main feedback capacitor and the slave feedback capacitor, respectively. In addition, since the secondary transistor performs rectification with a small voltage drop, it is possible to reduce power loss.

According to the fifth aspect of the present invention, the modulation means controlled by the state of the main circuit obtained by the state detection means,
The magnitude of the collector current of the output transistor of the driving means is divided into the current that controls the device output voltage and the current that regulates the charging of the main feedback capacitor and the sub-feedback capacitor. Since the current flows, the operation mode of the main circuit can be controlled even if the input voltage or load current of the main circuit configured with the transformer fluctuates.

According to the sixth aspect of the present invention, the state detection means and the display means turn on the display during the current discharge phase of the main circuit, thereby reducing the power consumed by the display. You can

According to the seventh aspect of the present invention, at least the driving means, the current generating means, and the comparing means are integrated or modularized, so that productivity can be improved and cost can be reduced.

[0047]

Embodiments of the present invention will now be described in detail with reference to the drawings. [First Embodiment] The first embodiment of the present invention is described in claim 1.
In order to solve the problems 1, 3, 6, and 7 and to achieve the objects 1, 5, and 7 by corresponding to 5, 6, 8, and 21, a boosting type main circuit is provided.

(Structure of the First Embodiment) FIG. 1 shows the structure of the first embodiment of the present invention, in which a booster is constructed for a device having a low power supply voltage and operating with one or two dry batteries. Type D
This is a CDC converter device, and the same elements as those in the conventional example shown in FIG.

In FIG. 1, 1 is an input power source, 2 is an output capacitor, and 3 is an output load. 170 is a transformer having a first winding 171 and a second winding 172 that share a magnetic circuit, 180 is a main transistor, 181 is a feedback capacitor, 190 is a diode, and these are the output capacitor to form the main circuit 101. I am configuring. Also, 111
Is a Zener diode, 112 is a resistor, 113 is a capacitor, and 114 is a transistor, and these constitute a comparison circuit 110 having a reference voltage. Furthermore, 1
Reference numeral 20 is a current source, and 133 and 134 are transistors forming a current mirror. The current mirror constitutes a drive circuit 130 for supplying the upper limit value of the base current of the main transistor 180. The drive circuit 130 and the comparison circuit 110 form a control circuit 102 that guides the output voltage to a target voltage. Current source 120 here
Has only one diode connection between the power supply and ground and one collector-emitter voltage, and the output current does not change even when the power supply voltage drops to 0.9V. For example, Japanese Patent Laid-Open No. 60-191508. "Current generator"
It is a current source that can be directly driven by a low-voltage input power source, as shown in, etc. Note that the difference from the conventional example shown in FIG. 20 is that the starting resistors 1421, 1422 are different from the current source 120.
That is, the drive circuit 130 is replaced.

(Operation of the First Embodiment) The operation of the first embodiment of the present invention is very similar to the operation of the conventional example described above, but is different in the following points. In the embodiment, the transformer 17
The feedback from the winding 172 of 0 to the base of the main transistor 180 is provided for the purpose of accelerating the main transistor 180 to the respective complete states from the initial stage of the conduction or cutoff state, and is supplied through the feedback capacitor 181. The capacitance of the feedback capacitor 181 is determined so that the generated current lasts only for a very short time. Therefore, the potential collector current of the main transistor 180 in the current accumulation phase is determined only by the current from the drive circuit 130. On the other hand, since the feedback capacitor 181 of the DCDC converter in FIG. 20 has a large capacity or is bypassed, the feedback current flowing through the feedback resistor 182 also flows at the time when the current accumulation phase ends. Together with the currents supplied from 1421, 1422, it determines the potential collector current of the main transistor 180 in the current accumulation phase at start-up.

The operation of the first embodiment of the present invention will be described below with reference to the circuit diagram of FIG. 1 and the timing diagram of FIG.

(Start of current accumulation phase) In FIG.
Since the output voltage Vo immediately after the input power source 1 is applied is still sufficiently lower than the target voltage, the base potential of the transistor 114 is low and its collector current is also small. Therefore, the base current of the main transistor 180 is
It has the same value as the collector current of the transistor 134, which is the output of 30. This base current causes the main transistor 1
The collector current of 80 times the current amplification factor tends to flow in the collector of 80. However, the winding 171 of the transformer 170, which is the collector load, behaves as an inductor, so that the current cannot be increased immediately. Therefore, the collector of the main transistor 180 saturates while having the potential to flow a current that is a current amplification factor times the base current.

(Current accumulation phase) If the collector-emitter voltage of the main transistor 180 in saturation is neglected, the Vi of the input power supply 1 is applied to both ends of the winding 171, so that if the inductance of the winding 171 is L, Current is V
It increases with the slope of i / L. Then, a positive voltage is generated in the winding 172, and this voltage change causes the feedback capacitor 181.
Since it joins the base of the main transistor 180 through
The base current increases suddenly, the collector of the main transistor 180 is largely saturated, and its collector-emitter voltage is reduced. Note that the feedback capacitor 181 discharges in a short time by this large base current, so that the base current of the main transistor 180 has the same magnitude as the current from the drive circuit 130.

(End of Current Accumulation Phase-Start of Current Discharge Phase) Further, when the current of the winding 171 increases to reach the potential collector current of the main transistor 180, the collector of the main transistor 180 comes out of the saturated state, The collector-emitter voltage suddenly rises. As a result, the increase in the current in the winding 171 stops, and the positive voltage generated in the winding 172 goes to zero. Since this voltage change is applied to the base of the main transistor 180 through the feedback capacitor 181, the base current decreases and the collector current of the main transistor 180 also decreases.

On the other hand, the magnetic flux generated in the magnetic circuit by the winding 171 acts to cause a current commensurate with its magnitude to flow in any of the windings sharing the magnetic circuit. In this case,
An attempt is made to cause a current corresponding to the reduced collector current of the main transistor 180 to flow through the diode 190 to the output capacitor 2 or load 3. The behavior of flowing the current of the winding 171 is the same as that of the current source, and even if the output voltage is higher than that of the input power source 1, the diode 1
Even when the forward voltage of 90 is overcome, the current can be supplied to the load 3.

(Current emission phase) By starting to flow current from the winding 171 to the load 3, the voltage at the output end increases,
On the contrary, the current value of the winding 171 decreases. As a result, the positive voltage generated in the winding 172 is inverted into a negative voltage, and this voltage change is transmitted through the feedback capacitor 181 to the main transistor 1.
Since it is added to the base of 80, the base current is reduced at once. At that time, the voltage generated in the winding 172 is set to a value such that the main transistor 180 is completely cut off, so that all the current accumulated in the winding 171 is fed to the diode 19.
It can be supplied to the output capacitor 2 and the load 3 through 0.

At this time, the surplus electric charge of the base accumulated at the saturation of the main transistor 180 instantaneously flows through the feedback capacitor 181, and the feedback capacitor 181 is slightly charged, but the base enough to block the main transistor 180 sufficiently. The potential v _b180 is maintained. However, since the feedback capacitor 181 is charged by the current i _b180 from the driving circuit 130, the base potential v _{b180 of the} main transistor 180 is _obtained.
Increases with time. The charging of the feedback capacitor 181 is set to be completed within the current discharging phase period of the transformer 170. This charging time is proportional to the capacitance value c ₁₈₁ of the feedback capacitor 181, and the drive circuit 13
It is inversely proportional to the current value i _b180 from 0.

(End of current discharge phase to start of current storage phase) Then, with time, the current flowing from the winding 171 to the load 3 decreases, and when the value exceeds zero, the diode 190 blocks the current flow. 17
The current of 1 stops decreasing, and the negative voltage generated in the winding 172 goes to zero. The voltage change is applied to the base of the main transistor 180 through the feedback capacitor 181, so that the base current increases and the collector current of the main transistor 180 increases. And the main transistor 1
The 80 collector saturates again.

After the (current accumulation phase), the winding 1 again
A positive voltage is generated at 72, and this voltage change is applied to the base of the main transistor 180 through the feedback capacitor 181, so that the base current increases at once and the main transistor 1
The collector of 80 is highly saturated, reducing its collector-emitter voltage.

By such repetition, the output load 3
The terminal voltage of increases and this is Zener diode 1
When the sum of the Zener voltage of 11 and the base-emitter forward voltage of the transistor 114 is exceeded, the collector current of the transistor 114 flows, and the current from the drive circuit 130 is intercepted. As a result, the base current of the main transistor 180 is reduced and so is the potential collector current of the main transistor 180. Then, as a result of the decrease in the current accumulated in the winding 171, the total amount of the current discharged from the winding 171 to the load 3 decreases, and the terminal voltage of the load 3 decreases. In this way, the voltage at the output terminal is the main transistor 180.
It can be controlled by adjusting the base current of.

The operation of the main circuit 101 described above is performed by the control circuit 1
02, a small base current supplied from the main circuit 101
It may be considered to be a current-current conversion means for converting into a large current output from the diode 190. The output voltage is generated as a result of the output current flowing through the load 3.

Even if the input voltage of the DCDC converter device that operates in this way changes, for example, from 1.6 V to 0.9 V, the collector of the transistor 134 of the drive circuit 130 that supplies current to the base of the main transistor 180. Due to the circuit configuration, the potential does not exceed the base-emitter forward voltage of the main transistor 180 as shown in the timing chart of FIG. 2, so the collector-emitter voltage of the transistor 134 is 0.9V when the input voltage is 0.9V. However, 0.2V can be secured, and the collector current of the transistor 134 has a magnitude based on the relational expression with the base-emitter voltage in the non-saturated region. Therefore, the output current of the current mirror configured so that the base-emitter voltage corresponding to the collector current generated by the transistor 133 is also applied to the transistor 134 becomes substantially equal to the magnitude of the input current. The current applied to the input of this current mirror is the output current of the current source 120, which is provided with only one diode connection between the power supply and ground and one collector-emitter voltage because of the circuit configuration. Even if the power supply voltage drops to 0.9V, its magnitude does not change.

Therefore, the transistor 1 of the drive circuit 130
Since the upper limit value of the base current supplied from the collector of 34 does not depend on the fluctuation of the input voltage, the current value can be easily set. Further, the difference between the worst condition and the best condition becomes small, so that the design margin of the upper limit value of the base current can be small. Therefore, the waste current associated with the output voltage control is reduced, useless power consumption is suppressed, and the protection of the main transistor during start-up and overload can be optimized. Eliminates the need to use transistors with As a result, the first problem that the power conversion efficiency of the DCDC converter is reduced and the third problem that the cost is increased can be solved.

The current of the current source 120 has the same temperature dependency as the temperature dependency of the upper limit value of its base current brought about by the temperature dependency of the current amplification factor of the main transistor 180. The magnitude of the discard current accompanying the control does not increase or decrease depending on the temperature. Therefore, the upper limit value of the base current can be set to the minimum required value, which reduces the waste current associated with output voltage control, wasteful power consumption, and the startup and overload of the main transistor 180. The effects such as optimization of protection can be further enhanced. As a result, the first and second problems that the power conversion efficiency of the DCDC converter is lowered and the third problem that the cost is increased can be solved.

The current source 12 having such temperature dependence
0 is a power supply voltage of 0 when it is constructed based on the "amplification device" of Japanese Patent Application No. 4-264548 in which only one diode connection is provided between the power supply and ground and only one collector-emitter voltage is provided. It is possible to have both stable operation up to 0.9V and temperature dependence.

Further, the current of the current source 120 is configured to have both the same temperature dependence of the upper limit value of the base current and a stable current output up to a power supply voltage of 0.9V. However, this is because when the DCDC converter is used for the application in which the fluctuation of the input power source is small, even if the temperature dependence is the same as the temperature dependence of the upper limit value of the base current of the former, The problem of 3 can be solved.

[Second Embodiment] The second embodiment of the present invention is as follows.
Corresponding to claims 1, 5, 6, 9, and 21, a step-up type main circuit is provided to solve problems 1, 3, 6, and 7, and objectives 1, 5, 7
Is achieved.

(Structure of Second Embodiment) FIG. 3 shows a second embodiment of the present invention.
FIG. 2 shows a configuration of an embodiment, and is different from the configuration of the first embodiment shown in FIG. 1 in that a drive circuit 230 and a transformer 270 of a step-up type main circuit 201 are different, but the other steps are the same step-up DCDC converter. It is a device. The drive circuit 230 is
The transformer 270 includes transistors 133, 134, 231, and 232. The transformer 270 has a first winding 171, a second winding 172, and a third winding 273 that share a magnetic circuit.

(Operation of Second Embodiment) The operation of the second embodiment of the present invention is the method of supplying a current to the base of the main transistor 180 and the method of extracting a current in the current discharging phase. The operation is different from that of the embodiment. However, the basic operation of supplying electric power to the output terminal is exactly the same while alternately repeating the current accumulation phase and the current emission phase. The operation of this embodiment will be described below, focusing on the driving circuit 230 and the transformer 270, which are the differences.

(Regarding the drive circuit 230) The above-mentioned first
In the configuration of the embodiment, the current of the current source 120 is the drive circuit 13
0, which is the output of the collector of the transistor 134 and the output of the comparison circuit 110, the transistor 1
The collector of 14 is directly connected to the base of the main transistor 180, and the current from the drive circuit 130 and the current from the comparison circuit 110 are subtracted at this node. The subtracted magnitude of the current becomes the base current of the main transistor 180. on the other hand,
In this embodiment, the output current of the current source 120 and the comparison circuit 1
The 10 output currents are subtracted at the base-collector node of the diode-connected transistor 231 at the input of the drive circuit 230. The current of the subtracted magnitude is input to the drive circuit 230 and its output is the transistor 13
The collector current of No. 4 is configured to be the upper limit value of the base current of the main transistor 180. Although the configurations are different as described above, when viewed from the base of the main transistor 180, in any case, current is supplied from the collector of the transistor of the output of the drive circuit, and its magnitude is also determined from the current value of the current source 120. Since the output current value of the comparison circuit 110 is reduced, its operation is exactly the same as that of the first embodiment. Therefore, the operation waveform is also the same as that of the first embodiment of the present invention, which is the same as the timing chart of FIG.

However, there is a difference when the comparison circuit 110 is constituted by a monolithic IC. Generally, when a circuit is constructed in a monolithic IC, the P-type substrate potential is connected to the lowest potential of the circuit in order to separate elements on the same substrate.

Since the lowest potential of the circuit of the first embodiment is the ground potential, if a voltage lower than the ground potential is applied to the collector terminal, the substrate of the lowest ground potential (P type) is used.
And a buried layer (N type) which is the collector electrode of the transistor
Since and are forward biased, transistor 114
Will not work as a normal transistor. However, such a situation occurs in the collector of the transistor 114 of the comparison circuit 110 in the current emission phase, as is clear from the timing chart of FIG.

However, in the configuration of the second embodiment of the present invention,
Since the NPN transistor is not connected to the base of the main transistor, such a problem does not occur. As described above, the second embodiment of the present invention is advantageous when the comparison circuit 110 is a monolithic IC.

In the above description, the drive circuit 23
0 is simply a means for changing the direction of the current. This is achieved by increasing the current ratio of the current mirror composed of the transistors 231, 232 and the current ratio of the current mirror composed of the transistors 133, 134.
It is possible to suppress the magnitude of the discard current accompanying control. That is, the absolute value of the current to be discarded can be reduced by subtracting the output currents of the current source 120 and the comparison means 110 while they are small, and then amplifying the current with a current mirror to a required current value. It is possible to reduce power loss.

(Regarding Transformer 270) The above-mentioned first
In the configuration of the embodiment, the current in the current accumulation phase and the current in the current emission phase both flow in the winding 171, but in the present embodiment, the current in the current accumulation phase flows in the winding 171 and the current in the current emission phase Are configured to flow into the winding 273. The magnetic flux in the magnetic circuit accumulated in the transformer 270 causes an electric current corresponding to its magnitude to flow in any of the windings sharing the magnetic circuit.
If the characteristics such as the number of turns of 73 are the same, the current flowing through the diode 190 having the two configurations is the same, and the operation is basically the same as that of the first embodiment.

The winding number ratio between the winding 273 and the winding 171 may be changed, or the terminal connected to the input power source of the winding 273 may be connected to the ground or another power source. Further, the means for detecting the output voltage is a non-insulated comparison circuit 1
By changing from 10 to an insulation type comparison circuit, an insulation type DCDC converter can be constructed.

[Third Embodiment] The third embodiment of the present invention corresponds to the second, fifth, sixth, seventh, tenth and twenty-first aspects, and is provided with a step-up type main circuit to cause problems 1, 3, 4, and. 6 and 7 are solved and the objectives 1, 3, 5, and 7 are achieved.

(Structure of Third Embodiment) FIG. 4 shows the structure of the third embodiment of the present invention. The structure of the first embodiment shown in FIG. Circuit 34
0, a display circuit 365 is newly provided, and a comparison circuit 310
The internal structure of the step-up type DCDC converter device is different from that of the step-up type DCDC converter device except that the modulation circuit 340 is inserted in series with the drive circuit 230.

The driving circuit 230 includes a transistor 231,
232, 133, 134, which is
Same as the second embodiment, but with the transistor 2
A modulation circuit 340 is inserted between the output of the current mirror composed of 31, 232 and the input of the current mirror composed of the transistors 133, 134. Further, the comparison circuit 310 is a functional expression of the comparison circuit 110 of the first embodiment, and includes a reference voltage 311 and an amplifier circuit 312. The operation is the operation of the comparison circuit 110 of the first embodiment. Is exactly the same as This is lower than the reference voltage of 1.25V, for example, as shown in "Comparison device" of JP-A-2-193410, 1.6V to 0.9V.
The input power supply 1 can be used by lowering it to 0.9V by using a comparison circuit that operates even with a power supply voltage of V.

The state detection circuit 360 detects the current accumulation phase or the current emission phase of the main circuit 101 and outputs the result to the modulation circuit 340 or the display circuit 365. When the state detection circuit 360 determines that it is in the current accumulation phase, the modulation circuit 340 uses the same current as the input, and when it determines that it is in the current discharge phase, it supplies a current of a value that optimizes the charging of the feedback capacitor 181. Are configured to be output separately. The display circuit 365 is composed of transistors 367 resistors 369 and 366 and an LED 368, and is configured to light the display for a short time based on the signal of the current detection phase start of the state detection circuit 360.

(Operation of Third Embodiment) The operation of the third embodiment of the present invention is that the output current of the drive circuit 230 distinguishes and outputs different values in the current accumulation phase or the current discharge phase. The operation is different from that of the first embodiment. However, the basic operation of supplying electric power to the output terminal is exactly the same while alternately repeating the current accumulation phase and the current emission phase. On the other hand, the display circuit 365, which is not directly related to the DCDC converter, has the effect of extending the battery life of the dry cell drive device by blinking the display with the output pulse of the state detection circuit 360. The operation waveform of this embodiment is the same as the timing chart of FIG. 2 of the first embodiment in which the main circuit 101 is the same.

(Regarding Modulation Circuit 340) First above-mentioned
In the configuration of the embodiment, the current adjusted by the comparison circuit 310 so as to bring the output voltage to the target value is supplied from the output of the drive circuit 130 to the base of the main transistor 180. However, this amount of current is required during the current accumulation phase, and during the current discharge phase, the feedback capacitor 1
The charging current is 81. The charging amount of the feedback capacitor 181 is proportional to the product of the charging time and the charging current.

When the input voltage or the load current fluctuates greatly, the base current of the main transistor 180 changes due to the output voltage control according to the fluctuation, and the charging current also changes. Further, since the oscillation cycle fluctuates greatly, the charging time also changes, and the charge amount of the feedback capacitor 181 becomes excessive or insufficient. Then, when the fluctuation range becomes large, a sudden change in the operating mode occurs, such as the main circuit designed in the critical mode becoming the intermittent mode or the continuous mode, and the oscillation frequency changes significantly. Therefore, there is a problem that it becomes difficult to set the cutoff frequency of the filter that removes switching noise.

On the other hand, in the third embodiment of the present invention, the output current of the drive circuit 230 is output by distinguishing between the base current of the main transistor 180 necessary for controlling the output voltage and the charging current of the feedback capacitor 181. Has solved this problem. That is, the output current of the drive circuit 230 becomes the base current of the main transistor 180 corresponding to the output voltage and the load current in the current accumulation phase, and becomes the current that optimizes the charge amount of the feedback capacitor 181 in the current discharge phase. I have to. These controls are performed by the state detection circuit 360 and the modulation circuit 340.

In the timing chart of FIG. 2, when the period of the current discharging phase is shortened due to the change of the input voltage and the load, the charge amount of the feedback capacitor 181 is insufficient, so that the base potential of the main transistor 180 is lower than before the change. It becomes a value. If this value becomes extremely low, even if the current discharge ends, it is not possible to immediately shift to the current accumulation phase, and the current in the first winding 171 becomes an intermittent mode in which the current continues to be zero, and the period of the current discharge phase greatly increases. become longer. However, according to the configuration of the third embodiment of the present invention, the drive circuit 23
This situation does not occur because the current from 0 is increased. On the other hand, when the period of the current discharging phase becomes long due to the change of the input voltage or the load, the charging amount becomes excessive, and even in the current discharging phase, the main transistor 180 is in the conducting state and the current of the first winding 171 is increased. Is a continuous mode that does not become zero, and the duration of the current emission phase is significantly shortened. However, according to the configuration of the third embodiment of the present invention,
Since the current from the drive circuit 230 is reduced, such a situation does not occur.

The distinction between the current accumulation phase and the current emission phase detected by the state detection circuit 360 can be understood by examining the polarity of the voltage v ₁₇₂ of the winding 172 of the transformer 170. In addition, the feedback capacitor 1 set by the modulation circuit 340
The charge current for optimizing the charge amount of 81 is calculated from the time of the current discharge phase, the capacitance value of the feedback capacitor 181, the required charge voltage value, or the like, or the main transistor 1
The charge amount may be known by measuring the base potential of 80, and the charge current may be stopped, or the charge current may be dynamically adjusted according to the magnitude of the base potential. The modulation circuit 340 controls the feedback capacitor 18 during the current discharging phase.
The method of producing the current for optimally charging 1 is obtained by multiplying the current used in the current accumulation phase obtained by the comparison circuit 310 or the current source 120 by a constant, adding the constant, or obtained by another current generating circuit. A method of switching to current may be used.

The modulation circuit 340 is composed of the drive circuit 230.
It is inserted between the current mirror and the current mirror, but the position where this is provided may be such that the output current of the drive circuit 230 can be distinguished between the current accumulation phase and the current emission phase as a result. good. Further, the output current of the current source 120 other than the drive circuit 230 or the comparison circuit may be controlled. This also results in the drive circuit 230
It suffices that the output current of the above can be distinguished between the current accumulation phase and the current emission phase.

(Regarding the display circuit 365) When using a display device such as an LED, which does not light up at 1.6V to 0.9V, it uses a high voltage after boosting. Increasing power consumption is unavoidable and shortens the battery life of dry battery-powered equipment. The configuration of the third embodiment of the present invention reduces the power consumed by the display by turning on the display at the time of the current discharge phase and turning off the display during the current storage phase. The reduction in power consumption of the display is an effect of continuous lighting to dynamic lighting (or pulse lighting). But DC
By utilizing the oscillation cycle of the DC converter, it is not necessary to newly provide an oscillation circuit. Furthermore, by adjusting the turn-off timing to the current emission phase, the load of the output capacitor 2 supporting the output current can be reduced. As a result, an increase in output voltage ripple can be reduced.

In the configuration of the third embodiment of the present invention, a signal is applied to the display means 365 directly from the state detection circuit 360. In the middle of this, a monostable multivibrator for setting a short lighting time is set. Such a pulse generating circuit may be provided.

[Fourth Embodiment] The fourth embodiment of the present invention corresponds to the third, fifth, sixth, eleventh and twenty-first aspects, and is provided with a step-up type main circuit, which causes problems 1, 3, 5, and 6. Solved 7 and purpose 1,
It achieves 4, 5, and 7.

(Structure of Fourth Embodiment) FIG. 5 shows a fourth embodiment of the present invention.
The configuration of the first embodiment is the same as that of the first embodiment, except that the comparison circuit 310 used in the third embodiment is used instead of the comparison circuit 110, and the main transistor 180 is used instead of the diode 190. Polarity subtransistor 490
And a secondary feedback capacitor 491 that feeds back the voltage of the winding 172 that drives this base, and the drive circuit 43.
0 is different in that it is newly provided, and is a step-up DCDC converter device having the same configuration other than that.

The emitter of the slave transistor 490 is as shown in FIG.
The anode of the diode 190 of the first embodiment shown in FIG. 2 is connected to the anode, and the collector is connected to the cathode of the diode 190. In addition, the drive circuit 43
0 is composed of a current mirror composed of transistors 231, 232 and 435, a current mirror composed of transistors 133 and 134, a current mirror composed of transistors 436 and 437, and a current mirror composed of transistors 438 and 439. The current mirrors of the transistors 231 and 232 and the current mirrors of the transistors 133 and 134 are the same as those of the second embodiment, but the transistors 231 and 23 are the same.
Transistor 435 is added to the 2nd current mirror,
Further, a current mirror of the transistors 436 and 437 and a current mirror of the transistors 438 and 439 are provided.

(Operation of Fourth Embodiment) The operation of the fourth embodiment of the present invention is that the current accumulated in the winding 171 is guided to the output terminal via the emitter-collector of the slave transistor 490. The operation differs from that of the first embodiment described above. However, the basic operation of supplying electric power to the output terminal is exactly the same while alternately repeating the current accumulation phase and the current emission phase.

The difference between the present embodiment and the first embodiment described above lies in the diode 190 of each main circuit involved in the current discharging phase and the slave transistor 490. Appears in. Therefore, the "current accumulation phase start" and "current accumulation phase" of the operation of the present embodiment are almost the same as the operation of the first embodiment described above. ~ Start of current discharge phase "" Current discharge phase "" End of current discharge phase ~ Start of current accumulation phase "
Will be performed with reference to the circuit diagram of FIG. 5 and the timing diagram of FIG.

(End of Current Accumulation Phase-Start of Current Emission Phase) When the current in the winding 171 increases to reach the potential collector current of the main transistor 180, the collector of the main transistor 180 comes out of saturation and the collector The emitter voltage suddenly rises. As a result, winding 17
The current of 1 stops increasing, and the positive voltage generated in the winding 172 goes to zero. Since this voltage change is applied to the base of the main transistor 180 through the feedback capacitor 181, the base current decreases and the collector current of the main transistor 180 also decreases. On the other hand, this voltage change is also applied to the base of the sub-transistor 490 through the sub-feedback capacitor 491, so that the sub-transistor 490, which has been cut off until now, tries to flow its collector current.

On the other hand, the magnetic flux in the magnetic circuit generated by the winding 171 acts to cause a current commensurate with its magnitude to flow in any of the windings sharing the magnetic circuit.
The reduced amount of the collector current of the main transistor 180 tries to flow through the slave transistor 490 to the capacitor 2 or the load 3 at the output end. The current in the winding 171 pushes up the emitter potential of the slave transistor 490,
The base-emitter voltage of the slave transistor 490 is increased, it is forward biased, and the current from the emitter through the collector is tried to flow into the load 3.

(Current emission phase) By starting to flow current from the winding 171 to the load 3, the voltage at the output end increases,
On the contrary, the current value of the winding 171 decreases. As a result, the positive voltage generated in the winding 172 is inverted into negative, and this voltage change is applied to the base of the main transistor 180 through the feedback capacitor 181, so that the base current is reduced at once and accumulated in the winding 171. All the generated current goes to the emitter of the slave transistor 490. On the other hand, since the voltage change of the winding 172 is applied to the base of the slave transistor 490 through the slave feedback capacitor 490, the base current increases at once. As a result, both the change in the emitter potential of the slave transistor 490 and the change in the base potential act in the direction of forward biasing, so that the slave transistor 490 is highly saturated. Then, the current accumulated in the winding 171 is the collector-transistor of the sub-transistor 490 whose voltage drop is extremely small
Passing between the emitters, output capacitor 2 and load 3
Flow to. As is clear from the waveform of the emitter potential of the slave transistor 490 in FIG. 6 and the anode potential v ₁₇₁ of the diode 190 in FIG. 2 of the first embodiment, the power loss in the slave transistor 490 is Significantly smaller.

At this time, the surplus electric charge of the base accumulated at the saturation of the main transistor 180 instantaneously flows through the feedback capacitor 181, and the feedback capacitor 181 is slightly charged, but the base enough to block the main transistor 180 sufficiently. The potential v _b180 is maintained. On the other hand, the secondary feedback capacitor 491 is discharged by the base current of the large secondary transistor 490. After that, the feedback capacitor 181 is charged by the current i _b180 from the drive circuit 430,
The base potential v _b180 of the main transistor 180 increases with time. The charging of the feedback capacitor 181 is set to be completed within the current discharging phase period of the transformer 170. This charging time depends on the feedback capacitor 18
It is proportional to the capacitance value C _{181 of} 1 and inversely proportional to the current value i _b180 from the drive circuit 130.

(End of current discharge phase to start of current storage phase) Then, with time, the current flowing from the winding 171 to the load 3 decreases, and when it reaches a value that passes zero,
The direction of the collector current of the slave transistor 490, which has been flowing from the emitter to the collector until now, is reversed. Then, the sub-transistor 490 starts to operate as a reverse transistor in which the collector and the emitter are opposite to each other, but the characteristics such as the current amplification factor change rapidly, and the collector-emitter voltage increases, making it difficult for the current to flow. Therefore, winding 1
The reduction rate of the current of 71 becomes small, and the negative voltage generated in the winding 172 goes to zero. The voltage change is applied to the base of the main transistor 180 through the feedback capacitor 181, so that the base current increases and the collector current of the main transistor 180 increases. Also, since the current is added to the base of the slave transistor 490 through the slave feedback capacitor 491, the base current decreases, and
The collector current of 90 also decreases. As a result, the collector of the main transistor 180 is saturated again, and the slave transistor 4
The emitter potential of 90 is lowered to almost the ground potential.

[0100] (Current accumulation phase) Then, again, winding 1
A positive voltage is generated at 72, and this voltage change is applied to the base of the main transistor 180 through the feedback capacitor 181, so that the base current increases at once and the main transistor 1
The collector of 80 is highly saturated, reducing its collector-emitter voltage. Further, since it is added to the base of the slave transistor 490 through the slave capacitor 491, the base current is reduced at once. As a result, the slave transistor 4
Since both the change in the emitter potential of 90 and the change in the base potential are directed in the reverse bias direction, the secondary transistor 490
Shut off.

At this time, the surplus charge of the base accumulated at the saturation of the slave transistor 490 instantaneously flows through the feedback capacitor 491 to slightly charge the slave feedback capacitor 491, but the slave transistor 490 is sufficiently cut off. The base potential v _b490 is maintained. On the other hand, the feedback capacitor 181 is discharged by the base current of the large main transistor 180. After that, the secondary feedback capacitor 491
Since it is charged by the current i _b490 from the drive circuit 430, the base potential v _b490 of the slave transistor 490 decreases with time. The charging of the secondary feedback capacitor 491 does not end within the current discharging phase period of the transformer 170, and is set so that the change of its terminal voltage is small, and the secondary feedback capacitor 491 behaves like a voltage source.
This charging time depends on the capacitance value C of the secondary feedback capacitor 491.
_It is proportional to ₄₉₁ and inversely proportional to the current value i _b490 from the drive circuit 230.

As a result of such repetition, the output load 3
When the terminal voltage of increases and exceeds the reference voltage 311, the output current flows through the amplifier circuit 312, the current from the current source 120 is intercepted, and the output current of the driving means 430 is adjusted. The base current of the transistor 180 and the base current of the slave transistor 490 decrease. As a result, the potential collector current of main transistor 180 is also reduced. As a result of the decrease in the current accumulated in the winding 171, the total amount of the current discharged from the winding 171 to the load 3 decreases, and the terminal voltage of the load 3 decreases. In this way, the voltage at the output terminal can be controlled by adjusting the base current of the main transistor 180.

If the collector current of the main transistor 180 is increased, it is mainly because the output current is increased. As the output current is increased, the collector current of the slave transistor 490 is also increased. Therefore, if the collector current of the main transistor 180 increases, the collector current value of the slave transistor 490 must also increase accordingly. Because of this relationship,
In the configuration of the fourth embodiment of the present invention, the main transistor 180
The current linked to the base current of the secondary transistor 490
It is configured to be supplied to the base of.

As described above, the secondary transistor 490 is used to guide the current in the current emission phase to the output terminal, so that the voltage drop generated there can be suppressed to an extremely small level. As a result, the above-mentioned fifth problem that the power conversion efficiency of the DCDC converter device is lowered can be solved.

Further, in the structure of the fourth embodiment of the present invention, the current flowing to the base node of the main transistor 180 and the current flowing to the base node of the slave transistor 490 have the same magnitude, which simplifies the circuit. However, it is necessary to set this individually for each characteristic such as the current amplification factor of the transistor. In that case, a new current source or a new input terminal for the driving means 430 may be provided.

(Fifth Embodiment) The fifth embodiment of the present invention corresponds to the fourth, fifth, sixth, seventh, twelfth and twenty-first embodiments, and is provided with a step-up type main circuit to cause problems 1, 3, 4, and. 5, 6, and 7 are solved and the objectives 1, 3, 4, 5, and 7 are achieved.

(Structure of Fifth Embodiment) FIG. 7 shows the fifth embodiment of the present invention.
FIG. 6 illustrates a configuration of an example, and includes the fourth example illustrated in FIG.
The configuration of the embodiment is different from that of the embodiment in that a state detection circuit 360 and a modulation circuit 540 are newly provided, and is a step-up DCDC converter device having the same configuration except the above.

The drive circuit 430 includes a transistor 231,
A current mirror composed of transistors 232 and 435; a current mirror composed of transistors 133 and 134; a current mirror composed of transistors 436 and 437; and a current mirror composed of transistors 438 and 439. Same as the embodiment, but between the output of the current mirror of the transistors 231, 232 and the input of the current mirror of the transistors 133, 134, and the output of the current mirror of the transistors 231, 435, and the transistors 436, 437. A modulation circuit 540 is inserted between the inputs of the current mirrors of.

The state detection circuit 360 detects the current accumulation phase or the current emission phase of the main circuit 401 and outputs the result to the modulation circuit 540. When the state detection circuit 360 determines that it is in the current accumulation phase, the modulation circuit 540 supplies the input current to the base node of the main transistor 180, and the sub feedback capacitor 4
A current of a value that optimizes the charging of 91 is supplied to the slave transistor 49.
0 to each base node. On the other hand, when it is determined that the current discharging phase, the current having a value that optimizes the charging of the feedback capacitor 181 is supplied to the base node of the main transistor 180, and the input current is supplied to the base node of the slave transistor 490. In addition, it is configured to output each separately. The modulation circuit 540 has a function similar to that of the modulation circuit 340 of the third embodiment.

(Operation of the Fifth Embodiment) In the operation of the fifth embodiment of the present invention, the output current of the drive circuit 530 has different values in the current accumulation phase or the current discharge phase. It is different from the operation of the above-described fourth embodiment in that the data is separately output to the nodes. However, the basic operation of supplying electric power to the output terminal is exactly the same while alternately repeating the current accumulation phase and the current emission phase. The operation waveforms of the fifth embodiment of the present invention are the same as the timing chart of FIG. 6 of the fourth embodiment in which the main circuit 401 is the same. The operation of this embodiment relating to the difference will be described below with reference to the circuit diagram of FIG. 7 and the timing diagram of FIG.

In the configuration of the fourth embodiment described above, the current adjusted by the comparison circuit 310 in order to set the output voltage to the target value is changed from the output of the drive circuit 430 to the node of each base of the main transistor 180 and the slave transistor 490. Is supplied to. In circuit operation, the main transistor 180 requires a current of this magnitude during the current accumulation phase, and is used for charging the feedback capacitor 181 during the current discharging phase. On the other hand, the slave transistor 490 requires a current of this magnitude during the current discharging phase, and during the current storage phase, the slave feedback capacitor 491 is required.
It is used for charging.

When the input voltage and the load current fluctuate greatly, the base currents of the main transistor 180 and the slave transistor 490 change due to the output voltage control according to the fluctuation, and the feedback capacitor 181 and the slave feedback capacitor 491 are charged. The current also changes. Furthermore, since the oscillation cycle fluctuates greatly, the charging time also changes, and the charging amount of the feedback capacitor 181 and the secondary feedback capacitor 491 becomes excessive or insufficient. When the fluctuation range becomes large, a sudden change in the operating mode occurs, such as the main circuit designed in the critical mode becoming an intermittent mode or a continuous mode, and the oscillation frequency changes significantly. There arises a problem that it becomes difficult to set the cutoff frequency.

On the other hand, in the fifth embodiment of the present invention, the output current of the drive circuit 430 is set to the base currents of the main transistor 180 and the slave transistor 490 necessary for controlling the output voltage, the feedback capacitor 181 and the slave feedback capacitor 49.
This problem is solved by the configuration in which the charging current of 1 and the charging current of 1 are separately output. That is, the drive circuit 4
The current supplied by 30 to the base node of the main transistor 180 has a magnitude corresponding to the output voltage and the load current in the current accumulation phase, and has a magnitude that makes the charge amount of the feedback capacitor 181 an optimum value in the current discharge phase. I am trying to become. In addition, the current supplied by the drive circuit 430 to the node at the base of the slave transistor 490 is optimized to the magnitude corresponding to the output voltage and the load current in the current discharge phase, and the charge amount of the slave feedback capacitor 491 is optimized in the current accumulation phase. The current is set to a value. These controls are performed by the state detection circuit 360 modulation circuit 540.

In the timing chart of FIG. 6, when the period of the current discharging phase becomes shorter due to the change of the input voltage and the load, the charge amount of the feedback capacitor 181 becomes insufficient, so that the base potential of the main transistor 180 is lower than before the change. It becomes a value. If this value becomes extremely low, even if the current discharge ends, it is not possible to immediately shift to the current accumulation phase, and the current in the first winding 171 becomes an intermittent mode in which the current continues to be zero, and the period of the current discharge phase greatly increases. become longer. However, according to the configuration of the fifth embodiment of the present invention, the drive circuit 43
This situation does not occur because the current from 0 is increased. On the contrary, if the period of the current discharging phase becomes long due to the change of the input voltage or the load, the charging amount becomes excessive, and even in the current discharging phase, the main transistor 180 becomes conductive and the first winding 171 It is in continuous mode in which the current does not become zero, and the duration of the current discharge phase is greatly shortened. However, according to the configuration of the fifth embodiment of the present invention,
Since the current from the drive circuit 430 is reduced, such a situation does not occur.

On the other hand, if the period of the current accumulation phase becomes long due to changes in input voltage and load, the secondary feedback capacitor 4
Since the charge amount of 91 becomes excessive, the secondary transistor 490
The base potential of is lower than before the change. When this value becomes extremely low, the sub-transistor 490, which should have been cut off, becomes conductive, and the current flows backward from the output terminal to the collector of the main transistor 180, increasing the power loss. However, according to the configuration of the fifth embodiment of the present invention, since the current from the drive circuit 430 is reduced, such a situation does not occur. Conversely, due to changes in input voltage and load,
When the period of the current accumulation phase becomes short, the charge amount becomes insufficient. When this amount becomes extremely small, the amount of positive feedback charge in the current emission phase decreases, so
The voltage drop in the initial stage of conduction increases and the power loss increases. However, according to the configuration of the fifth embodiment of the present invention, since the current from the drive circuit 430 is increased, such a situation does not occur.

The method for distinguishing the current accumulation phase and the current emission phase of the state detection circuit 360, the modulation circuit 5
The charging current value of the feedback capacitor 181 and the sub feedback capacitor 491 set by 40 and the method of generating the charging current value are
This is the same as the state detection circuit 360 and the modulation circuit 340 of the embodiment. As a result, the position where the modulation circuit 540 is provided may be any position as long as the output current of the drive circuit 430 can be distinguished between the current accumulation phase and the current emission phase.

(Summary of Step-up Type Main Circuits of First to Fifth Embodiments and Development to Step-Down Type and Polarity Reversal Type) The first to fifth embodiments of the present invention described so far also include conventional examples. Including the above, the configuration was a step-up DCDC converter.
The following first loop, second loop and third loop are the main current paths of these booster main circuits.

The first loop includes the ground side of the input power supply, the positive voltage side of the input power supply, the first terminal of the first winding of the transformer, the second terminal of the first winding of the transformer, the collector of the main transistor, and the main. This is the current path of the current accumulation phase from the emitter of the transistor to the ground side of the input power supply.

The second loop is the first, second,
In the third embodiment, the ground side of the input power source, the positive voltage side of the input power source, the first terminal of the first winding of the transformer, the second terminal of the first winding of the transformer, the anode of the diode, the cathode of the diode, and the load. Output side to the ground side of the load, and in the fourth and fifth embodiments, the ground side of the input power source-the positive voltage side of the input power source-the first terminal of the first winding of the transformer-the first winding of the transformer. A second terminal of the line, an emitter of the sub-transistor, a collector of the sub-transistor, an output end side of the load, and a current path of a current discharging phase that is the ground side of the load.

Further, the third loop is the second transformer
Second terminal of winding (ground side) to first of second winding of transformer
Terminal-first terminal of feedback capacitor-second terminal of feedback capacitor-base of main transistor-emitter of main transistor-second terminal of second winding of transformer (ground side),
Positive feedback from the second winding that shares a magnetic circuit with the first winding serves to cause blocking oscillation.

By the way, the main transistor can be understood as follows. That is, a current source that operates only in the range of the first quadrant of the coordinate system in which the voltage of the collector with respect to the emitter is the X axis, and the current flowing from the collector to the emitter is the Y axis. The value remains zero, and the current flowing from the emitter to the collector is
It can be considered as an element that can be set by the current applied to the base. The input power of the first loop is the main transistor and the inductor (the first of the transformer).
It may be considered that by biasing the winding 171), the main transistor is operated in the range of the first quadrant and behaves as a variable current generating means.

Therefore, from the operations of the above-mentioned first to fifth embodiments, in the configuration of the first loop, the variable current generating means, which can supply the current only in the first quadrant composed of the input power supply and the main transistor, supplies the current. It can be said that it is configured to supply current to the accumulating inductor. It can be said that the configuration of the third loop is a positive feedback unit that quickly sets the current value to zero when the current of the variable current generating unit reaches a set value and disconnects the current path of the first loop. As a result, the force of the inductor that keeps flowing the current causes the rectifying means of the second loop to shift in the forward direction to open the current path and discharge the current to the output end. It can be said that it is a thing.

As described above, the structure and operation of the step-up DCDC converters of the first to fifth embodiments can be explained by the variable current generating means, the positive feedback means, and the rectifying means. However, the same idea can be applied to the step-down DCDC converters having the configurations of the sixth to ninth embodiments and the polarity reversing DCDC converters having the configurations of the tenth to thirteenth embodiments to be described below. That is, the operation of the step-up type, step-down type, and polarity reversal type main circuits can be explained by the variable current generating means, the positive feedback means, and the rectifying means. Each type is divided into the direction of the output current of the variable current generating means, the direction of the current input to the rectifying means, and the polarity and magnitude of the input / output voltage of the main circuit.

The current accumulated in the inductor from the variable current generating means has the following two directions. If you try to make a current flow out of the inductor, you will have a configuration consisting of an input power supply and an NPN transistor connected to the negative voltage side. Conversely, if you try to make a current flow into the inductor, it becomes It is configured with a connected PNP transistor. The former is used for step-up type main circuits, and the latter is used for step-down type main circuits and polarity reversal type main circuits.

The current discharged from the inductor to the rectifying means also has the following two directions. When the direction of the emission current of the inductor is in the direction of flowing out, the polarity of the rectifying means is such that the anode is connected if it is a diode and the emitter of the PNP transistor is connected if it is a slave transistor. On the contrary, in the case of the inflow direction, the polarity of the rectifying means is such that the cathode is connected if it is a diode, and the emitter of the NPN transistor is connected if it is a slave transistor. The former is used for step-up type main circuits, and the latter is used for step-down type main circuits and polarity reversal type main circuits.

In addition, the magnitude relationship between the output voltage and the input voltage of the main circuit, the positive / negative of the polarity, and the potential shared by the input power supply and the output voltage, for example, where is the ground potential?
Are different.

As described above, although there are differences in the details of the configuration, the function of each element is the same in all models,
It is composed of a first loop using a variable current generating means, a third loop using a positive feedback means, and a second loop using a rectifying means, and the basic configuration and operating principle are the same.

Therefore, the step-up type DCDC converter of the polarity reversal type may be provided with the step-up type DCDC converter provided with the means for solving the problems of the conventional examples as in the first to fifth embodiments. The same effect as the obtained effect can be obtained. Hereinafter, this will be described in the sixth to thirteenth embodiments.

(Sixth Embodiment) The sixth embodiment of the present invention corresponds to the first, fifth, sixth, thirteenth and twenty-first aspects and is provided with a step-down type main circuit to solve the problems 1, 3, 6, and 7. Solved, Objectives 1, 5, 7
Is achieved.

(Structure of Sixth Embodiment) FIG. 8 shows the sixth embodiment of the present invention.
1 illustrates a configuration of a step-down DCDC converter according to an embodiment. This is the drive circuit 13 of the first embodiment shown in FIG.
0 and the comparison circuit 110 are replaced by the drive circuit 230 of FIG. 2 of the second embodiment shown in FIG. 3 and the comparison circuit 310 of the third embodiment shown in FIG. The means for solving the problems of the DCDC converter is applied to the step-down DCDC converter.

In FIG. 8, 1 is an input power source, 2 is an output capacitor, 3 is an output load, 170 is a transformer having a first winding 171 and a second winding 172 sharing a magnetic circuit, and 680 is a main A transistor, 681 is a feedback capacitor, and 690 is a diode.
Are configured. Further, the current source 120 and the comparison circuit 310
Is the same as FIG. 3 of the third embodiment. further,
Reference numeral 630 is a drive circuit, which includes a current mirror including transistors 231 and 435, a current mirror including transistors 436 and 437, and transistors 438 and 439.
And a current mirror consisting of. And
With the current source 120, the drive circuit 630, and the comparison circuit 310,
A control circuit 602 that guides the output voltage to a target voltage is configured.

(Operation of Sixth Embodiment) Current paths of the step-down main circuit of this embodiment corresponding to the first, second and third loops of the step-up main circuits of the first to fifth embodiments. Is the following loop.

The first loop includes the ground side of the input power supply 1 to the positive voltage side of the input power supply 1 to the emitter of the main transistor 680 to the collector of the main transistor 680 to the second terminal of the first winding 171 to the first winding. The first terminal of 171 to the output terminal side of the load 3 to the ground side of the load 3 to the ground side of the input power supply 1 are current paths in the current accumulation phase.

The second loop includes: the anode (ground side) of the diode 690 to the cathode of the diode 690 to the second terminal of the first winding 171 to the first terminal of the first winding 171.
Output Terminal Side of Load 3 -Ground Side of Load 3 -Diode 690
The anode (ground side) of is the current path of the current emission phase.

Further, the third loop includes the second terminal (ground side) of the second winding 172, the first terminal of the second winding 172, the first terminal of the feedback capacitor 681, and the second terminal of the feedback capacitor 681. The base of the main transistor 680-the emitter of the main transistor 680-the positive voltage side of the input power supply 1-the ground side of the input power supply 1-the second terminal (ground side) of the second winding.
This is a positive feedback path from the second winding 172 that shares a magnetic circuit with the winding 171.

That is, the variable current generating means of the first loop generates the current in the direction of flowing into the first winding 171, and the input power supply 1 and the PNP type main transistor 6 are used.
80, and the rectification means of the second loop is the first
The direction of the diode 690 is determined so that the current in the direction in which the current continuously flows into the winding 171 of the diode 690. Then, the positive feedback means of the third loop is configured to cause blocking oscillation by the positive feedback from the second winding 172 sharing the magnetic circuit with the first winding 171.

In the step-down DCDC converter of the sixth embodiment of the present invention, the current flows through the first loop at the beginning of the current accumulation phase, but when the current of the first winding 171 is small,
Since the main transistor 680 is saturated, the first winding 1
A difference between the voltage of the input power source 1 and the voltage of the output terminal is applied to 71. When the current in the first winding 171 increases to reach the potential collector current value of the main transistor 680,
The voltage of the winding 172 is applied to the base of the main transistor 680 via the feedback capacitor 681, and the main transistor 680 is cut off. Then, the force that keeps the current flowing in the first winding 171 to continue makes the terminal voltage of the diode 690 a forward voltage and keeps the current flowing toward the load 3. When this current becomes smaller and reaches a value that crosses zero,
Since the diode 690 blocks its flow, the voltage on the second winding 172 reverses and saturates the main transistor 680 again via the feedback capacitor 681.

As described above, the operation of the sixth embodiment of the present invention is similar to the operation of the first embodiment described above: "current accumulation phase start""current accumulation phase""current accumulation phase end-current emission phase". "Start""Current emission phase"
Power is supplied to the output terminal by repeating the cycle of "end of current emission phase to start of current accumulation phase". Then, the magnitude of the power supplied to the output terminal is determined by the amount of current storage in the current storage phase, which is controlled by the current supplied from the control circuit 602 to the base of the main transistor 680.

This is shown in the timing chart of FIG. 9, in which the directions of the current in the first winding 171 of the main circuit 601, the collector current of the main transistor 680, and the current of the diode 690 are shown in FIG. I am keeping it. This current waveform is the same as the current waveform of the step-up DCDC converter of the first embodiment shown in the timing chart of FIG.

As described above, the operations and effects of the sixth embodiment of the present invention are the same as those of the step-down type main circuit and the step-up type main circuit because the basic configurations and operation principles are the same.
The operation and effect of the embodiment are almost the same. Therefore, since the upper limit value of the base current supplied from the collector of the transistor 439 of the drive circuit 630 does not depend on the fluctuation of the input voltage, the current value can be easily set. Further, the difference between the worst condition and the best condition becomes small, so that the design margin of the upper limit value of the base current can be small. Therefore, the waste current associated with the output voltage control is reduced, wasteful power consumption is suppressed, and the protection of the main transistor during start-up or overload can be optimized. Eliminates the need to use transistors with As a result, it is possible to solve the first problem that the power conversion efficiency of the DCDC converter is lowered and the third problem that the cost is increased.

(Seventh Embodiment) The seventh embodiment of the present invention corresponds to claims 2, 5, 6, 7, 14, and 21 and is provided with a step-down type main circuit. 6 and 7 are solved and the objectives 1, 3, 5, 6, and 7 are achieved.

(Structure of Seventh Embodiment) FIG. 10 shows the structure of a step-down DCDC converter according to the seventh embodiment of the present invention. This is a step-down DCDC converter to which the means for solving the problem of the step-up DCDC converter using the diode 190, the state detection circuit 360, and the modulation circuit 340 of the third embodiment shown in FIG. 4 is applied. .

In FIG. 10, 1 is an input power source, 2 is an output capacitor, 3 is an output load, 170 is a transformer having a first winding 171 and a second winding 172 sharing a magnetic circuit, and 680 is a main A transistor, 681 is a feedback capacitor, and 690 is a diode.
Are configured. Further, the current source 120 and the comparison circuit 310
Is the same as in the third embodiment. Further, the drive circuit 630 is the same as that of the sixth embodiment,
A modulation circuit 740 is inserted between the output of the current mirror composed of the transistors 231 and 435 and the input of the current mirror composed of the transistors 436 and 437.

The state detection circuit 360 detects the current accumulation phase or the current emission phase of the main circuit 601, and outputs the result to the modulation circuit 740. The modulation circuit 740 is
When the state detection circuit 360 determines that it is in the current accumulation phase, the same current as the input is input, and when it is determined that it is in the current discharge phase, the current of a value that optimizes the charging of the feedback capacitor 681 is divided into respective regions. It is configured to output separately. Then, in the current source 120, the drive circuit 630, the comparison circuit 310, the state detection circuit 360, and the modulation circuit 740,
A control circuit 702 that guides the output voltage to a target voltage is configured.

(Operation of Seventh Embodiment) The operation of the seventh embodiment of the present invention is that the output current of the drive circuit 630 distinguishes and outputs different values in the current accumulation phase or the current emission phase. It differs from the operation of the sixth embodiment. However, the basic operation of supplying power to the output terminal while repeating the current accumulation phase and the current emission phase alternately is exactly the same. The operation waveforms of the seventh embodiment of the present invention are the same as the timing chart of the sixth embodiment shown in FIG. 9 in which the main circuit 601 is the same.

With the configuration of the seventh embodiment of the present invention, the operation and effect of the newly added modulation circuit 740 and state detection circuit 360 are the same as the basic configuration and operation principle of the above step-down type main circuit and step-up type main circuit. Are the same, the operations and effects of the third embodiment are the same.

Therefore, even if the period of the current discharging phase is shortened by the change of the input voltage or the load, the driving circuit 630
The amount of charge from the feedback capacitor 681 is set to an appropriate value by increasing the current from the output current, so that a large change in the period of the current discharge phase can be suppressed. On the contrary, even if the period of the current emission phase becomes longer due to the change of input voltage or load,
Since the current from the drive circuit 630 is reduced and the charge amount is set to an appropriate value, it is possible to suppress a large change in the period of the current discharge phase.

[Eighth Embodiment] The eighth embodiment of the present invention corresponds to the third, fifth, sixth, fifteenth and twenty-first aspects, and is provided with a step-down type main circuit to cause problems 1, 3, 5, 6, and. Solved 7 and purpose 1,
It achieves 4, 5, and 7.

(Structure of Eighth Embodiment) FIG. 11 shows the structure of a step-down DCDC converter according to the eighth embodiment of the present invention. This is an application of the means for solving the problem of the step-up DCDC converter using the slave transistor 490 of the fourth embodiment shown in FIG. 5 to the step-down DCDC converter.

In FIG. 11, 1 is an input power source, 2 is an output capacitor, 3 is an output load, 170 is a transformer having a first winding 171 and a second winding 172 sharing a magnetic circuit, and 680 is a main A transistor, 681 is a feedback capacitor, 890 is a slave transistor, and 891 is a slave feedback capacitor, and these constitute the main circuit 801. The current source 120 and the comparison circuit 310 are the same as those in the third embodiment. Further, the drive circuit 430 is the same as that of the fourth embodiment. The current source 120, the drive circuit 430, and the comparison circuit 310 constitute a control circuit 802 that guides the output voltage to the target voltage.

(Operation of Eighth Embodiment) The first loop and the third loop of the step-down type main circuit of the eighth embodiment of the present invention are the same as those of the sixth embodiment. The second loop includes a collector (ground side) of the slave transistor 890, an emitter of the slave transistor 890, a second terminal of the first winding 171 and a first loop.
At the first terminal of the winding 171, the output end side of the load 3, the ground side of the load 3, and the collector (ground side) of the slave transistor 890,
It is a current path in the current emission phase.

That is, the variable current generating means of the first loop generates the current in the direction of flowing into the first winding 171, and the input power source 1 and the PNP type main transistor 6 are used.
80, and the rectifying means of the second loop makes the current flowing in the first winding 171 continue to flow,
It is composed of an NPN type secondary transistor 890. Then, the positive feedback means of the third loop, by the positive feedback from the second winding 172 sharing the magnetic circuit with the first winding 171,
It is configured to cause a blocking oscillation.

In the step-down DCDC converter of this embodiment, the current flows through the first loop at the beginning of the current accumulation phase, but when the current in the first winding 171 is small, the main transistor 680 is saturated. The difference between the voltage of the input power supply 1 and the voltage of the output terminal is applied to the first winding 171.
The current in the first winding 171 increases and the main transistor 68
When the potential collector current value of 0 is reached, the second winding 17
The voltage of 2 is applied to the base of the main transistor 680 via the feedback capacitor 681,
Shuts off. Then, the force that keeps the current flowing through the first winding 171 to pull down the emitter potential of the slave transistor 890, and the voltage of the second winding 172 causes the base potential of the slave transistor 890 via the slave feedback capacitor 891. As a result, the base-emitter voltage becomes a forward voltage to saturate the slave transistor 890, and a current flows toward the load 3 via a slight collector-emitter voltage. When this current becomes small and reaches a value that crosses zero, the collector-emitter voltage of the slave transistor 890 increases, so that the voltage of the second winding 172 reverses.
Through the feedback capacitor 681, the main transistor 680
Is saturated again and the slave transistor 890 is also cut off.

As described above, the operation of the eighth embodiment of the present invention is similar to the operation of the fourth embodiment described above: "current accumulation phase start""current accumulation phase""current accumulation phase end-current emission phase". "Start""Current emission phase"
Power is supplied to the output terminal by repeating the cycle of "end of current emission phase to start of current accumulation phase". Then, the magnitude of the power supplied to the output terminal is determined by the amount of current storage in the current storage phase, which is controlled by the current supplied from the control circuit 802 to the base of the main transistor 680.

This is shown in the timing chart of FIG. 12, in which the current of the first winding 171 of the main circuit 801, the collector current of the main transistor 680, and the slave transistor 8 are shown.
The directions of the 90 emitter currents are set as shown in FIG. This current waveform is the same as the current waveform of the step-up DCDC converter of the fourth embodiment shown in the timing chart of FIG.

As described above, the operation and effect of the eighth embodiment of the present invention are the same as those of the fourth embodiment because the above-described step-down main circuit and step-up main circuit have the same basic configuration and operation principle. The effect is almost the same. Therefore, the sub-transistor 890
Is used to guide the current in the current emission phase to the output end, the voltage drop occurring there can be suppressed to an extremely small level. As a result, the fifth problem of reducing the power conversion efficiency of the DCDC converter device can be solved.

[Ninth Embodiment] The ninth embodiment of the present invention corresponds to claims 4, 5, 6, 7, 16 and 21, and is provided with a step-down main circuit to cause problems 1, 3, 4, and 5. , 6 and 7 are solved to achieve the objectives 1, 3, 4, 5, and 7.

(Structure of Ninth Embodiment) FIG. 13 shows the structure of a step-down DCDC converter according to the ninth embodiment of the present invention. This is an application of the means for solving the problem of the step-up DCDC converter using the slave transistor 490, the state detection circuit 360, and the modulation circuit 540 of the fifth embodiment shown in FIG. 7 to the step-down DCDC converter. is there.

In FIG. 13, 1 is an input power source, 2 is an output capacitor, 3 is an output load, 170 is a transformer having a first winding 171 and a second winding 172 sharing a magnetic circuit, and 680 is a main A transistor, 681 is a feedback capacitor, 890 is a slave transistor 891 is a slave feedback capacitor, and these constitute a main circuit 801. Also,
The current source 120 and the comparison circuit 310 are the same as those in the third embodiment. Further, the drive circuit 430 is the same as that of the fourth embodiment, except that the transistors 231 and 23 are
2 current mirror output and transistors 133, 1
A modulation circuit 940 is inserted between the inputs of the current mirrors of 34, and between the outputs of the current mirrors of the transistors 231 and 435 and the inputs of the current mirrors of the transistors 436 and 437.

The state detection circuit 360 detects the current accumulation phase or the current emission phase of the main circuit 801, and outputs the result to the modulation circuit 940. When the state detection circuit 360 determines that it is in the current accumulation phase, the modulation circuit 940 sets the input current to the base node of the main transistor 680 and a value that optimizes the charging of the secondary feedback capacitor 891. Current of sub-transistor 8
Flow to each of the 90 base nodes. On the other hand, when the current discharge phase is determined, a current having a value that optimizes the charging of the feedback capacitor 681 is supplied to the base node of the main transistor 680, and an input current is supplied to the base node of the slave transistor 890. In addition, it is configured to output each separately. The current source 120, the drive circuit 430, the comparison circuit 310, the state detection circuit 360, and the modulation circuit 940 constitute a control circuit 902 that guides the output voltage to a target voltage.

(Operation of Ninth Embodiment) The operation of the ninth embodiment of the present invention is that the output current of the drive circuit 430 distinguishes and outputs different values in the current accumulation phase or the current discharge phase. The operation is different from that of the eighth embodiment. However, the basic operation of supplying electric power to the output terminal is exactly the same while alternately repeating the current accumulation phase and the current emission phase. The operation waveform of the ninth embodiment of the present invention is the main circuit 801.
Is the same as the timing diagram of the eighth embodiment of the present invention shown in FIG.

In the configuration of the ninth embodiment of the present invention, the operation and effect of the newly added modulation circuit 940 and state detection circuit 360 are the same as the basic configuration and operation principle of the above step-down type main circuit and step-up type main circuit. Are the same, the operations and effects of the fifth embodiment are the same.

Therefore, even if the period of the current discharge phase is shortened by the change of the input voltage or the load, the drive circuit 430
The amount of charge from the feedback capacitor 681 is set to an appropriate value by increasing the current from the output current, so that a large change in the period of the current discharge phase can be suppressed. On the contrary, even if the period of the current emission phase becomes longer due to the change of input voltage or load,
Since the current from the drive circuit 430 is reduced and the charge amount is set to an appropriate value, it is possible to suppress a large change in the period of the current discharge phase.

On the other hand, even if the period of the current accumulation phase becomes long due to the change of the input voltage or the load, the current from the drive circuit 430 is made small and the charge amount of the sub feedback capacitor 891 is set to an appropriate value. The block of 890 can be maintained. On the contrary, even if the period of the current accumulation phase becomes long due to the change of the input voltage or the load, the current from the drive circuit 430 is increased and the charge amount is adjusted to an appropriate value. The voltage drop can be kept low.

[Tenth Embodiment] The tenth embodiment of the present invention corresponds to the first, fifth, sixth, seventeenth and twenty-first embodiments, and is provided with a polarity reversal type main circuit to cause problems 1, 3, 6, and 7. To achieve the objectives 1, 5, and 7.

(Structure of Tenth Embodiment) FIG. 14 shows the structure of a polarity reversal type DCDC converter of the tenth embodiment of the present invention. This corresponds to the drive circuit 130 and the comparison circuit 110 of the first embodiment shown in FIG. 11, the drive circuit 230 of the second embodiment shown in FIG. 3, and the comparison circuit 310 of the third embodiment shown in FIG. Replace with and diode 19
The means for solving the problem of the step-up DCDC converter using 0 is applied to the polarity reversal type DCDC converter.

In FIG. 14, 1 is an input power source, 2 is an output capacitor, 3 is an output load, 170 is a transformer having a first winding 171 and a second winding 172 sharing a magnetic circuit, and 1080 is a main A transistor, 1081 is a feedback capacitor, 1090 is a diode, and these constitute the main circuit 1001. The current source 120 is the same as that of the third embodiment. Further, the drive circuit 630 is
This is the same as the sixth embodiment. In addition, the comparison circuit 101
0 is composed of a reference voltage 311, an amplifier circuit 312, and a level shift circuit 1013.

In the conventional step-up and step-down DCDC converters, the potential at the output end rises when the base current of the main transistor increases. However, the polarity reversal type DCDC converter as in the tenth embodiment of the present invention. Then, the absolute value of the negative voltage increases, but the potential decreases, so if you try to utilize the potential change for control, you must reverse the phase of the control circuit. Therefore, the reference voltage 311 connected to the non-inverting input terminal of the amplifier circuit 312 in the comparison circuit 310 of the third embodiment is the comparison circuit 1010 of the present embodiment.
In, it is connected to the inverting input terminal side. In addition, a level shift circuit 1013 that guides a change in the output potential to the amplifier circuit 312 that operates with a positive power supply voltage is provided so that the amplifier circuit 312 that operates with a positive power supply voltage and the reference voltage 311 can be used as they are. There is. Finally, the current source 120
The drive circuit 630 and the comparison circuit 1010 form a control circuit 1002 that guides the output voltage to a target voltage.

(Operation of Tenth Embodiment) First to Fifth Embodiments
The current path of the polarity reversal type main circuit of the tenth embodiment of the present invention, which corresponds to the first, second and third loops of the boosting type main circuit of the embodiment, is the following loop.

The first loop includes the ground side of the input power supply 1 to the positive voltage side of the input power supply 1 to the emitter of the main transistor 1080 to the collector of the main transistor 1080 to the first winding 17.
No. 1 second terminal-first winding 171 first terminal-input power supply 1
It is the ground side of the current path of the current accumulation phase.

The second loop includes the ground side of the load 3, the output end side of the load 3, the anode of the diode 1090, the cathode of the diode 1090, the second terminal of the first winding 171, and the first terminal of the first winding 171. 1 terminal (ground side) to the ground side of the load 3, which is the current path of the current emission phase.

Further, the third loop includes the second terminal (ground side) of the second winding 172, the first terminal of the second winding 172, the first terminal of the feedback capacitor 1081, and the feedback capacitor 108.
1 second terminal-base of main transistor 1080-emitter of main transistor 1080-positive voltage side of input power supply 1-ground side of input power supply 1-second terminal of second winding (ground side)
The second winding 17 that shares the magnetic circuit with the first winding 171
It is a route of positive feedback from 2.

That is, the variable current generating means of the first loop generates the current in the direction to flow into the first winding 171 and the input power source 1 and the PNP type main transistor 1
No. 080, and the rectifying means of the second loop is
The direction of the diode 1090 is determined so that the current in the direction in which the current continues to flow into the winding 171 of the diode 1090. And
The positive feedback means of the third loop is configured to cause blocking oscillation by positive feedback from the second winding 172 that shares a magnetic circuit with the first winding 171.

Polarity inversion type DCD of the tenth embodiment of the present invention
In the C converter, a current flows in the first loop at the beginning of the current accumulation phase, but when the current in the first winding 171 is small, the main transistor 1080 is saturated, so that the input to the first winding 171 is input. The voltage of the power supply 1 is applied. First
The current in the winding 171 increases and the main transistor 1080
When the potential collector current value of
Is applied to the base of the main transistor 1080 via the feedback capacitor 1081.
80 shuts off. Then, the force that keeps the current of the first winding 171 continuously flowing causes the terminal voltage of the diode 1090 to become a forward voltage and keeps the current from the load 3 flowing. When this current diminishes and reaches a value that crosses zero, the diode 1090 blocks its flow so that the second winding 17
The voltage of 2 reverses and saturates the main transistor 1080 again via the feedback capacitor 1081.

As described above, the operation of the tenth embodiment of the present invention is similar to the operation of the first embodiment described above: "current accumulation phase start""current accumulation phase""current accumulation phase end-current emission phase". "Start""Current emission phase"
Power is supplied to the output terminal by repeating the cycle of "end of current emission phase to start of current accumulation phase". Then, the magnitude of the power supplied to the output terminal is determined by the amount of current storage in the current storage phase, which is controlled by the current supplied from the control circuit 1002 to the base of the main transistor 1080.

This is shown in the timing chart of FIG. 15, in which the current in the first winding 171 of the main circuit 1001
Main transistor 1080 collector current, diode 1
The directions of the respective currents of 090 are set as shown in FIG. This current waveform is the same as the current waveform of the step-up DCDC converter of the first embodiment shown in the timing chart of FIG.

As described above, the operations and effects of the tenth embodiment of the present invention are the same as those of the first and second embodiments because the polarity reversal type main circuit and the boosting type main circuit have the same basic configuration and operation principle. The operation and effect of the second embodiment are almost the same. Therefore, since the upper limit value of the base current supplied from the collector of the transistor 439 of the drive circuit 630 does not depend on the fluctuation of the input voltage, the current value can be easily set. Further, the difference between the worst condition and the best condition becomes small, so that the design margin of the upper limit value of the base current can be small. Therefore, the waste current associated with the output voltage control is reduced, useless power consumption is suppressed, and the protection of the main transistor during start-up and overload can be optimized. Eliminates the need to use transistors with As a result, the first problem that the power conversion efficiency of the DCDC converter is lowered and the third problem that the cost is increased can be solved.

Incidentally, the comparison circuit 1 of the tenth embodiment of the present invention.
Although 010 is configured by providing the level shift circuit 1013 in order to use the amplification circuit 312 and the reference voltage 311 which are operated by the positive power supply voltage as they are, another method may be used. For example, provide an operational amplifier that operates with a positive power supply voltage with a feedback path between the output terminal and the inverting input terminal, and provide a resistor between the inverting input terminal, which is the virtual ground, and the output terminal of the main circuit. Can also be achieved by replacing the voltage value at the output terminal with a current value and comparing the current directly with the reference current, or by converting the current again into a voltage and using the amplifier circuit 312 and the reference voltage 311. .

[Eleventh Embodiment] The eleventh embodiment of the present invention corresponds to claims 2, 5, 6, 7, 18, and 21, and is provided with a polarity reversal type main circuit to cause problems 1, 3, and 4. , 6 and 7 are solved and the objectives 1, 3, 5, 6, and 7 are achieved.

(Structure of Eleventh Embodiment) FIG. 16 shows the structure of a polarity reversal type DCDC converter of the eleventh embodiment of the present invention. This corresponds to the diode 190, the state detection circuit 360, and the modulation circuit 34 of the third embodiment shown in FIG.
The means for solving the problem of the step-up DCDC converter using 0 is applied to the polarity reversal type DCDC converter.

In FIG. 11, 1 is an input power source, 2 is an output capacitor, 3 is an output load, 170 is a transformer having a first winding 171 and a second winding 172 sharing a magnetic circuit, and 1080 is a main A transistor, 1081 is a feedback capacitor, 1090 is a diode, and these constitute the main circuit 1001. The current source 120 is the same as that in the third embodiment. Further driving circuit 630
Is the same as that of the sixth embodiment, but a modulation circuit 1140 is inserted between the output of the current mirror composed of the transistors 231 and 435 and the input of the current mirror composed of the transistors 436 and 437.

The comparison circuit 1110 has the same function as the comparison circuit 1010 of the tenth embodiment, but the level shift circuit 1013X is composed of a current source 1013A, a current mirror composed of transistors 1013B and 1013C, and a resistor 1013D. ing. A current that does not depend on the voltage of the input power supply 1 is caused to flow through the resistor 1013D, a constant voltage drop is generated, and the voltage is applied to the non-inverting input terminal of the amplifier circuit 312 by superimposing it on the negative voltage at the output end. It is converted into the operation area of the amplifier circuit 312.

The state detection circuit 360 detects the current accumulation phase or the current emission phase of the main circuit 1001 and outputs the result to the modulation circuit 1140. Modulation circuit 114
0 indicates the same current as the input when the state detection circuit 360 determines that it is in the current accumulation phase, and the current of a value that optimizes the charging of the feedback capacitor 1081 when it determines that it is in the current discharge phase. It is configured to output each separately. Then, the current source 120 and the drive circuit 63
0, the comparison circuit 1110, the state detection circuit 360, and the modulation circuit 1140 constitute a control circuit 1102 that guides the output voltage to a target voltage.

(Operation of Eleventh Embodiment) The operation of the eleventh embodiment of the present invention is that the output current of the drive circuit 630 distinguishes and outputs different values in the current accumulation phase or the current discharge phase. The operation is different from that of the tenth embodiment. However, the basic operation of supplying electric power to the output terminal is exactly the same while alternately repeating the current accumulation phase and the current emission phase. The operation waveforms of the eleventh embodiment of the present invention are the same as the timing chart of the tenth embodiment shown in FIG. 15 in which the main circuit 1001 is the same.

The operation and effect of the newly added modulation circuit 1140 and state detection circuit 360 in the configuration of the eleventh embodiment of the present invention are the same as the basic configuration and operation of the polarity reversal type main circuit and the boost type main circuit described above. Since the principle is the same, the operation and effect of the third embodiment are the same.

Therefore, even if the period of the current discharge phase is shortened due to the change of the input voltage or the load, the current from the drive circuit 630 is increased to make the charge amount of the feedback capacitor 1081 to an appropriate value. A large change in the period can be suppressed. On the contrary, even if the period of the current emission phase becomes longer due to the change of input voltage or load,
Since the current from the drive circuit 630 is reduced and the charge amount is set to an appropriate value, a large change in the period of the current discharging phase can be suppressed.

In the level shift circuit 1013X, the required level shift voltage value can be freely set by the value of the resistor 1013D. Further, since the collector potential of the transistor 1013C during stable operation is a positive voltage, it can be formed on the same monolithic substrate as the current source 120, the drive circuit 630 comparison circuit 1110, the state detection circuit 360, the modulation circuit 1140, etc. It is advantageous to

[Twelfth Embodiment] The twelfth embodiment of the present invention corresponds to the third, fifth, sixth, nineteenth and twenty-first embodiments, and is provided with a polarity reverse type main circuit, which causes problems 1, 3, 5, and 6. , 7 are solved and the objectives 1, 4, 5, and 7 are achieved.

(Structure of Twelfth Embodiment) FIG. 17 shows the structure of a polarity reversal type DCDC converter of the twelfth embodiment of the present invention. This is an application of the means for solving the problem of the step-up DCDC converter using the subtransistor 490 of the fourth embodiment shown in FIG. 5 to the polarity reversal DCDC converter.

In FIG. 17, 1 is an input power source, 2 is an output capacitor, 3 is an output load, 170 is a transformer having a first winding 171 and a second winding 172 sharing a magnetic circuit, and 1080 is a main A transistor, 1081 is a feedback capacitor, 1290 is a slave transistor, and 1290 is a slave feedback capacitor, and these constitute the main circuit 1201. The current source 120 is the same as that in the third embodiment, and the comparison circuit 1010 is the same as that in the tenth embodiment. Further, the drive circuit 430 is the same as that of the fourth embodiment. Then, the current source 120 and the drive circuit 43
0 and the comparison circuit 1010 form a control circuit 1202 that guides the output voltage to a target voltage.

(Operation of twelfth embodiment) The first loop and the third loop of the polarity reversal type main circuit of the 12th embodiment of the present invention are the same as those of the 10th embodiment. The second loop is: the ground side of the load 3, the output end side of the load 3, the collector of the slave transistor 1290, the emitter of the slave transistor 890, the second terminal of the first winding 171, the first terminal of the first winding 171. (Grounding side) to the grounding side of the load 3, which is a current path in the current discharging phase.

That is, the variable current generating means of the first loop generates the current in the direction of flowing into the first winding 171 and the input power source 1 and the PNP type main transistor 1
080, and the rectifying means of the second loop is composed of an NPN sub-transistor 1290 in order to allow a current in the direction in which the first winding 171 continues to flow. The positive feedback means of the third loop is the first winding 1
Blocking oscillation is caused by positive feedback from the second winding 172 sharing a magnetic circuit with 71.

In the polarity reversal type DCDC converter of the present embodiment, a current flows through the first loop at the beginning of the current accumulation phase, but when the current of the first winding 171 is small, the main transistor 1080 is saturated. Therefore, the first winding 171
Is applied with the voltage of the input power supply 1. When the current of the first winding 171 increases to reach the potential collector current value of the main transistor 1080, the voltage of the second winding 172 is fed through the feedback capacitor 1081 to the main transistor 1080.
Is applied to the base of the main transistor and the main transistor 1080 is cut off. Then, the force that keeps the current flowing in the first winding 171 to pull down the emitter potential of the slave transistor 1290, and the voltage of the second winding 172 causes the slave feedback capacitor 1290 to pass.
As a result of pushing up the base potential of the sub-transistor 1290 via 291, the base-emitter voltage becomes a forward voltage to saturate the sub-transistor 1290, and a current from the load 3 via a slight collector-emitter voltage. Keep flowing. When this current becomes smaller and reaches a value that crosses zero, the collector-emitter voltage of the slave transistor 1290 increases, so that the voltage of the second winding 172 reverses, and the main transistor 1 passes through the feedback capacitor 1281.
It also saturates 280 again and shuts off the slave transistor 1290.

As described above, the operation of the twelfth embodiment of the present invention is similar to the operation of the fourth embodiment described above: "current accumulation phase start""current accumulation phase""current accumulation phase end-current discharge phase". "Start""Current emission phase"
Power is supplied to the output terminal by repeating the cycle of "end of current emission phase to start of current accumulation phase". The magnitude of the power supplied to the output terminal is determined by the amount of current storage in the current storage phase, which is controlled by the current supplied from the control circuit 1202 to the base of the main transistor 1080.

This is shown in the timing chart of FIG. 18, in which the current in the first winding 171 of the main circuit 1201
The directions of the collector current of the main transistor 1080 and the emitter current of the slave transistor 1290 are set as shown in FIG. This current waveform is the same as the current waveform of the step-up DCDC converter of the fourth embodiment shown in the timing chart of FIG.

As described above, the operation and effect of the twelfth embodiment of the present invention are the same as those of the fourth embodiment because the polarity reversal type main circuit and the boosting type main circuit have the same basic configuration and operation principle. And the effect is almost the same. Therefore, by using the sub-transistor 1290 to guide the current in the current emission phase to the output end, the voltage drop generated there can be suppressed to an extremely small level. As a result, the fifth problem of reducing the power conversion efficiency of the DCDC converter device can be solved.

[Thirteenth Embodiment] The thirteenth embodiment of the present invention corresponds to the fourth, fifth, sixth, seventh, twenty-first and eighth aspects, and is provided with a polarity reversal type main circuit to cause problems 1, 3, and 4. 5, 6, and 7 are solved and the objectives 1, 3, 4, 5, and 7 are achieved.

(Structure of Thirteenth Embodiment) FIG. 19 shows the structure of a polarity reversal type DCDC converter of the thirteenth embodiment of the present invention. This is because the slave transistor 490 and the state detection circuit 36 of the configuration of FIG.
0, the means for solving the problem of the step-up DCDC converter using the modulation circuit 540 is applied to the polarity reversal type DCDC converter.

In FIG. 19, 1 is an input power source, 2 is an output capacitor, 3 is an output load, 170 is a transformer having a first winding 171 and a second winding 172 sharing a magnetic circuit, and 1080 is a main A transistor, 1081 is a feedback capacitor, 1290 is a slave transistor, and 1291 is a slave feedback capacitor, and these constitute the main circuit 1201. The current source 120 is the same as that of FIG. 3 of the third embodiment, and the comparison circuit 1010 is the same as that of the tenth embodiment. Further, the drive circuit 430 is the same as that of the fourth embodiment, except that the transistors 231 and 23 are
2 current mirror output and transistors 133, 1
A modulation circuit 1340 is inserted between the inputs of the current mirrors of 34, and between the outputs of the current mirrors of the transistors 231 and 435 and the inputs of the current mirrors of the transistors 436 and 437.

The state detection circuit 360 detects the current accumulation phase or the current emission phase of the main circuit 1201 and outputs the result to the modulation circuit 1340. When the state detection circuit 360 determines that it is in the current accumulation phase, the modulation circuit 1340 has a value that optimizes charging of the input current to the base node of the main transistor 1080 and the sub feedback capacitor 1291. Currents are made to flow to the base nodes of the slave transistors 1290, respectively. On the other hand, when the current discharge phase is determined, the feedback capacitor 10
A current of a value that optimizes the charging of 81 is applied to the main transistor 10
It is configured to separately output the input magnitude current to the base node of 80 and the base node of the slave transistor 1290. The current source 120, the drive circuit 430, the comparison circuit 1010, the state detection circuit 360, and the modulation circuit 1340 constitute a control circuit 1302 that guides the output voltage to a target voltage.

(Operation of Thirteenth Embodiment) The operation of the thirteenth embodiment of the present invention is that the output current of the drive circuit 430 distinguishes and outputs different values in the current accumulation phase or the current discharge phase. The operation is different from that of the 12th embodiment. However, the basic operation of supplying electric power to the output terminal is exactly the same while alternately repeating the current accumulation phase and the current emission phase. The operation waveforms of this embodiment are the same as the timing chart of the above-mentioned twelfth embodiment shown in FIG. 18 in which the main circuit 1201 is the same.

The operation and effect of the newly added modulation circuit 1340 and state detection circuit 360 in the configuration of the thirteenth embodiment of the present invention are the same as the basic configuration and operation of the polarity reversal type main circuit and the boost type main circuit described above. Since the principle is the same, the operation and effect of the fifth embodiment are the same.

Therefore, even if the period of the current discharging phase is shortened by the change of the input voltage or the load, the driving circuit 430
The amount of charge from the feedback capacitor 1081 is set to an appropriate value by increasing the current flowing from the device, so that a large change in the period of the current discharging phase can be suppressed. On the contrary, even if the period of the current discharge phase becomes long due to the change of the input voltage or the load, the current from the drive circuit 430 is reduced and the charge amount is set to an appropriate value. Can be suppressed.

On the other hand, even if the period of the current accumulation phase becomes long due to changes in the input voltage and the load, the current from the drive circuit 430 is made small and the charge amount of the sub feedback capacitor 1291 is set to an appropriate value. Blocking 1290 can be maintained. On the contrary, even if the period of the current accumulation phase becomes long due to the change of input voltage or load,
In order to increase the current from the drive circuit 430 and set the charge amount to an appropriate value, the secondary transistor 1290 by the feedback charge is used.
The voltage drop in the initial stage of conduction can be kept low.

(Comparison of Step-Up Main Circuit, Step-Down Main Circuit, and Polarity Reversing Main Circuit) From the configurations of the first to thirteenth embodiments, the relationship between the variable current generating means and the inductor, the inductor (first winding 171) and the rectification The relationship with means is summarized as follows.

In order to store the current in the first winding 171, it is sufficient that the variable current generating means composed of the input power supply 1 and the main transistor is connected to one end of the first winding 171. The destination of the current at the other end of 171 is the first
Even with the input power supply 1 having the configuration of the embodiment,
The load 3 as in the configuration of the tenth embodiment may be grounded as in the configuration of the tenth embodiment.

Further, in order to discharge the current from the first winding 171, one end of the diode facing the discharging direction is
It suffices if it is connected to one end of the first winding 171, and the other end of the diode is grounded as in the configuration of the sixth embodiment even if it is the load 3 as in the configuration of the first embodiment. Alternatively, the load may be the same as the configuration of the tenth embodiment. Similarly, in order to discharge the current from the first winding 171, the emitter of the slave transistor facing the discharging direction may be connected to one end of the first winding 171, and the collector of the slave transistor is The load 3 as in the configuration of the fourth embodiment, the ground as in the configuration of the eighth embodiment, or the load as in the configuration of the twelfth embodiment may be used.

In addition, the third that maintains the blocking oscillation
The loop of is only required to be configured so that the feedback from the feedback capacitor is positive regardless of the polarity of the main transistor, and since the feedback from the feedback capacitor is only the voltage change, It suffices that the emitter of is connected to the ground side of the second winding 172 in alternating current.

Thus, the step-up type main circuits of the first to fifth embodiments, and the step-down type main circuits of the sixth to ninth embodiments,
Furthermore, the polarity reversal type main circuits of the tenth to thirteenth embodiments are
It can be seen that the mechanism that causes blocking oscillation, the mechanism that accumulates current, and the mechanism that discharges current are all the same. The only difference between the step-up type main circuit, the step-down type main circuit, and the polarity reversal type main circuit is the difference between the input power source and the output voltage, the polarity of the output voltage, the direction of the accumulated current, the direction of the emission current, etc. Is.

The above fourth, fifth, eighth, ninth and first
2, in the 13th embodiment, the second terminal of the first winding 171 is
Since it is also used as a terminal for current accumulation and current emission, the relationship of the directions of these currents is uniquely determined, and the polarities of the main transistor and the slave transistor are opposite. That is, if the primary transistor is NPN, the secondary transistor is PN
Become P. Further, even when the third winding that shares the magnetic circuit with the first winding 171 is provided for the current emission of the second embodiment, one end thereof is connected with the diode facing the emission direction, and the other end is connected. Is connected to ground or a power source or load. However, the direction of the current at one end of the third winding may be either the direction in which the current flows out or the direction in which the current flows depending on the winding method. Therefore, the above fourth, fifth, eighth, ninth, twelfth, thirteenth In the embodiment, the polarities of the main transistor and the sub-transistor are opposite, but in this case, the sub-transistor has the polarities such that the emitter of the sub-transistor facing the direction of current discharge from the third winding is connected. The polarity does not depend on the polarity of the main transistor.

[Capturing of Each Embodiment] The output current of the current source 120 in the configurations of the second to thirteenth embodiments is
By making the temperature dependence of the upper limit value of the base current of the main transistor the same as that of the main transistor, the temperature dependence of the waste current due to output voltage control is eliminated, reducing unnecessary power consumption, starting up, and overloading. The effects such as optimization of protection of the main transistor at the time can be further enhanced. As a result, the first and second problems of reducing the power conversion efficiency of the DCDC converter and the third problem of increasing the cost can be solved. The current source 120 having such temperature dependence is provided with only one diode connection between the power source and the ground and one collector-emitter voltage.
By using the "amplification device" of Japanese Patent No. 4548, stable operation up to a power supply voltage of 0.9 V and temperature dependency can be achieved.

Since the control circuits of the configurations of the first to thirteenth embodiments are all driven by the input power source 1 on the primary side, the current source, the drive circuit, the comparison circuit, the state detection circuit and the modulation circuit are The control circuit thus constructed operates immediately after the DCDC converter device is powered on. Therefore, even if the load current is large and it takes time for the output voltage to rise, it can be started reliably.

Further, the control circuits of the first to thirteenth embodiments described above are not limited to the step-up type, step-down type, and polarity reversal type main circuit types. Since most of the basic parts such as, the comparison circuit, the state detection circuit, and the modulation circuit are common, by configuring these control circuit elements with ICs or modules, different types of DCDC converter devices can use the same IC or module. Can be used, productivity can be improved, and cost can be reduced. However, the comparison circuit of the polarity reversal type main circuit is
Compared with other types of comparison circuits, the phase is opposite and a level shift circuit is required separately. This is because when the IC or module is used, the control phase can be switched to positive or negative and the level switching circuit. It can be solved by adding a shift means.

In the constructions of the first to thirteenth embodiments, one end of the second winding 172 of the transformer 170 is grounded. This is connected to a voltage source whose other end is grounded. May be. This is because only the voltage change is fed back from the feedback capacitor, so that it may be AC equal to the emitter potential of the main transistor, and may be, for example, an input power supply. In this case, the winding of the transformer may be an autotransformer in which a tap is provided on one continuous winding, which results in a cheaper configuration.

When the state detection circuit 360 uses the voltage generated in the second winding 172 to distinguish the phases of the main circuit, one end of the second winding 172 of the first to thirteenth embodiments is used. If is grounded, a voltage lower than the ground potential will be applied to the state detection circuit. If the state detection circuit 360 is to be formed on the same monolithic substrate together with other current sources, drive circuits, comparison circuits, modulation circuits, etc., separation on the IC substrate described in the second embodiment is difficult. Becomes a problem. However, one end of the second winding 172 of the transformer 170 is higher than ground,
For example, by connecting to an input power source or the like, a negative voltage is not applied to the state detection circuit, which is advantageous in making an IC.

Further, no resistors are inserted in series in the feedback capacitors and the sub feedback capacitors in the first to thirteenth embodiments, but in order to prevent an excessive base current of the main transistor and the sub transistor, this is May be inserted. At that time, if the time constants of the resistor and the capacitor connected in series are sufficiently shorter than the cycle of the current accumulation phase or the current discharge phase for charging each, the operation of the DCDC converter is not affected.

Further, in the configurations of the respective embodiments excluding the second embodiment described above, the energy accumulated in the transformer 170 of the main circuit is taken out from the first winding through which the current is supplied at the time of accumulation, but it is accumulated in the transformer. The magnetic flux in the generated magnetic circuit is
Since a current corresponding to the magnitude can be applied to any of the windings sharing the magnetic circuit, it may be taken out by another winding. In this case, the insulation type DCDC converter can be configured by further making the comparison circuit for detecting the output voltage an insulation type.

Further, in the drive circuits in the above third to thirteenth embodiments, by increasing the ratio of the input current to the output current, the magnitude of the discard current accompanying the control can be suppressed to a low level and the loss power can be reduced. Can be achieved.

The modulation circuits in the fifth, seventh, ninth, eleventh and thirteenth embodiments are inserted between the current mirror in the drive circuit and the current mirror. The output current of the source may be controlled, or the output current of the comparison circuit may be controlled. As a result, the output current of the drive circuit may be anywhere as long as it can be distinguished between the current accumulation phase and the current emission phase.

Also, the fourth, fifth, eighth, ninth, first
In the configurations of the 2nd and 13th embodiments, when the current accumulation phase is shifted to the current discharge phase, the slave transistor starts the reverse transistor operation. An increase in collector-emitter voltage due to a sudden change in characteristics such as the current amplification factor at that time accelerates the transition to the next current emission phase.
Depending on the transistor, the collector-emitter voltage during the operation of the reverse transistor does not increase so much. In such a case, the current in the first winding 171 increases as it is, and power is taken from the output end. However, since the rate of change of the current does not change, the polarity of the terminal voltage of the second winding 172 changes. do not do. Therefore, if a state detection circuit that determines the phase of the main circuit by the voltage of the second winding 172 is used, the polarity of the terminal voltage of the second winding 172 is terminated even if the current discharge phase is completed. Does not change, so it takes a while for power to be taken from the output end.

When using such a transistor in which it is difficult to distinguish between the forward transistor operation and the slave transistor operation, is there a state detection circuit for judging the current discharge phase in consideration of the direction of the collector current of the slave transistor? Or, it is necessary to provide means for increasing the collector-emitter voltage when the direction of the collector current is reversed. For example, in the former, the state detection circuit determines that the polarity of the collector-emitter voltage has reversed when the current in the opposite direction begins to flow, and the state detection circuit determines that the current emission phase has started.
The base current or the base-emitter voltage of the main transistor is increased through the driving means, and the collector current thereof is increased. As a result, the voltage of the second winding 172 is reversed, and the current accumulation phase is entered. In the latter case, the base current of the slave transistor is increased by utilizing the increase in collector-base voltage caused by the reverse current starting to flow in the collector of the slave transistor and the inversion of the polarity of the collector-emitter voltage. Reduce or cut off and increase collector-emitter voltage. As a result, the voltage of the second winding 172 is reversed, and the current accumulation phase is entered. Any of these controls can be configured by a state detection circuit and a drive circuit.

Also, the fourth, fifth, eighth, ninth, first
The slave transistors of the second and thirteenth embodiments are bipolar transistors, but they may be FETs. F
The ET drain current has a structure that allows it to flow in either direction. Therefore, after the current accumulated in the above inductor is guided to the output end, the reverse current will start to flow. In this case, a means for guiding the main circuit to the current accumulation phase is especially necessary. Further, since the amplitude of the gate voltage for turning on and off the FET is large and there is no direct current flowing through the gate, a secondary feedback capacitor is not required, and the gate can be directly connected to the second winding 172 of the transformer 170. However, it is necessary to set the DC potential of the second terminal of the second winding 172 so that the voltage applied to the gate has a value suitable for conduction and interruption of the FET.

Although the polarity of the input power source 1 of the first to thirteenth embodiments is positive, if it is negative, the polarities of the main transistor, the diode and the slave transistor are reversed. Also, the polarity of the output voltage is reversed.

The current source 120 of the first to thirteenth embodiments is configured to output current immediately when the input power source 1 is applied. This is the case where the input power source 1 is applied. After that, the output current may be gradually increased to reach the set value after a certain period of time. In that case, D
Flowing in the first winding 171 immediately after starting the CDC converter,
First winding 17 with collector of large main transistor
The magnetic saturation of 1 can be prevented.

Further, the drive circuits of the first to thirteenth embodiments are configured to supply the current to the base node of the slave transistor immediately when the input power supply 1 is applied. It is possible to avoid the problem that the main transistor and the sub-transistor immediately after the start-up are simultaneously conducted by configuring the power-supply 1 to be shut off only during the first current accumulation phase when the power supply 1 is applied.

Further, the drive circuits of the first to thirteenth embodiments are configured such that the current continues to be sent to the base node of the main transistor while the input power supply 1 is being applied. When oscillation stops due to a short circuit or the like, a large current flows through the main transistor and the first winding 171. However, this is because the state detection circuit has a function of determining the presence or absence of oscillation, and when it is determined that there is no oscillation for a certain period of time, the current from the driving means is cut off or reduced by using the modulation circuit. A large current can be prevented. Further, the function of cutting off the current from the driving means may be used for controlling the operation or stop of the DCDC converter. At that time, if the power supply current of the control circuit is also stopped together, the power switch can play a role.

Also, the above fourth, fifth, eighth, ninth and first
2, the current supplied to the base node of the slave transistor in the current discharging phase of the thirteenth embodiment is set to the same magnitude as the current supplied to the base node of the main transistor in the current storing phase. It is necessary to individually set the current amplification factor of the transistor and the like according to each characteristic. However, this current has almost no effect on the output voltage, etc., and at the beginning of the current emission phase where the collector current of the slave transistor is maximized, the discharge current with a high time density fed back from the slave feedback capacitor is also added. The accuracy of the base current value from the circuit is not so demanded. Therefore, it is not necessary that the currents are all from the current sources as in the fourth, fifth, eighth, ninth, twelfth and thirteenth embodiments. Therefore, in a DCDC converter with good conditions in which the change in the input power supply voltage is small, the means for supplying the current to the base node of the slave transistor may be a simple method, for example, supply by a resistor and a voltage source. In the fourth and fifth embodiments, a resistor is provided between the base node of the slave transistor and the ground, and in the eighth, ninth, twelfth and thirteenth embodiments, the base node of the slave transistor is connected to the ground node. A resistor may be provided between the input power supplies.

The charge amount of the feedback capacitor in the current discharging phase of the third, seventh and eleventh embodiments is controlled by the state detection circuit, the modulation circuit and the drive circuit so as to have an appropriate value. By intentionally reducing this charge amount, delaying the conduction timing of the main transistor, and controlling the delay time, the oscillation cycle can be controlled.

The display circuit having the configuration of the third embodiment of the present invention can also be provided in the fifth, seventh, ninth, eleventh and thirteenth embodiments. As a result, the display can be dynamically turned on without newly providing an oscillation circuit, and the power consumed by the display can be reduced.

(Effects of each embodiment) First to thirteenth described above
Step-up type, step-down type, and polarity inversion type DCDs having the configuration of the embodiment
The effects obtained by the C converter are summarized as follows.

(1) Since the capacity of the feedback capacitor is reduced, the upper limit value of the base current of the main transistor can be determined by the current from the drive circuit.

(2) Since the current from the drive circuit does not fluctuate even if the voltage of the input power supply 1 fluctuates, it is easy to set the upper limit value of the base current, the design margin is small, and unnecessary power consumption is suppressed. Also, since the main transistor can be protected at the time of start-up or overload by setting this current value, it is not necessary to provide another protection means or use a transistor with a sufficient rating.

(3) Since the upper limit value of the base current of the main transistor corresponding to the change in operating temperature is set so as to be output from the drive circuit, the ease of setting the upper limit value of the base current and the design margin The power consumption is reduced, wasteful power consumption is reduced, and the protection of the main transistor during start-up or overload is improved.

(4) Since the change of the discard current due to the output voltage control is small, the change of the mutual conductance of the output transistor of the comparison circuit is also small, and the change of the gain of the control system can be reduced. Therefore, stabilization design of control feedback becomes easy.

(5) Since the collector of the NPN transistor is not connected to the base current supply terminal of the main transistor, it is advantageous when it is constructed by a general monolithic IC which does not require special isolation.

(6) Since the output current from the transformer in the current discharge phase is taken out by the separate winding, it is advantageous when constructing an insulation type DCDC converter.

(7) By setting the input / output current multiplying factor of the drive circuit to be large, the absolute value of the current to be discarded can be made small, which is advantageous in that loss power can be reduced.

(8) Since the output current of the drive circuit is separately output from the base current of the main transistor and the charging current of the feedback capacitor, even if the input voltage or the load current fluctuates, the operation mode is drastically changed. It is difficult for changes and large changes in the oscillation frequency to occur.

(9) Since the display is dynamically lit in the period of the current emission phase, it is not necessary to newly provide an oscillation circuit, and the power consumption for display can be reduced.

(10) Since the saturated emitter / collector of the secondary transistor is used in the output current path of the current emission phase, the voltage drop becomes small, and the power loss can be suppressed to an extremely small level.

(11) The saturated emitter / collector of the secondary transistor is used in the output current path of the current emission phase, and the output current of the drive circuit is divided into the base current of the main transistor, the charging current of the feedback capacitor, and the secondary current. Since the base current of the transistor and the charging current of the secondary feedback capacitor are output separately, the power loss is extremely small, and even if there is a change in the input voltage or load current, there is a sudden change in the operating mode or a large oscillation frequency. Hard to change.

(12) Even if the main circuit type is different from the step-up type, step-down type, and polarity reversal type, the basic parts such as the current source, the drive circuit, the comparison circuit, the state detection circuit, and the modulation circuit that constitute the control circuit Since most of these are common, by configuring these control circuit elements with ICs and modules, the same I
C and modules can be used, productivity can be improved, and cost can be reduced.

According to the step-up DCDC converter device of the first embodiment, the effects (1), (2), (3) and (4) described above can be obtained.

According to the step-up DCDC converter device of the second embodiment, the above (1), (2) and (3) are provided.
Effects such as (4), (5), (6), and (7) can be obtained.

According to the step-up DCDC converter device of the third embodiment, the above (1), (2) and (3) are used.
Effects such as (4), (5), (7), (8), and (9) can be obtained.

According to the step-up DCDC converter device of the fourth embodiment, the above (1), (2) and (3) are used.
Effects such as (4), (5), (7), (10), and (12) can be obtained.

According to the step-up DCDC converter device of the fifth embodiment, the above (1), (2) and (3) are used.
Effects such as (4), (5), (7), (10), (11), and (12) can be obtained.

According to the step-down DCDC converter device of the sixth embodiment, the above (1), (2) and (3) are provided.
Effects such as (4), (7), and (12) can be obtained.

According to the step-down DCDC converter device of the seventh embodiment, the above (1), (2) and (3) are used.
Effects such as (4), (7), (8), and (12) can be obtained.

According to the step-down DCDC converter device of the eighth embodiment, the above (1), (2) and (3) are used.
Effects such as (4), (7), (10), and (12) can be obtained.

According to the step-up DCDC converter device of the ninth embodiment, the above (1), (2) and (3) are provided.
Effects such as (4), (5), (7), (10), (11), and (12) can be obtained.

Also, the polarity reversal type DC of the tenth embodiment described above.
According to the DC converter device, the above (1) and (2)
Effects such as (3), (4), (7), and (12) can be obtained.

The polarity reversal type DC of the eleventh embodiment described above is also used.
According to the DC converter device, the above (1) and (2)
Effects such as (3), (4), (7), (8), and (12) can be obtained.

Also, the polarity reversal type DC of the twelfth embodiment described above.
According to the DC converter device, the above (1) and (2)
Effects such as (3), (4), (7), and (10) can be obtained.

The polarity reversal type DC of the thirteenth embodiment is also used.
According to the DC converter device, the above (1) and (2)
Effects such as (3), (4), (5), (7), (10), and (11) are obtained.

[0256]

As is apparent from the above embodiment, the present invention constitutes the DCDC converter device by providing the main transistor, the transformer, the diode, the feedback capacitor, the current generating means, and the driving means. The collector current of the output transistor of the driving means is
It is determined by the voltage between the emitters and is not affected by the fluctuations in the collector-emitter voltage due to the fluctuations in the power supply voltage, and this flows to the base of the main transistor.Therefore, fluctuations in the input voltage of the main circuit configured with the transformer, diode, and feedback capacitor. Even if there is, it has the effect of suppressing the fluctuation of the upper limit value of the base current of the main transistor.

The present invention also provides a main transistor, a transformer, a diode, and
A DCDC converter device is configured by providing a feedback capacitor, a current generating means having temperature dependence, and a driving means, and a temperature dependence for compensating the temperature dependence of the upper limit value of the base current of the main transistor is provided. Since the current of the current generating means that it has becomes the collector current of the output transistor of the driving means and flows into the base of the main transistor, even if the operating environment temperature of the main circuit configured with the transformer, diode and feedback capacitor fluctuates, the output voltage This has the effect of suppressing fluctuations in the discard current due to control.

The present invention also provides a main transistor, a transformer, a diode, and
A DCDC converter device is configured by providing a feedback capacitor, a driving means, a state detecting means, and a modulating means, and the modulating means controlled by the state of the main circuit obtained by the state detecting means is a driving means. The output current of the main transistor of the main circuit that is configured with the transformer and the diode in order to distinguish the current that controls the output voltage of the device from the current that controls the output voltage of the device and the current that controls the charging of the feedback capacitor Even if the input voltage or the load current varies, the operation mode of the main circuit can be controlled.

As is apparent from the above embodiment, the present invention also comprises a DCDC converter device by providing a main transistor, a transformer, a slave transistor, a main feedback capacitor, a slave feedback capacitor, and a driving means. The feedback voltage from the secondary winding of the transformer is added to the bases of the main transistor and the slave transistor of the opposite polarity via the main feedback capacitor and the slave feedback capacitor respectively, and the slave transistor has a small voltage drop. The rectification operation has the effect of reducing power loss.

As apparent from the above embodiment, the present invention also includes a main transistor, a transformer, a slave transistor, a main feedback capacitor, a slave feedback capacitor, a driving means, a state detecting means, and a modulating means. DCDC
In the converter device, the modulating means controlled by the state of the main circuit obtained by the state detecting means controls the magnitude of the collector current of the output transistor of the driving means, the current controlling the device output voltage, and the main current. Differentiating from the current that regulates the charging of the feedback and secondary feedback capacitors,
Since it flows to the base of the main transistor and the base of the slave transistor, it has the effect of controlling the operation mode of the main circuit even if the input voltage or load current of the main circuit configured with the transformer fluctuates.

As is apparent from the above-mentioned embodiment, the present invention further includes the state detection means and the display means to provide DCDC.
The converter device is configured, and the state detection unit and the display unit turn on the display during the current emission phase of the main circuit, thereby having the effect of reducing the power consumed by the display.

Further, as is apparent from the above embodiment, the present invention is a DCDC converter device in which at least the driving means, the current generating means, and the comparing means are integrated into an IC or a module. It has the effect of improving and reducing the cost.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a timing diagram of the first embodiment of the present invention.

FIG. 3 is a circuit diagram of a second embodiment of the present invention.

FIG. 4 is a circuit diagram of a third embodiment of the present invention.

FIG. 5 is a circuit diagram of a fourth embodiment of the present invention.

FIG. 6 is a timing diagram of a fourth embodiment of the present invention.

FIG. 7 is a circuit diagram of a fifth embodiment of the present invention.

FIG. 8 is a circuit diagram of a sixth embodiment of the present invention.

FIG. 9 is a timing diagram of a sixth embodiment of the present invention.

FIG. 10 is a circuit diagram of a seventh embodiment of the present invention.

FIG. 11 is a circuit diagram of an eighth embodiment of the present invention.

FIG. 12 is a timing diagram of an eighth embodiment of the invention.

FIG. 13 is a circuit diagram of a ninth embodiment of the present invention.

FIG. 14 is a circuit diagram of a tenth embodiment of the present invention.

FIG. 15 is a timing diagram of a tenth embodiment of the present invention.

FIG. 16 is a circuit diagram of an eleventh embodiment of the present invention.

FIG. 17 is a circuit diagram of a twelfth embodiment of the present invention.

FIG. 18 is a timing diagram of a twelfth embodiment of the present invention.

FIG. 19 is a circuit diagram of a thirteenth embodiment of the present invention.

FIG. 20 is a circuit diagram of a conventional example.

[Explanation of symbols]

1 Input power source 2 Output capacitor 3 Load 170 Transformer 171 and 172 Transformer winding 180, 680, 1080 Main transistor 181, 681, 1081 Feedback capacitor 182 Feedback resistor 1421, 1422 Startup resistor 190, 690, 1090 Diode 101, 201, 401, 601, 801, 1001,
1201, 1401 step-up main circuit 120, 1013A current source 133, 134, 231, 232, 435, 436, 4
37, 438, 439 Transistors 130, 230, 430, 630 Driving circuit 111 Zener diode 112 Resistor 113 Capacitor 114 Transistor 311 Reference voltage 312 Amplifying circuit 1013, 1013X Level shift circuit 1013B, 1013C Transistor 1013D Resistor 110, 310, 1010, 1110 Comparing circuits 102, 202, 402, 502, 602, 702, 8
02, 902, 1002, 1102, 1202, 130
2, 1402 Control circuit 368 LED 366, 369 Resistance 367 Transistor 365 Display circuit 360 State detection circuit 340, 540, 740, 940, 1140, 1340
Modulation circuit

Claims (21)

[Claims] 1. A variable current generating means having a main transistor and a device power supply, a positive feedback means having an inductor, a winding sharing a magnetic circuit, and a feedback capacitor, a rectifying means having a diode, and an inverse of the main transistor. A DCDC converter device comprising: a drive unit having a transistor having a polarity and having a collector current controlling the variable current generation unit. 2. A variable current generating means having a main transistor and a device power source, a positive feedback means having an inductor, a winding sharing a magnetic circuit and a feedback capacitor, a rectifying means having a diode, a state detecting means and a modulating means. And a drive means having a transistor having a polarity opposite to that of the main transistor and having a collector current controlling the variable current generating means. 3. A variable current generating means having a main transistor and a device power supply, a positive feedback means having an inductor, a winding sharing a magnetic circuit and a feedback capacitor, a rectifying means having a slave transistor and a slave feedback capacitor, A DCDC converter device comprising: a drive unit having a transistor having a polarity opposite to that of the main transistor and having a collector current controlling the variable current generation unit. 4. A variable current generating means having a main transistor and a device power supply, a positive feedback means having an inductor, a winding sharing a magnetic circuit and a feedback capacitor, and a rectifying means having a slave transistor and a slave feedback capacitor. DCD provided with a detecting means, a modulating means, and a driving means having a transistor having a polarity opposite to that of the main transistor and having a collector current controlling the variable current generating means.
C converter device. 5. The collector current of the transistor of the driving means is generated by a current generating means for outputting a fixed current and a comparing means for comparing the device output voltage with a reference voltage. The DCDC converter device described in 1. 6. The current generating means outputs a current having the same temperature characteristic as that of the variable current generating means.
The described DCDC converter device. 7. The display device according to claim 2, further comprising a display device whose blinking is controlled according to the time when the state of the state detecting device changes.
The described DCDC converter device. 8. A collector of the main transistor and one end of a diode are connected to one end of an inductor, and a voltage of a winding sharing a magnetic circuit with the inductor is supplied to a base of the main transistor via a feedback capacitor, The DCDC converter device according to claim 1, wherein the emitter of the main transistor is grounded, the other end of the inductor is connected to the device power supply, and the other end of the diode serves as a device output. 9. A collector of the main transistor is connected to one end of an inductor, one end of a diode is connected to a third winding which shares a magnetic circuit with the inductor, and a second winding which shares a magnetic circuit with the inductor. Voltage is supplied to the base of the main transistor via a feedback capacitor,
2. The DCDC converter device according to claim 1, wherein the emitter of the main transistor is grounded, the other end of the inductor is connected to a device power supply, and the other end of the diode serves as a device output. 10. A collector of the main transistor and one end of a diode are connected to one end of an inductor, and a voltage of a winding which shares a magnetic circuit with the inductor is supplied to a base of the main transistor via a feedback capacitor, The DCDC converter device according to claim 2, wherein the emitter of the main transistor is grounded, the other end of the inductor is connected to the device power supply, and the other end of the diode serves as a device output. 11. A collector of a main transistor and an emitter of a slave transistor are connected to one end of an inductor, and a voltage of a winding sharing a magnetic circuit with the inductor is supplied to a base of the main transistor via a feedback capacitor. A voltage of a winding that shares a magnetic circuit with the inductor is supplied to the base of the slave transistor via the slave feedback capacitor, the emitter of the main transistor is grounded, and the other end of the inductor is connected to a device power supply, 4. The DCDC converter device according to claim 3, wherein the collector of the slave transistor serves as a device output. 12. The collector of the main transistor and the emitter of the slave transistor are connected to one end of an inductor, and the voltage of a winding sharing a magnetic circuit with the inductor is supplied to the base of the main transistor via a feedback capacitor. A voltage of a winding that shares a magnetic circuit with the inductor is supplied to the base of the slave transistor via the slave feedback capacitor, the emitter of the main transistor is grounded, and the other end of the inductor is connected to a device power supply, 5. The DCDC converter device according to claim 4, wherein the collector of the slave transistor serves as a device output. 13. A collector of a main transistor and one end of a diode are connected to one end of an inductor, and a voltage of a winding sharing a magnetic circuit with the inductor is supplied to a base of the main transistor via a feedback capacitor, The DCDC converter device according to claim 1, wherein the other end of the diode is grounded, the emitter of the main transistor is connected to a device power supply, and the other end of the inductor serves as a device output. 14. A collector of the main transistor and one end of a diode are connected to one end of an inductor, and a voltage of a winding sharing a magnetic circuit with the inductor is supplied to a base of the main transistor via a feedback capacitor, The DCDC converter device according to claim 2, wherein the other end of the diode is grounded, the emitter of the main transistor is connected to the device power supply, and the other end of the inductor serves as a device output. 15. The collector of the main transistor and the emitter of the slave transistor are connected to one end of an inductor, and the voltage of a winding sharing a magnetic circuit with the inductor is supplied to the base of the main transistor via a feedback capacitor. The voltage of the winding that shares the magnetic circuit with the inductor is supplied to the base of the slave transistor via the slave feedback capacitor, and the collector of the slave transistor is grounded.
4. The D according to claim 3, wherein the emitter of the main transistor is connected to a device power supply, and the other end of the inductor serves as a device output.
CDC converter device. 16. The collector of the main transistor and the emitter of the slave transistor are connected to one end of an inductor, and the voltage of a winding sharing a magnetic circuit with the inductor is supplied to the base of the main transistor via a feedback capacitor. The voltage of the winding that shares the magnetic circuit with the inductor is supplied to the base of the slave transistor via the slave feedback capacitor, and the collector of the slave transistor is grounded.
5. The D according to claim 4, wherein the emitter of the main transistor is connected to a device power supply, and the other end of the inductor serves as a device output.
CDC converter device. 17. A collector of a main transistor and one end of a diode are connected to one end of an inductor, and a voltage of a winding sharing a magnetic circuit with the inductor is supplied to a base of the main transistor via a feedback capacitor, The DCDC converter device according to claim 1, wherein the other end of the inductor is grounded, the emitter of the main transistor is connected to a device power supply, and the other end of the diode serves as a device output. 18. A collector of the main transistor and one end of a diode are connected to one end of an inductor, and a voltage of a winding sharing a magnetic circuit with the inductor is supplied to a base of the main transistor via a feedback capacitor, 3. The DCDC converter device according to claim 2, wherein the other end of the inductor is grounded, the emitter of the main transistor is connected to a device power supply, and the other end of the diode serves as a device output. 19. The collector of the main transistor and the emitter of the slave transistor are connected to one end of an inductor, and the voltage of a winding sharing a magnetic circuit with the inductor is supplied to the base of the main transistor via a feedback capacitor. A voltage of a winding sharing a magnetic circuit with the inductor is supplied to the base of the slave transistor via a slave feedback capacitor, the other end of the inductor is grounded, and the emitter of the main transistor is connected to a device power supply, 4. The D according to claim 3, wherein the collector of the slave transistor is the device output.
CDC converter device. 20. The collector of the main transistor and the emitter of the slave transistor are connected to one end of an inductor, and the voltage of a winding sharing a magnetic circuit with the inductor is supplied to the base of the main transistor via a feedback capacitor. A voltage of a winding sharing a magnetic circuit with the inductor is supplied to the base of the slave transistor via a slave feedback capacitor, the other end of the inductor is grounded, and the emitter of the main transistor is connected to a device power supply, 5. The D according to claim 4, wherein the collector of the slave transistor is the device output.
CDC converter device. 21. The DCDC converter device according to claim 5, wherein at least the driving means, the current generating means, and the comparing means are integrated or modularized, respectively.