JPH07321253A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliabilities of the mechanical and electrical connections of bumps, by reducing further the thermal stresses of the bumps. CONSTITUTION:On a circuit board 13 whereon a semiconductor chip 12 is mounted by solder bumps 15, an interposing structure 17 made of the material having a nearly equal linear expansion coefficient to the solder bumps 15 whose height is nearly equal to the solder bumps 15 is so provided as to surround the mounting part of the semiconductor chip 12. Concurrently with this, sealing is so performed with a sealing material 18 that the semiconductor chip 12 and the interposing structure 17 are covered therewith. Thereby, the semiconductor chip 12 is fixed on the circuit board 13 by the sealing material 18. In this case, the sealing material 18 does not be in the state wherein it is contacted directly with the solder bumps 15, and the chip 12 is fixed on the circuit board 13 via the interposing structure 17 having the nearly equal linear expansion coefficient to the solder bumps 15. As a result, the thermal stresses which are generated in the solder bumps 15 by repeated variations of temperature and by the difference between the linear expansion coefficients of the solder bump 15 and the sealing material 18 are reduced remarkably.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device.

[0002]

2. Description of the Related Art As is well known, with the sophistication and multi-functionalization of equipment in which semiconductor devices are mounted, semiconductor chips are becoming highly integrated and large-scaled. The number of dynamic connections is becoming very large. In recent years, in particular, flip-chip mounting, in which a semiconductor chip is directly mounted on a circuit board using solder bumps, is becoming popular.
Flip-chip mounting is suitable for miniaturization because the mounting area can be almost the same as the semiconductor chip size.

A conventional resin-sealed semiconductor device formed by flip-chip mounting will be described below with reference to FIG. FIG. 3 is a vertical cross-sectional view. In FIG. 3, in the resin-sealed semiconductor device 1, the semiconductor chip 2 has a circuit board 3
It is implemented and configured on top of.

Solder bumps 4 are provided on the electrode pads of the semiconductor chip 2 to be mounted, and the solder bumps 4 are pressed against the corresponding electrode pads 5 of the circuit board 3 to be connected. After the semiconductor chip 2 is connected, resin sealing is performed so as to cover the entire semiconductor chip 2 with a sealing material 6 such as epoxy resin.

In the resin-encapsulated semiconductor device 1 thus configured, the mechanical connection between the semiconductor chip 2 and the circuit board 3 is made more rigid than in the case where the resin encapsulation is not performed. There is.

That is, in flip-chip mounting, temperature fluctuations repeatedly occur in the semiconductor device due to the presence or absence of operation of the semiconductor chip or fluctuations in the environmental temperature, and the linear expansion coefficient between the semiconductor chip and the circuit board increases. Due to this, relative deformation occurs. If resin sealing is not performed, thermal stress is repeatedly generated in the solder bumps, which are the connecting portions between the semiconductor chip and the circuit board, and the possibility of thermal fatigue damage increases, resulting in a mechanical and electrical connection. Reliability is significantly reduced. In order to improve the reliability of the connection by sealing the semiconductor chip with a sealing material such as resin after mounting to reduce the reliability of the connection part, the connection between the semiconductor chip and the circuit board is mechanically rigid. There is.

Therefore, when the temperature of the semiconductor device 1 fluctuates along with the operation of the semiconductor chip 2 or when the temperature of the environment in which it is used fluctuates, these temperature fluctuations cause Semiconductor chip 2 and circuit board 3
Although relative deformation tends to occur between the two, since the two are rigidly connected, the amount of deformation therebetween is reduced, and the thermal stress applied to the solder bump 4 is reduced.

However, since the solder bumps 4 are in contact with the encapsulating material 6 and have a structure surrounded by the periphery, repeated temperature fluctuations and a difference in linear expansion coefficient between the material of the solder bumps 4 and the encapsulating material 6 are caused. Due to the above, the solder bumps 4 are not desirable in terms of reliability of thermal fatigue, such that tensile / compression thermal stress is generated and the solder bumps 4 eventually break.

The above-mentioned situation is not limited to the case of flip-chip mounting in which the semiconductor chip 2 is directly mounted on the circuit board 3, but an IC package formed by mounting the semiconductor chip on a printed board (not shown) is printed. The same applies to the case where the solder bumps provided on the board are connected to the electrode pads of the circuit board, directly mounted, and sealed with a sealing material such as a resin so as to cover it.

[0010]

As described above, even in the conventional resin-sealed product, the reliability of mechanical and electrical connection of the solder bumps for connecting the semiconductor chip and the circuit board is sufficiently high. Was not. The present invention has been made in view of such a situation, and the purpose thereof is to:
It is an object of the present invention to provide a semiconductor device in which the thermal stress of bumps caused by the difference between temperature fluctuations and the coefficient of linear expansion is further reduced, and the reliability of mechanical and electrical connections is improved.

[0011]

The semiconductor device of the present invention comprises:
In a semiconductor device in which a semiconductor chip is mounted on a circuit board using bumps and sealed with a sealing material, the circuit board is made of a material having a linear expansion coefficient substantially the same as that of the bumps so as to surround a mounting portion of the semiconductor chip. The interposing structure member is formed so as to have a height substantially the same as the height of the bump, and the encapsulating material is used to cover the semiconductor chip and the interposing structure member. In a semiconductor device in which an IC package incorporating a semiconductor chip is mounted on a circuit board using bumps and sealed with a sealing material, the circuit board has a mounting portion of the IC package. An interposing structure member formed of a material having a coefficient of linear expansion substantially the same as that of the bump is provided so as to surround the bump and the height of the bump is substantially the same as that of the bump. In addition, the IC package and the intervening structural member are sealed with a sealing material so as to cover the interposing structural member, and the interposing structural member is made of the same material as the bump. It is characterized by.

[0012]

In the semiconductor device constructed as described above, a semiconductor chip or an IC package incorporating the semiconductor chip is mounted on the circuit board by bumps so as to have a linear expansion coefficient substantially the same as that of the bumps so as to surround the mounting portion. An intervening structure having substantially the same height as the bump is provided by a material, and a sealing material is used to seal the semiconductor chip or the IC package and the intervening structure. As a result, a semiconductor chip or an I
The C package is fixed to the circuit board by the encapsulating material, and the connection between the semiconductor chip or the IC package and the bump by the bump becomes more rigid and mechanical, and the temperature fluctuation occurs due to the operation of the semiconductor chip. Also, the amount of relative deformation with the circuit board is reduced, and the thermal stress applied to the bumps is reduced. Further, since the encapsulating material is not in direct contact with the bumps, and the encapsulating material is fixed on the circuit board through an intervening structure having substantially the same linear expansion coefficient as the bumps,
The thermal stress generated in the bump due to the repeated temperature fluctuation and the difference in linear expansion coefficient between the bump and the sealing material is remarkably reduced.

[0013]

Embodiments of the present invention will be described below with reference to the drawings.

First, a resin-sealed semiconductor device formed by flip-chip mounting according to the first embodiment will be described with reference to FIG. FIG. 1 is a vertical cross-sectional view, and in FIG. 1, a resin-sealed semiconductor device 11 is configured by mounting a semiconductor chip 12 on a circuit board 13.

The semiconductor chip 12 has a side of 2 mm, for example.
Each of the plurality of electrode pads 14 provided on the mounting surface of the circuit board 13 has a diameter of about 50 μm and a height of 100 μm or less. The solder bumps 15 that are substantially aligned to have a predetermined size are erected so as to have a predetermined space distance from each other.

The circuit board 13 has solder bumps 1 of the semiconductor chip 12 on the surface of the mounting portion of the semiconductor chip 12.
5 is provided with an electrode pad 16, and an interposing structure member 17 is provided on a mounting portion of the semiconductor chip 12 so as to surround the mounting portion over the entire circumference. When the semiconductor chip 12 is mounted on the inner mounting portion surrounded by the intervening structure member 17, a minute gap a is formed between the intervening structure member 17 and the outer periphery of the semiconductor chip 12.

The intervening structural member 17 has a square bank shape in cross section, a height substantially equal to the height of the solder bump 15, and a width sufficiently larger than the diameter of the solder bump 15. Further, it is made of the same material as the solder bump 15 and has the same linear expansion coefficient.

Then, the semiconductor chip 12 mounted on the upper surface of the circuit board 13 is molded with a sealing material 18 such as an epoxy resin or an epoxy resin containing glass filler so as to cover the semiconductor chip 12 and the intervening structural member 17. Then, resin sealing is performed.

The semiconductor chip 1 is mounted on such a circuit board 13.
In mounting 2, the semiconductor chip 12 is first placed on the mounting portion of the circuit board 13. At that time, the solder bumps 15 are placed on the corresponding electrode pads 16. After that, the solder bumps 15 are heated and pressed against the electrode pads 16, so that the solder bumps 15 are welded to the electrode pads 16 and connection is performed.

Then, the electrode pad 14 and the electrode pad 16
After the and are connected via the solder bumps 15, the sealing material 18
Then, molding is performed so as to cover the entire semiconductor chip 12 and the interposition structure member 17, and the resin sealing is completed.

At this time, the intervening structure member 17 and the semiconductor chip 12 are provided in the space 19 between the mounting surface of the semiconductor chip 12 of the circuit board 13 surrounded by the interposing structure member 17 and the lower surface of the semiconductor chip 12. The sealing material 18 does not flow in because there is only a minute gap a between the sealing material 18 and the outer periphery of the sealing material 18. Even if there is an inflow of the sealing material 18, the inflow amount is suppressed. Therefore, the solder bump 15 does not have its periphery filled with the sealing material 18, and remains in a hollow state.

In the case of such a structure, the semiconductor chip 12 and the circuit board 13 are fixed to each other through the sealing material 18 and the interposition structural member 17 as compared with the case where the resin sealing is not performed, and the mechanical structure is improved. The connection is rigid. Therefore, when the temperature of the semiconductor device 11 fluctuates due to the operation of the semiconductor chip 12 or when the temperature of the environment in which it is used fluctuates, the temperature fluctuation causes the semiconductor chip 12 and the circuit board to change. Even if relative deformation occurs with 13,
The amount of relative deformation is reduced by the warp effect of both, and the thermal stress applied to the solder bumps 15 is also reduced.

Furthermore, the voids 19 on the lower surface side of the semiconductor chip 12 remain hollow, and the solder bumps 15 are sealed by the sealing material 18.
Since the sealing material 18 is not in contact with the solder bumps 15 and is fixed to the intervening structural member 17 made of the same material as the solder bumps 15, repeated temperature fluctuations and the solder bumps 1
The thermal stress generated directly on the solder bumps 15 due to the difference in the linear expansion coefficient between the material of No. 5 and the sealing material 18 is significantly reduced.

Further, the sealing material 18 is fixed to the intervening structural member 17 having a different linear expansion coefficient.
Since 7 has a width dimension sufficiently larger than that of the solder bumps 15, even if repeated temperature fluctuations are applied, the risk of breakage is reduced.

Next, the resin-sealed semiconductor device of the second embodiment will be described with reference to FIG. 2 is a vertical sectional view.
In the resin-encapsulated semiconductor device 21, the IC package 23 in which the semiconductor chip 22 is incorporated is attached to the circuit board 24.
It is implemented and configured on.

The IC package 23 has, for example, 2c on one side.
On the upper surface of a rectangular printed board 25 formed with a predetermined dimension of about m to 5 cm, for example, one side is 2 mm to 5 mm.
A rectangular semiconductor chip 22 formed with a predetermined dimension of about mm is mounted, and the corresponding electrode pads (not shown) are connected by bonding wires 26. Further, the IC package 23 is the printed circuit board 2
Molding is performed by a sealing material 27 such as an epoxy resin so as to cover the semiconductor chip 22 mounted on the substrate 5.

A large number of electrode pads 28 are provided on the lower surface, which is the rear surface of the mounting surface of the semiconductor chip 22 of the printed board 25, and these electrode pads 28 are provided with
Diameter is about 100μm-200μm and height is 500μ
Solder bumps 29, which are substantially aligned to a predetermined dimension of m or less,
They are erected so that a predetermined space distance is provided therebetween.

The circuit board 24 is provided with electrode pads 30 on the surface of the mounting portion of the IC package 23 corresponding to the solder bumps 29 of the IC package 23. An intervening structural member 31 is provided so as to surround the mounting site over the entire circumference. When the IC package 23 is mounted on the inner mounting portion surrounded by the intervening structure member 31, a minute gap b is formed between the interposing structure member 31 and the outer periphery of the IC package 23.

The interstitial structural member 31 has a square bank shape in cross section, a height substantially equal to the height of the solder bump 29, and a width sufficiently larger than the diameter of the solder bump 29. Further, it is made of the same material as the solder bumps 29 and has the same coefficient of linear expansion.

Then, the IC package 23 mounted on the upper surface of the circuit board 24 is molded with a sealing material 32 such as epoxy resin or epoxy resin containing glass filler so as to cover the IC package 23 and the interposition structural member 31. Then, the resin sealing is completed.

The semiconductor chip 2 is mounted on the circuit board 24.
In mounting the IC package 23 in which 2 is incorporated, first, the semiconductor chip 22 is mounted on the upper surface of the printed board 25, and then the IC chip 23 is molded by the sealing material 27 so as to cover the semiconductor chip 22. Form. Then, the IC package 2 thus formed
3 is placed on the mounting portion of the circuit board 24. At that time, the solder bumps 29 are placed on the corresponding electrode pads 30. After that, the solder bumps 29 are heated and the solder bumps 29 are connected to the electrode pads 30.
The solder bumps 29 are welded to the electrode pads 30 by being pressed against, and connection is made.

Then, the electrode pad 28 and the electrode pad 30
After being connected to each other via the solder bumps 29, the sealing material 32
Then, molding is performed so as to cover the entire IC package 23 and the interposition structure member 17, and the resin sealing is completed.

At this time, as in the first embodiment, in the space 33 between the mounting surface of the IC package 23 of the circuit board 24 surrounded by the interposition structural member 31 and the lower surface of the IC package 23. Since there is only a minute gap b between the intervening structure member 31 and the outer periphery of the IC package 23, the sealing material 32 does not flow in, and even if there is an inflow of the sealing material 32, the inflow amount is suppressed. It becomes a thing. For this reason, the solder bumps 29 remain hollow without being filled with the sealing material 32 around them.

Therefore, also in the present embodiment having such a configuration, as in the case of the first embodiment, the IC package 23 and the circuit board 2 are compared with those which are not resin-sealed.
4 are fixed to each other via the sealing material 32 and the interposition structural member 31, and the mechanical connection is rigid. Therefore, when the temperature of the semiconductor device 21 fluctuates due to the operation of the semiconductor chip 22 or when the temperature of the environment in use changes, an IC package incorporating the semiconductor chip 22. Even if relative deformation occurs between the circuit board 23 and the circuit board 13 due to temperature fluctuations, the amount of relative deformation is reduced by the warp effect of both, and the thermal stress applied to the solder bumps 29 is also reduced.

Further, the voids 33 on the lower surface side of the IC package 23 remain hollow, and the solder bumps 29 are sealed by the sealing material 3.
2 is not in contact with the solder bumps 29, and the sealing material 32 is fixed to the intervening structural member 31 made of the same material as the solder bumps 29. The thermal stress generated directly on the solder bumps 29 due to the difference in the linear expansion coefficient of the stopper 32 is significantly reduced.

Furthermore, although the sealing material 32 is fixed to the intervening structural member 31 having a different linear expansion coefficient, the interposing structural member 3
Since 1 has a width dimension sufficiently larger than that of the solder bumps 29, there is less risk of breaking even if repeated temperature fluctuations are applied.

In each of the above embodiments, the interposition structural member 1 is used.
7 and 31 are formed of the same material as the solder bumps 15 and 29, the present invention is not limited to this.
9 may be formed of a material having substantially the same linear expansion coefficient as that of No. 9, for example, a resin material in which epoxy resin is mixed with glass filler so as to obtain substantially the same linear expansion coefficient as that of solder. Further, instead of the solder bumps 15 and 29, for example, a bump formed of a brazing material other than solder or a conductive resin material is used, and at the same time, a material having substantially the same linear expansion coefficient as the bump is used. You may make it comprise an interposition structure member.

[0038]

As is apparent from the above description, the present invention is a semiconductor chip or an I incorporating a semiconductor chip.
On a circuit board on which the C package is mounted by bumps, an interposing structure that is made of a material having substantially the same linear expansion coefficient as the bumps and has substantially the same height as the bumps is provided so as to surround the mounting portion, and a semiconductor chip or an IC package is also provided. The thermal stress of the bumps is further reduced by the configuration in which the sealing material is used to cover the interposing structure and the intervening structure.
Effects such as improvement in reliability of mechanical and electrical connection can be obtained.

[Brief description of drawings]

FIG. 1 is a vertical cross-sectional view showing a first embodiment of the present invention.

FIG. 2 is a vertical cross-sectional view showing a second embodiment of the present invention.

FIG. 3 is a vertical sectional view showing a conventional example.

[Explanation of symbols]

 12 ... Semiconductor chip 13 ... Circuit board 15 ... Solder bump 17 ... Interposed structural member 18 ... Encapsulating material

Claims (3)

[Claims] 1. A semiconductor device in which a semiconductor chip is mounted on a circuit board using bumps and sealed with a sealing material, and the circuit board is substantially the same as the bumps so as to surround a mounting portion of the semiconductor chip. An intervening structural member formed of a material having a linear expansion coefficient of about 10 mm and having a height substantially the same as the height of the bump is provided, and the sealing is performed so as to cover the semiconductor chip and the interposing structural member. A semiconductor device, which is sealed with a material. 2. A semiconductor device in which an IC package incorporating a semiconductor chip is mounted on a circuit board by using bumps and sealed with a sealing material, wherein the circuit board surrounds a mounting portion of the IC package. Is provided with an intervening structural member formed of a material having substantially the same coefficient of linear expansion as the bump and having a height substantially the same as the height of the bump, and the IC package and the interposing structural member are provided. A semiconductor device, wherein the sealing material is sealed so as to cover the semiconductor device. 3. The semiconductor device according to claim 1, wherein the intervening structure member is made of the same material as the bump.