JPH07321247A - Bga type semiconductor device and board for mounting the same - Google Patents
Bga type semiconductor device and board for mounting the sameInfo
- Publication number
- JPH07321247A JPH07321247A JP6112501A JP11250194A JPH07321247A JP H07321247 A JPH07321247 A JP H07321247A JP 6112501 A JP6112501 A JP 6112501A JP 11250194 A JP11250194 A JP 11250194A JP H07321247 A JPH07321247 A JP H07321247A
- Authority
- JP
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- Prior art keywords
- pad
- semiconductor device
- type semiconductor
- base
- substrate
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10122—Auxiliary members for bump connectors, e.g. spacers being formed on the semiconductor or solid-state body to be connected
- H01L2224/10125—Reinforcing structures
- H01L2224/10126—Bump collar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、ＢＧＡ（Ｂａｌｌ Ｇ
ｒｉｄ Ａｒｒａｙ）型半導体装置およびそれを実装す
る基板に係り、特に、はんだ寿命を延ばすことＢＧＡ型
半導体装置（以下、単にＢＧＡと記す）およびそれを実
装する基板に関する。The present invention relates to a BGA (Ball G)
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a rid array) type semiconductor device and a substrate on which the same is mounted, and particularly to a BGA type semiconductor device (hereinafter simply referred to as BGA) for extending a solder life and a substrate on which the same is mounted.
【０００２】[0002]
【従来の技術】従来のＢＧＡは、半導体素子とはんだが
付着するパッドの集合体を備え、半導体素子の搭載およ
び封止機能および半導体素子とパッドとの導通機能を有
するベースと、半導体素子とベースの主要部分を封止、
固定するレジンと、基板との導通および固定のためのは
んだとを備えている。ベースに搭載された半導体素子
は、ベースの下面電極まで電気的に接続され、パッドを
介してはんだボールが付着し、このはんだボールによ
り、基板表面のパッドを介して基板電極に接続してい
る。このような従来のＢＧＡの公知例として、特開昭５
７−７９６５２号公報に記載の例がある。2. Description of the Related Art A conventional BGA is provided with a semiconductor element and an assembly of pads to which solder is attached, and has a base having a mounting and sealing function for the semiconductor element and a conductive function between the semiconductor element and the pad, and the semiconductor element and the base. Sealing the main part of
It is provided with a resin for fixing and solder for conducting and fixing with the substrate. The semiconductor element mounted on the base is electrically connected to the lower surface electrode of the base, solder balls are attached via the pads, and the solder balls are connected to the substrate electrodes via the pads on the surface of the substrate. As a known example of such a conventional BGA, Japanese Unexamined Patent Publication No. Sho 5 (1999) -58187
There is an example described in JP-A 7-79652.
【０００３】[0003]
【発明が解決しようとする課題】ＢＧＡなどの半導体装
置は、基板に実装した状態で温度サイクル試験を行う
と、半導体装置と基板との熱膨張差に伴うせん断モード
（基板のパッド形成面に平行なモード）に生じる繰り返
し熱ひずみによってはんだが疲労する。熱ひずみは、変
形中心から放射状に生じる。疲労が進むとはんだは最終
的に破断し、導通が取れなくなるという不良が生じる。
熱ひずみが増加すると、はんだが破断するまでのサイク
ル数（以下、はんだ寿命と記す）は低下するため、はん
だ寿命を延ばすために、熱ひずみはできる限り小さくす
る必要がある。When a semiconductor device such as a BGA is subjected to a temperature cycle test in a state where it is mounted on a substrate, a shear mode (parallel to the pad formation surface of the substrate is caused by a difference in thermal expansion between the semiconductor device and the substrate). The solder fatigues due to repeated thermal strains that occur in various modes. Thermal strain occurs radially from the center of deformation. When the fatigue progresses, the solder finally breaks, resulting in a defect that conduction is lost.
When the thermal strain increases, the number of cycles until the solder breaks (hereinafter referred to as the solder life) decreases. Therefore, in order to extend the solder life, the thermal strain needs to be as small as possible.
【０００４】特にＢＧＡでは、はんだ接続部にくびれ
（図１０における接触角θ部、θａ部）が存在するた
め、熱ひずみは力学的にそのくびれに集中する。またそ
の集中する割合は、接触角が小さくなるほど高くなる。
このことは、接触角が小さいほど、はんだは局所的に大
きな熱ひずみを受け、はんだ寿命が短くなることを示し
ている。したがって、はんだ寿命を延ばすためには接触
角をできる限り大きくすることが望ましい。Particularly in the BGA, since the solder joint has a constriction (contact angle θ portion and θa portion in FIG. 10), thermal strain is mechanically concentrated on the constriction. Further, the concentration ratio becomes higher as the contact angle becomes smaller.
This indicates that the smaller the contact angle, the larger the local thermal strain of the solder, and the shorter the solder life becomes. Therefore, it is desirable to maximize the contact angle in order to extend the solder life.
【０００５】接触角を大きくする１つの手段として、ベ
ースと基板との距離を大きくすることが挙げられる。と
ころが、ベースと基板との距離は、はんだが加熱融解さ
れたときのはんだの表面張力、およびＢＧＡの自重、す
なわち基板への一定の押しつけ力によって自然に決定し
てしまうため、それを制御することは困難である。した
がって、従来は、接触角を制御することが困難であっ
た。One way to increase the contact angle is to increase the distance between the base and the substrate. However, the distance between the base and the substrate is naturally determined by the surface tension of the solder when the solder is heated and melted, and the self-weight of the BGA, that is, a constant pressing force on the substrate, so control it. It is difficult. Therefore, conventionally, it was difficult to control the contact angle.
【０００６】本発明の目的は、熱ひずみの発生する方向
におけるはんだの接触角を、従来の実装状態における値
よりも大きくし、熱ひずみに対するはんだ寿命を延ばす
ことにある。また、本発明の他の目的は、半導体装置と
基板との変形中心を明確にして、パッドの形状および方
向を最適化し、従来に比べてはんだ寿命を延ばすことこ
とにある。An object of the present invention is to make the contact angle of solder in the direction in which thermal strain occurs larger than the value in the conventional mounting state, and to extend the solder life against thermal strain. Another object of the present invention is to clarify the deformation center between the semiconductor device and the substrate, optimize the shape and direction of the pad, and prolong the solder life as compared with the conventional case.
【０００７】[0007]
【課題を解決するための手段】上記の課題を解決するた
めに本発明では、以下の手段を講じる。In order to solve the above problems, the present invention takes the following measures.
【０００８】（１）ＢＧＡのパッド形状を、「変形中心
を通る線分方向の寸法が、それと直交する線分方向の寸
法よりも大きくなる」ようにする。またそれに併せ、基
板の各パッドの形状を、それとはんだ接続するＢＧＡの
パッド形状と相似形もしくはそれに準じたものとする。(1) The pad shape of the BGA is set so that "the dimension in the direction of the line segment passing through the deformation center is larger than the dimension in the direction of the line segment orthogonal to it". In addition to this, the shape of each pad of the board is similar to or similar to the shape of the pad of the BGA to be solder-connected to it.
【０００９】（２）変形中心を所定の位置に強制的に設
定する。(2) The deformation center is forcibly set to a predetermined position.
【００１０】すなわち、本発明は、半導体素子を搭載す
るベースの下面に複数のパッドが形成され、前記パッド
と基板とをはんだにより導通および固定するＢＧＡ型半
導体装置において、前記パッドは前記ベース下面内の平
面形状が長径と短径とを有し、前記長径方向が、前記は
んだにより互いに固定された前記ベースおよび前記基板
のせん断方向相対熱変形の生じない点もしくは部分の方
向を指向していることを特徴とする。あるいは、前記長
径方向が、前記基板との熱膨張差に伴うせん断方向の熱
ひずみの変形中心からの放射線上にあることを特徴とす
るものである。That is, according to the present invention, in a BGA type semiconductor device in which a plurality of pads are formed on a lower surface of a base on which a semiconductor element is mounted, and the pads and the substrate are electrically connected and fixed by solder, the pads are provided in the lower surface of the base. Has a major axis and a minor axis, and the major axis direction is directed to a point or portion where shearing direction relative thermal deformation of the base and the substrate fixed to each other by the solder does not occur. Is characterized by. Alternatively, the major axis direction is on the radiation from the deformation center of thermal strain in the shearing direction due to the difference in thermal expansion from the substrate.
【００１１】また、前記パッドの形成面内における前記
基板とのせん断方向相対熱変形が生じない点もしくは部
分と、前記パッドの配置中心点とを通る線分上の前記パ
ッド寸法が、前記パッド形成面内でそれと直交する方向
のパッド寸法よりも大なることを特徴とする。また、前
記線分方向のベースとはんだとの接触角が、前記パッド
形成面内で前記線分と直交する方向における接触角より
も大なることを特徴とするものである。Further, the pad dimension on a line segment passing through a point or a portion where relative thermal deformation in the shearing direction with the substrate does not occur in the pad formation surface and the arrangement center point of the pad is the pad formation. It is characterized in that it is larger than the pad size in the direction orthogonal to it in the plane. Further, the contact angle between the base and the solder in the line segment direction is larger than the contact angle in the direction orthogonal to the line segment in the pad formation surface.
【００１２】また、前記せん断方向相対熱変形が生じな
い点もしくは部分は、前記ベース下面のほぼ中心であ
り、あるいは、前記ベースと前記基板との対向面のほぼ
中心に、前記せん断方向相対熱変形の生じない拘束手段
を有することを特徴とするものである。The point or portion where the relative thermal deformation in the shearing direction does not occur is approximately the center of the lower surface of the base, or the relative thermal deformation in the shearing direction is approximately at the center of the facing surface between the base and the substrate. It is characterized in that it has a restraint means that does not occur.
【００１３】また、本発明の基板は、前記ＢＧＡ型半導
体装置のベース下面のパッドと相似形もしくはそれに準
じる形状および方向性を有するパッドを備えていること
を特徴とするものである。Further, the substrate of the present invention is characterized by comprising a pad having a shape similar to or similar to the pad on the lower surface of the base of the BGA type semiconductor device or a shape and directionality similar thereto.
【００１４】また、上記目的は、半導体素子と、はんだ
が付着するパッドの集合体を備え、前記半導体素子を搭
載し、封止機能および前記半導体素子と前記パッドとの
導通機能を有するベースと、前記半導体素子とベースの
主要部分を封止および固定するレジンとからなるＢＧＡ
型半導体装置を、前記はんだにより導通および固定する
パッドを備える基板に実装するＢＧＡ型半導体装置とそ
れを実装する基板において、前記ベースと前記基板との
対向面のほぼ中心が熱硬化性樹脂により拘束され、前記
拘束中心からの放射線上における前記ベース下面のパッ
ド寸法が、前記パッド形成面内でそれと直交する方向の
パッド寸法よりも大きく、かつ、前記拘束中心方向にお
ける前記ベースと前記はんだとの接触角が、前記直交方
向における接触角よりも大きい接触角であるとともに、
前記基板のパッドが、前記ベース下面のパッド形状と相
似形もしくはそれに準ずる形状であることを特徴とする
ＢＧＡ型半導体装置とそれを実装する基板によって達成
される。Further, the above object is to provide a base including a semiconductor element and an assembly of pads to which solder is attached, the base on which the semiconductor element is mounted and which has a sealing function and a conduction function between the semiconductor element and the pad. BGA comprising the semiconductor element and a resin for sealing and fixing the main part of the base
In a BGA type semiconductor device for mounting a type semiconductor device on a substrate provided with a pad for conducting and fixing with the solder and a substrate for mounting the same, substantially the center of the facing surface of the base and the substrate is constrained by a thermosetting resin. The pad dimension of the lower surface of the base on the radiation from the restraint center is larger than the pad dimension in the direction orthogonal to the pad forming surface, and the contact between the base and the solder in the restraint center direction. The angle is a contact angle larger than the contact angle in the orthogonal direction,
This is achieved by a BGA type semiconductor device characterized in that the pad of the substrate has a shape similar to or similar to the pad shape of the lower surface of the base, and a substrate on which the same is mounted.
【００１５】[0015]
【作用】上記構成によれば、以下の作用が生じる。 （１）ＢＧＡのパッド形状を、せん断方向相対熱変形の
変形中心を通る線分方向の寸法が、それと直交する線分
方向の寸法よりも大きくすることにより、またそれに併
せ、基板の各パッドの形状を、それとはんだ接続するＢ
ＧＡのパッド形状と相似形もしくはそれに準じたものと
することにより、熱ひずみの発生する方向のはんだボー
ルの接触角を、従来に比べて大きくすることができる。According to the above construction, the following actions occur. (1) By making the pad shape of the BGA so that the dimension in the direction of the line segment passing through the deformation center of the relative thermal deformation in the shear direction is larger than the dimension in the direction of the line segment orthogonal to it, and in accordance with it, Shape B for solder connection with it
By adopting a shape similar to or similar to the GA pad shape, it is possible to make the contact angle of the solder ball in the direction in which thermal strain occurs larger than in the conventional case.
【００１６】（２）変形中心を所定の位置に設定するこ
とにより、変形中心が明確になるためかつ限定できるた
め、パッドの形状が最適化される。そのため、従来に比
べてはんだ寿命を延ばすことができる。(2) By setting the deformation center at a predetermined position, the deformation center becomes clear and can be limited, so that the shape of the pad is optimized. Therefore, the solder life can be extended as compared with the conventional case.
【００１７】[0017]
【実施例】以下、参考例とともに本発明のいくつかの実
施例を、図面を参照して説明する。なお、以下の図にお
いて、同一構造部分には同一符号を付してその説明を省
略する。まず、図８〜図１０により、ＢＧＡとそれを実
装する基板の参考例を説明する。図８は、ＢＧＡとそれ
を実装するための基板の部分断面側視図、図９は、図８
におけるベースを下面から見た平面図、図１０は、ＢＧ
Ａを基板に実装した後のはんだボール形状を示す三角図
である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Some embodiments of the present invention will be described below with reference to the drawings with reference to the drawings. In the following drawings, the same reference numerals are given to the same structural parts, and the description thereof will be omitted. First, a reference example of a BGA and a board on which the BGA is mounted will be described with reference to FIGS. FIG. 8 is a partial cross-sectional side view of the BGA and a board for mounting the BGA, and FIG.
FIG. 10 is a plan view of the base of FIG.
FIG. 6 is a triangular diagram showing a solder ball shape after A is mounted on a substrate.
【００１８】図８において、ＢＧＡ１の半導体素子２は
ベース３に搭載され、ワイヤ４によってベース上面電極
５ａと電気的に接続されている。ベース上面電極５ａは
ベース下面電極５ｂまで電気的に接続されている。半導
体素子２、ワイヤ４およびベース３の上面はレジン２１
によって封止されている。ベース３下面には絶縁のため
のレジスト６が塗布されている。ベース下面電極５ｂ表
面にはレジスト６の存在しない部分があり、パッド７を
形成している。パッド７にははんだボール８が付着して
いる。In FIG. 8, the semiconductor element 2 of the BGA 1 is mounted on the base 3 and is electrically connected to the base upper surface electrode 5a by the wire 4. The base upper surface electrode 5a is electrically connected to the base lower surface electrode 5b. The upper surface of the semiconductor element 2, the wire 4 and the base 3 is a resin 21.
It is sealed by. A resist 6 for insulation is applied to the lower surface of the base 3. There is a portion where the resist 6 does not exist on the surface of the base lower surface electrode 5b, and the pad 7 is formed. Solder balls 8 are attached to the pads 7.
【００１９】一方、基板２０表面にもレジスト９が塗布
されており、ＢＧＡ同様に基板中の電極１０表面にはレ
ジスト９の存在しない部分があって、パッド１１を形成
している。ＢＧＡ１は、はんだボール８を加熱融解して
パッド１１と接合することにより、基板２０に実装され
る。On the other hand, the resist 9 is also applied to the surface of the substrate 20, and like the BGA, there is a portion where the resist 9 does not exist on the surface of the electrode 10 in the substrate, and the pad 11 is formed. The BGA 1 is mounted on the substrate 20 by heating and melting the solder balls 8 and joining them to the pads 11.
【００２０】本例では、図９に示すように、パッド７の
各々はベース３下面にマトリクス状に配置され、円形を
なしている。変形中心（すなわち、ＢＧＡのベースのパ
ッド形成面内における、基板とのせん断方向相対熱変形
が実質０の点もしくは部分）１２と、パッド７の中心１
３とを結ぶ線分Ｂ−Ｂ上のパッド寸法７Ｄ１と、それに
垂直なパッド寸法７Ｄ２とは実質同一である。一方、基
板のパッドもやはり円形をなし、ＢＧＡのパッド７各々
に対応する位置に配置されている。In this example, as shown in FIG. 9, each of the pads 7 is arranged in a matrix on the lower surface of the base 3 and has a circular shape. Deformation center (that is, a point or a portion where relative thermal deformation in the shear direction relative to the substrate is substantially 0 in the pad formation surface of the base of the BGA) 12 and the center 1 of the pad
The pad dimension 7D1 on the line segment B-B connecting 3 and 3 and the pad dimension 7D2 perpendicular thereto are substantially the same. On the other hand, the pads on the substrate also have a circular shape and are arranged at positions corresponding to the pads 7 of the BGA.
【００２１】図１０に示すように、本例におけるはんだ
ボールの形状は、（ａ）の上面図では、はんだボール８
外形はパッド形状７ａと同心円状をなしている。また
（ｂ）の正面図では、はんだボール８外形は、ベースと
の接触角θ、基板との接触角θａを有しており、これら
接触角θ、θａの値は、（ｃ）の側面図と実質同一であ
る。As shown in FIG. 10, the shape of the solder ball in this example is the solder ball 8 in the top view of FIG.
The outer shape is concentric with the pad shape 7a. Further, in the front view of (b), the outer shape of the solder ball 8 has a contact angle θ with the base and a contact angle θa with the substrate. The values of these contact angles θ, θa are the side view of (c). Is substantially the same as
【００２２】次に、本発明の実施例を説明する。図１
は、本発明の第１実施例のＢＧＡを示す図で、図９と同
様の平面図である。本実施例では、図９と異なり、各パ
ッド１４は線分Ｂ−Ｂ上のパッド寸法１４Ｄ１が、それ
に垂直な方向のパッド寸法１４Ｄ２に比べて大きく、楕
円形状をなしている。Next, examples of the present invention will be described. Figure 1
[FIG. 9] is a view showing a BGA of the first embodiment of the present invention and is a plan view similar to FIG. 9. In this embodiment, unlike FIG. 9, each pad 14 has an elliptical shape in which the pad dimension 14D1 on the line segment B-B is larger than the pad dimension 14D2 in the direction perpendicular thereto.
【００２３】図２は、本発明の第１実施例のＢＧＡのは
んだボール形状を示す図で、図１０と同様の三角図であ
り、線分Ｂ−Ｂは図１の線分Ｂ−Ｂである。（ａ）の上
面図において、はんだボール８は自身の表面張力によっ
て、その外形がパッド外形１４ａよりも相対的に円に近
い楕円形状で安定している。その結果、（ｂ）の正面図
に示すように、ベースとの接触角はθ１（基板との接触
角はθ１ａ）となり、接触角θ１は、必然的に、（ｃ）
の側面図における接触角θ２よりも大きくなる。また、
パッド面積およびはんだボール８体積を同一とすれば、
参考例に比べて接触角は大きくなる。このことにより、
熱ひずみが生じる方向におけるくびれ部への熱ひずみの
集中が緩和されるため、はんだ寿命を延ばすことができ
る。FIG. 2 is a diagram showing the shape of the solder balls of the BGA of the first embodiment of the present invention, which is a triangular diagram similar to FIG. 10, and the line segment BB is the line segment BB of FIG. is there. In the top view of (a), the outer shape of the solder ball 8 is stable in an elliptical shape relatively closer to a circle than the pad outer shape 14a due to its own surface tension. As a result, as shown in the front view of (b), the contact angle with the base is θ1 (the contact angle with the substrate is θ1a), and the contact angle θ1 is necessarily (c).
Is larger than the contact angle θ2 in the side view. Also,
If the pad area and solder ball 8 volume are the same,
The contact angle is larger than that of the reference example. By this,
Since the concentration of the thermal strain on the constricted portion in the direction in which the thermal strain occurs is alleviated, the solder life can be extended.
【００２４】図３は、本発明の第２実施例のＢＧＡに配
置されたパッドの一つの平面図である。本実施例におい
て、パッド１５は、変形中心とパッド１５の中心１３と
を通る線分Ｂ−Ｂに平行な２辺、および、それよりも短
くかつそれに垂直な２辺よりなる四辺形をなしている。
パッド形状がこのような形状であっても、第１実施例と
同様の効果が得られる。FIG. 3 is a plan view of one of the pads arranged on the BGA according to the second embodiment of the present invention. In this embodiment, the pad 15 has a quadrilateral shape having two sides parallel to a line segment B-B passing through the center of deformation and the center 13 of the pad 15 and two sides shorter than and perpendicular to the line. There is.
Even if the pad shape is such a shape, the same effect as that of the first embodiment can be obtained.
【００２５】図４は、本発明の第３実施例のＢＧＡに配
置されたパッドの一つの平面図である。本実施例におい
て、パッド１６は、変形中心とパッド１６の中心１３と
を通る線分Ｂ−Ｂ上に対角線を持つ菱形をなしている。
パッド形状がこのような形状であっても、第１実施例と
同様の効果が得られる。FIG. 4 is a plan view of one of the pads arranged on the BGA of the third embodiment of the present invention. In the present embodiment, the pad 16 has a diamond shape having a diagonal line on a line segment B-B passing through the deformation center and the center 13 of the pad 16.
Even if the pad shape is such a shape, the same effect as that of the first embodiment can be obtained.
【００２６】図５は、本発明の第４実施例のＢＧＡを示
す図で、図９と同様の平面図である。本実施例では、変
形中心１２ａをベース３外形、すなわちＢＧＡ外形の中
心としている。一般的にＢＧＡは、その形状の対称性か
ら変形中心が自身の外形の中心となるため、図示するよ
うに、パッド１７を変形中心１２ａの方向へ向けて、パ
ッド配置を行って差し支えない。FIG. 5 is a view showing a BGA of the fourth embodiment of the present invention and is a plan view similar to FIG. In this embodiment, the deformation center 12a is the center of the outer shape of the base 3, that is, the outer shape of the BGA. In general, since the center of deformation of the BGA is the center of its external shape due to the symmetry of its shape, the pads may be arranged with the pad 17 directed toward the center of deformation 12a as shown in the figure.
【００２７】図６は、本発明の第５実施例のＢＧＡ、お
よびそれを実装した基板の、ＢＧＡ平面外形の中心を含
む断面図である。本実施例において、ＢＧＡ１ａの下面
中心は、エポキシなどの熱硬化性樹脂１８によって基板
２０ａと接合されている。このような構成を採用するこ
とにより、変形中心は強制的にＢＧＡ中心に設定される
ため、第４実施例におけるパッド配置形状となり、最も
効果的にはんだ寿命を延ばすことができる。なお熱硬化
性樹脂１８は、ＢＧＡ１ａと基板２０ａの相対的位置関
係を拘束しうるものであればよく、例えば、Ｃｕ、Ｆｅ
−Ｎｉ、Ａｌ等、はんだより硬い金属でもよい。FIG. 6 is a sectional view of the BGA according to the fifth embodiment of the present invention and a board on which the BGA is mounted, including the center of the outline of the BGA plane. In the present embodiment, the center of the lower surface of the BGA 1a is joined to the substrate 20a with a thermosetting resin 18 such as epoxy. By adopting such a configuration, the center of deformation is forcibly set to the center of BGA, so that the pad arrangement shape in the fourth embodiment is obtained, and the solder life can be extended most effectively. The thermosetting resin 18 may be any resin as long as it can restrain the relative positional relationship between the BGA 1a and the substrate 20a.
A metal harder than solder, such as Ni or Al, may be used.
【００２８】図７は、本発明の第６実施例を示す図で、
第１実施例のＢＧＡを実装するための基板の部分平面図
である。本実施例において、パッド１９の各々は、それ
にはんだ付けされるＢＧＡのパッド形状（図１）と相似
形をなしている。このことにより、はんだボールの基板
との接触角（図２におけるθ１ａ）も、大きくすること
ができ、同様にはんだ寿命を延ばすことに効果がある。
なお、第５または第６実施例における基板のパッド形状
は、第２または第３実施例のベースにおけるパッド形
状、あるいはそれらに準じるパッド形状を用いてもよい
ことはもちろんである。FIG. 7 is a diagram showing a sixth embodiment of the present invention.
FIG. 3 is a partial plan view of a substrate for mounting the BGA of the first embodiment. In this embodiment, each of the pads 19 has a shape similar to the pad shape of the BGA (FIG. 1) to be soldered thereto. As a result, the contact angle of the solder ball with the substrate (θ1a in FIG. 2) can be increased, and it is also effective in extending the solder life.
The pad shape of the substrate in the fifth or sixth embodiment may of course be the pad shape in the base of the second or third embodiment, or a pad shape similar thereto.
【００２９】[0029]
【発明の効果】本発明によれば、以下のような効果が得
られる。According to the present invention, the following effects can be obtained.
【００３０】（１）熱ひずみの発生する方向のはんだボ
ールのＢＧＡ、もしくは基板との接触角は従来に比べて
大きくなる。(1) The contact angle of the solder ball in the direction in which thermal strain occurs with the BGA or the substrate becomes larger than in the conventional case.
【００３１】（２）変形中心が明確になるためかつ限定
できるため、パッドの形状および方向が最適化される。
したがって、従来に比べてはんだ寿命を延ばすことがで
きる。(2) Since the center of deformation is clear and can be limited, the shape and direction of the pad are optimized.
Therefore, the solder life can be extended as compared with the conventional case.
【図１】本発明の第１実施例のＢＧＡのベースを下面か
ら見た平面図。FIG. 1 is a plan view of a base of a BGA according to a first embodiment of the present invention viewed from a lower surface.
【図２】本発明の第１実施例のＢＧＡのはんだボール形
状を示す三角図で、（ａ）は上面図、（ｂ）は正面図、
（ｃ）は側面図。FIG. 2 is a triangular diagram showing a solder ball shape of the BGA of the first embodiment of the present invention, (a) is a top view, (b) is a front view,
(C) is a side view.
【図３】本発明の第２実施例のＢＧＡに配置されたパッ
ドの一つの平面図。FIG. 3 is a plan view of one of the pads arranged on the BGA according to the second embodiment of the present invention.
【図４】本発明の第３実施例のＢＧＡに配置されたパッ
ドの一つの平面図。FIG. 4 is a plan view of one of the pads arranged on the BGA according to the third embodiment of the present invention.
【図５】本発明の第４実施例のＢＧＡのベースを下面か
ら見た平面図。FIG. 5 is a plan view of a BGA base according to a fourth embodiment of the present invention as seen from the bottom surface.
【図６】本発明の第５実施例のＢＧＡ、およびそれを実
装した基板の、ＢＧＡ平面外形の中心を含む断面図。FIG. 6 is a sectional view of a BGA according to a fifth embodiment of the present invention and a board on which the BGA is mounted, including the center of the BGA plane outer shape.
【図７】本発明の第６実施例を示し、第１実施例のＢＧ
Ａを実装するための基板の部分平面図。FIG. 7 shows a sixth embodiment of the present invention, the BG of the first embodiment.
FIG. 3 is a partial plan view of a substrate for mounting A.
【図８】本発明の参考例を示し、ＢＧＡとそれを実装す
る基板の部分断面側視図。FIG. 8 is a partial cross-sectional side view of a BGA and a board on which the BGA is mounted, showing a reference example of the present invention.
【図９】図８の断面Ａ−Ａを示し、ベースを下面から見
た平面図。9 is a plan view showing the cross section AA of FIG. 8 and the base seen from the lower surface. FIG.
【図１０】参考例におけるＢＧＡを基板に実装した後の
はんだボール形状を示す三角図で、（ａ）は上面図、
（ｂ）は正面図、（ｃ）は側面図。FIG. 10 is a triangular diagram showing a solder ball shape after mounting the BGA on the substrate in the reference example, (a) is a top view,
(B) is a front view and (c) is a side view.
１、１ａ ＢＧＡ ２ 半導体素子 ３ ベース ４ ワイヤ ５ａ ベース上面電極 ５ｂ ベース下面電極 ６ レジスト ７ パッド ７ａ パッド外形 ７Ｄ１ 線分Ｂ−Ｂ上のパッド寸法 ７Ｄ２ ７Ｄ１に垂直な方向のパッド寸法 ８ はんだボール ９ レジスト １０ 電極 １１ パッド １２、１２ａ 変形中心 １３ パッドの中心 １４ パッド １４ａ パッド外形 １４Ｄ１ 線分Ｂ−Ｂ上のパッド寸法 １４Ｄ２ １４Ｄ１に垂直な方向のパッド寸法 １５、１６、１７ パッド １８ 熱硬化性樹脂 １９ パッド ２０、２０ａ 基板 ２１ レジン θ はんだボールのベースとの接触角 θａ はんだボールの基板との接触角 θ１ はんだボールのベースとの接触角 θ１ａ はんだボールの基板との接触角 θ２ はんだボールのベースとの接触角 1, 1a BGA 2 semiconductor element 3 base 4 wire 5a base upper surface electrode 5b base lower surface electrode 6 resist 7 pad 7a pad outline 7D1 pad size on line segment BB 7D2 pad size in the direction perpendicular to 7D1 8 solder ball 9 resist 10 Electrode 11 Pad 12, 12a Deformation center 13 Pad center 14 Pad 14a Pad outline 14D1 Pad size on line segment BB 14D2 Pad size in the direction perpendicular to 14D1 15, 16, 17 Pad 18 Thermosetting resin 19 Pad 20, 20a Substrate 21 Resin θ Contact angle of solder ball with base θa Contact angle of solder ball with substrate θ1 Contact angle of solder ball with base θ1a Contact angle of solder ball with substrate θ2 Contact with solder ball base Horn
───────────────────────────────────────────────────── フロントページの続き (72)発明者 矢口 昭弘 茨城県土浦市神立町502番地 株式会社日 立製作所機械研究所内 (72)発明者 米田 奈柄 茨城県土浦市神立町502番地 株式会社日 立製作所機械研究所内 (72)発明者 田中 直敬 茨城県土浦市神立町502番地 株式会社日 立製作所機械研究所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akihiro Yaguchi 502 Jinritsucho, Tsuchiura-shi, Ibaraki Hiritsu Manufacturing Co., Ltd. Mechanical Research Institute (72) Nana Yoneda 502 Kintate-cho, Tsuchiura-shi, Ibaraki Hiritsu Co., Ltd. Machinery Research Laboratory (72) Inventor Naonaka Tanaka 502 Kintatemachi, Tsuchiura City, Ibaraki Prefecture
Claims (13)
数のパッドが形成され、前記パッドと基板とをはんだに
より導通および固定するＢＧＡ型半導体装置において、 前記パッドは前記ベース下面内の平面形状が長径と短径
とを有し、前記長径方向が、前記はんだにより前記基板
とのせん断方向相対熱変形の生じない点もしくは部分の
方向を指向していることを特徴とするＢＧＡ型半導体装
置。1. A BGA type semiconductor device in which a plurality of pads are formed on a lower surface of a base on which a semiconductor element is mounted, and the pads and the substrate are electrically connected and fixed by solder, wherein the pads have a planar shape in the lower surface of the base. A BGA type semiconductor device having a major axis and a minor axis, wherein the major axis direction is directed to a point or a portion where relative thermal deformation in the shearing direction relative to the substrate does not occur due to the solder.
数のパッドが形成され、前記パッドと基板とをはんだに
より導通および固定するＢＧＡ型半導体装置において、 前記パッドは前記ベース下面内の平面形状が長径と短径
とを有し、前記長径方向が、前記基板との熱膨張差に伴
うせん断方向相対熱変形の中心からの放射線上にあるこ
とを特徴とするＢＧＡ型半導体装置。2. A BGA type semiconductor device in which a plurality of pads are formed on a lower surface of a base on which a semiconductor element is mounted, and the pads and the substrate are electrically connected and fixed by solder, wherein the pads have a planar shape in the lower surface of the base. A BGA type semiconductor device having a major axis and a minor axis, wherein the major axis direction is on the radiation from the center of relative thermal deformation in the shearing direction due to the difference in thermal expansion from the substrate.
装置において、 前記はんだを固定する前記基板のパッドは、前記ベース
下面のパッド形状と相似形もしくはそれに準ずるもので
あることを特徴とするＢＧＡ型半導体装置。3. The BGA type semiconductor device according to claim 1, wherein the pad of the substrate for fixing the solder has a shape similar to or similar to a pad shape of the lower surface of the base. Type semiconductor device.
数のパッドが形成され、前記パッドと基板とをはんだに
より導通および固定するＢＧＡ型半導体装置において、 前記パッドの形成面内における前記基板とのせん断方向
相対熱変形が生じない点もしくは部分と、前記パッドの
配置中心点とを通る線分上の前記パッド寸法が、前記パ
ッド形成面内でそれと直交する方向のパッド寸法よりも
大なることを特徴とするＢＧＡ型半導体装置。4. A BGA type semiconductor device in which a plurality of pads are formed on a lower surface of a base on which a semiconductor element is mounted, and the pads and the substrate are electrically connected and fixed by soldering. The pad size on a line segment passing through the point or portion where relative thermal deformation in the shearing direction does not occur and the pad center point is larger than the pad size in the direction orthogonal to the pad formation plane. Characteristic BGA type semiconductor device.
いて、 前記線分方向のベースとはんだとの接触角が、前記パッ
ド形成面内で前記線分と直交する方向における接触角よ
りも大なることを特徴とするＢＧＡ型半導体装置。5. The BGA type semiconductor device according to claim 4, wherein a contact angle between the base and the solder in the line segment direction is larger than a contact angle in a direction orthogonal to the line segment in the pad formation surface. A BGA type semiconductor device characterized by the above.
導体装置において、 前記パッドは、楕円形もしくは弧と直線の合成形からな
ることを特徴とするＢＧＡ型半導体装置。6. The BGA type semiconductor device according to claim 1, 2 or 4, wherein the pad has an elliptical shape or a combined shape of an arc and a straight line.
導体装置において、 前記パッドは、複数の直線の合成形からなることを特徴
とするＢＧＡ型半導体装置。7. The BGA type semiconductor device according to claim 1, 2 or 4, wherein the pad is a composite type of a plurality of straight lines.
導体装置において、 前記せん断方向相対熱変形が生じない点もしくは部分
は、前記ベース下面のほぼ中心であることを特徴とする
ＢＧＡ型半導体装置。8. The BGA type semiconductor device according to claim 1, 2 or 4, wherein the point or the portion where the relative thermal deformation in the shearing direction does not occur is substantially the center of the lower surface of the base. apparatus.
導体装置において、 前記ベースと前記基板との対向面のほぼ中心に、前記せ
ん断方向相対熱変形の生じない拘束手段を有することを
特徴とするＢＧＡ型半導体装置。9. The BGA type semiconductor device according to claim 1, 2 or 4, further comprising a restraining means that does not cause relative thermal deformation in the shearing direction substantially at the center of the facing surface between the base and the substrate. BGA type semiconductor device.
おいて、 前記拘束手段は熱硬化性樹脂からなることを特徴とする
ＢＧＡ型半導体装置。10. The BGA type semiconductor device according to claim 9, wherein the restraint means is made of a thermosetting resin.
おいて、 前記拘束手段は、前記はんだより硬い金属からなること
を特徴とするＢＧＡ型半導体装置。11. The BGA type semiconductor device according to claim 9, wherein the restraint means is made of a metal harder than the solder.
記載のＢＧＡ型半導体装置をはんだ付けする基板は、前
記ＢＧＡ型半導体装置のベース下面のパッドと相似形も
しくはそれに準じる形状および方向性を有するパッドを
備えていることを特徴とする基板。12. The substrate to which the BGA type semiconductor device according to claim 4 is soldered, has a shape similar to or similar to the pad on the lower surface of the base of the BGA type semiconductor device, or a shape and directionality corresponding thereto. A substrate having a pad.
ドの集合体を備え、前記半導体素子を搭載し、封止機能
および前記半導体素子と前記パッドとの導通機能を有す
るベースと、前記半導体素子とベースの主要部分を封止
および固定するレジンとからなるＢＧＡ型半導体装置
を、前記はんだにより導通および固定するパッドを備え
る基板に実装するＢＧＡ型半導体装置とそれを実装する
基板において、 前記ベースと前記基板との対向面のほぼ中心が熱硬化性
樹脂により拘束され、前記拘束中心からの放射線上にお
ける前記ベース下面のパッド寸法が、前記パッド形成面
内でそれと直交する方向のパッド寸法よりも大きく、か
つ、前記拘束中心方向における前記ベースと前記はんだ
との接触角が、前記直交方向における接触角よりも大き
い接触角であるとともに、前記基板のパッドが、前記ベ
ース下面のパッド形状と相似形もしくはそれに準ずる形
状であることを特徴とするＢＧＡ型半導体装置とそれを
実装する基板。13. A base comprising a semiconductor element and an assembly of pads to which solder is attached, the base having the semiconductor element mounted thereon, having a sealing function and a conductive function between the semiconductor element and the pad, and the semiconductor element. A BGA type semiconductor device having a pad for conducting and fixing with a solder, the BGA type semiconductor device comprising a resin for sealing and fixing a main part of a base, and a board for mounting the same, wherein: The center of the surface facing the substrate is constrained by a thermosetting resin, the pad dimension of the base lower surface on the radiation from the constrained center is larger than the pad dimension in the direction orthogonal to the pad forming surface, Further, the contact angle between the base and the solder in the constraining center direction is larger than the contact angle in the orthogonal direction. Substrate with a corner pad of the substrate, to implement it and BGA-type semiconductor device, wherein the a base lower surface of the pad shape similar to the shape or shapes analogous thereto.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11250194A JP3208470B2 (en) | 1994-05-26 | 1994-05-26 | BGA type semiconductor device and substrate on which it is mounted |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11250194A JP3208470B2 (en) | 1994-05-26 | 1994-05-26 | BGA type semiconductor device and substrate on which it is mounted |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001109937A Division JP2001298124A (en) | 2001-04-09 | 2001-04-09 | Bga-type semiconductor device and substrate for packaging the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07321247A true JPH07321247A (en) | 1995-12-08 |
| JP3208470B2 JP3208470B2 (en) | 2001-09-10 |
Family
ID=14588238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11250194A Expired - Fee Related JP3208470B2 (en) | 1994-05-26 | 1994-05-26 | BGA type semiconductor device and substrate on which it is mounted |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3208470B2 (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100233869B1 (en) * | 1996-12-27 | 1999-12-01 | 김규현 | Solder ball land structure of print circuit board |
| US6330166B1 (en) | 1998-09-29 | 2001-12-11 | Denso Corporation | Electronic-component mounting structure |
| JP2002217227A (en) * | 2000-12-29 | 2002-08-02 | Samsung Electronics Co Ltd | Thermal, stress absorbing interface structure, wafer level package using the same, and its manufacturing method |
| JP2002334901A (en) * | 2001-05-08 | 2002-11-22 | Nec Corp | Semiconductor device |
| US6927491B1 (en) | 1998-12-04 | 2005-08-09 | Nec Corporation | Back electrode type electronic part and electronic assembly with the same mounted on printed circuit board |
| JP2006513648A (en) * | 2003-01-20 | 2006-04-20 | エプコス アクチエンゲゼルシャフト | Small board surface electrical components |
| US7863525B2 (en) | 2008-03-18 | 2011-01-04 | Kabushiki Kaisha Toshiba | Printed circuit board and electronic device |
| KR101464069B1 (en) * | 2012-03-29 | 2014-11-21 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | Elongated bumps in integrated circuit devices |
| JP2015153816A (en) * | 2014-02-12 | 2015-08-24 | 新光電気工業株式会社 | Wiring board, semiconductor package, and method of manufacturing semiconductor package |
| JP2017152678A (en) * | 2016-02-22 | 2017-08-31 | 京セラ株式会社 | Wiring board, electronic apparatus and wiring board manufacturing method |
| JP2018190775A (en) * | 2017-04-28 | 2018-11-29 | 東北マイクロテック株式会社 | Solid-state imaging apparatus |
-
1994
- 1994-05-26 JP JP11250194A patent/JP3208470B2/en not_active Expired - Fee Related
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100233869B1 (en) * | 1996-12-27 | 1999-12-01 | 김규현 | Solder ball land structure of print circuit board |
| US6330166B1 (en) | 1998-09-29 | 2001-12-11 | Denso Corporation | Electronic-component mounting structure |
| US6927491B1 (en) | 1998-12-04 | 2005-08-09 | Nec Corporation | Back electrode type electronic part and electronic assembly with the same mounted on printed circuit board |
| JP2007214587A (en) * | 2000-12-29 | 2007-08-23 | Samsung Electronics Co Ltd | Semiconductor assembly |
| JP2002217227A (en) * | 2000-12-29 | 2002-08-02 | Samsung Electronics Co Ltd | Thermal, stress absorbing interface structure, wafer level package using the same, and its manufacturing method |
| JP2002334901A (en) * | 2001-05-08 | 2002-11-22 | Nec Corp | Semiconductor device |
| JP2006513648A (en) * | 2003-01-20 | 2006-04-20 | エプコス アクチエンゲゼルシャフト | Small board surface electrical components |
| US8022556B2 (en) | 2003-01-20 | 2011-09-20 | Epcos Ag | Electrical component having a reduced substrate area |
| US7863525B2 (en) | 2008-03-18 | 2011-01-04 | Kabushiki Kaisha Toshiba | Printed circuit board and electronic device |
| KR101464069B1 (en) * | 2012-03-29 | 2014-11-21 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | Elongated bumps in integrated circuit devices |
| US8922006B2 (en) | 2012-03-29 | 2014-12-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Elongated bumps in integrated circuit devices |
| JP2015153816A (en) * | 2014-02-12 | 2015-08-24 | 新光電気工業株式会社 | Wiring board, semiconductor package, and method of manufacturing semiconductor package |
| JP2017152678A (en) * | 2016-02-22 | 2017-08-31 | 京セラ株式会社 | Wiring board, electronic apparatus and wiring board manufacturing method |
| JP2018190775A (en) * | 2017-04-28 | 2018-11-29 | 東北マイクロテック株式会社 | Solid-state imaging apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3208470B2 (en) | 2001-09-10 |
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