JPH07321038A - Semiconductor thin film forming method and device - Google Patents

Semiconductor thin film forming method and device

Info

Publication number
JPH07321038A
JPH07321038A JP10812294A JP10812294A JPH07321038A JP H07321038 A JPH07321038 A JP H07321038A JP 10812294 A JP10812294 A JP 10812294A JP 10812294 A JP10812294 A JP 10812294A JP H07321038 A JPH07321038 A JP H07321038A
Authority
JP
Japan
Prior art keywords
thin film
temperature
substrate
forming
heterostructure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10812294A
Other languages
Japanese (ja)
Inventor
Hideo Kashima
秀夫 鹿島
Teruo Busshu
照夫 物集
Kazuhiko Hosomi
和彦 細見
Kiyoshi Ouchi
潔 大内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10812294A priority Critical patent/JPH07321038A/en
Publication of JPH07321038A publication Critical patent/JPH07321038A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To provide growing means of extremely high quality hetero structural thin film developing no defects and inner diffusion, which is indispensable for super lattice such as HBT. CONSTITUTION:In order to grow a hetero structural thin film comprising multiple semiconductor thin films, a step lowering the substrate temperature at a specific lowering ratio in the growing step is included at least one time. Accordingly, the formation of the thin film, especially one wherein the growing thin film surface temperature of a heterostructural thin film comprising multiple thin films in different radiation absorption coefficient is constabtly maintained or within a specific range may be attained so that the surface defectives and the inner diffusion of thin film component element due to the abnormal raise in the surface temperature may be avoided thereby realizing a high quality hetero-structural thin film optimum for super lattice device.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は,化合物半導体薄膜の結
晶成長方法及びその装置により,特にヘテロ構造を形成
する化合物半導体薄膜の成長技術として,その薄膜を構
成する元素の拡散及び欠陥の無い高品質な化合物半導体
ヘテロ構造薄膜の成長技術に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor thin film crystal growth method and apparatus thereof, and is particularly useful as a compound semiconductor thin film growth technique for forming a heterostructure. The present invention relates to a growth technique for a high-quality compound semiconductor heterostructure thin film.

【0002】[0002]

【従来の技術】従来の半導体薄膜形成方法としては,例
えば特開平5−144751号または特開平5−213
46号公報記載のものがある。また従来の薄膜原料とし
て,ガスを用いた半導体薄膜成長技術であるガスソース
分子線エピタキシ法(GasSource Molec
ular Beam Epitaxy,以下GSMBE
と省略する)としては,例えば特開平5−90160号
公報記載のものがある。図9は一般に用いられているG
SMBE装置の主要な構成部の配置例を示す。
2. Description of the Related Art As a conventional semiconductor thin film forming method, for example, JP-A-5-144751 or JP-A-5-213 is known.
There is one described in Japanese Patent No. 46. Further, as a conventional thin film raw material, a gas source molecular beam epitaxy method (Gas Source Molec), which is a semiconductor thin film growth technique using gas
ulal Beam Epitaxy, GSMBE
Are omitted), for example, those described in Japanese Patent Laid-Open No. 5-90160. FIG. 9 shows the commonly used G
An example of arrangement of main components of the SMBE device is shown.

【0003】薄膜を成長する基板1と,基板1の裏面に
対向する位置に,基板1を任意温度に加熱及び保持する
熱源2及び基板温度を測定する制御用熱電対5が具備さ
れている。熱源2及び制御用熱電対5は,各々電源3と
温度調節器4にそれぞれ接続されている。基板1の表面
に対向する位置には,固体ソース分子線セル7,クラッ
キングセル6が置かれている。
A substrate 1 on which a thin film is grown, a heat source 2 for heating and holding the substrate 1 at an arbitrary temperature and a control thermocouple 5 for measuring the substrate temperature are provided at positions facing the back surface of the substrate 1. The heat source 2 and the control thermocouple 5 are respectively connected to the power source 3 and the temperature controller 4. A solid source molecular beam cell 7 and a cracking cell 6 are placed at positions facing the surface of the substrate 1.

【0004】固体ソース分子線セル7には,III族の薄
膜原料である固体III族原料8が充填されており,任意
温度に加熱,蒸発した後基板1に供給する。クラッキン
グセル6には,V族の薄膜原料であるガス状のV族原料
を充填したボンベ(図示せず)が接続されており,ボン
ベからガス状のV族原料がクラッキングセル6に導入さ
れ,クラッキングセル6内にて任意温度に加熱し,分解
した後基板1に供給する。各々の固体ソース分子線セル
7及びクラッキングセル6には,シャッタ6a,7aが
それぞれ具備されている。
A solid source molecular beam cell 7 is filled with a solid group III raw material 8 which is a thin group III raw material, and is heated to an arbitrary temperature and evaporated and then supplied to the substrate 1. The cracking cell 6 is connected to a cylinder (not shown) filled with a gaseous group V raw material, which is a group V thin film raw material, and the gaseous group V raw material is introduced into the cracking cell 6 from the cylinder. It is heated to an arbitrary temperature in the cracking cell 6, decomposed, and then supplied to the substrate 1. Each solid source molecular beam cell 7 and cracking cell 6 is provided with shutters 6a and 7a, respectively.

【0005】基板1の加熱または基板温度の保持は以下
の手順で行なわれる。あらかじめ温度調節器4に所望の
基板温度を設定する。制御用熱電対5で測定した基板1
の温度は温度調節器4に入力され,温度調節器4に設定
されている所望の基板温度との差を演算し,所望の基板
温度に到達または保持するに要する電力量を電源3から
熱源2に供給する。電力を供給された熱源2は発熱し,
輻射熱を発する。基板1はこの熱源2から放射された輻
射熱を吸収し,基板温度が上昇または所望の基板温度に
保持される。この手順を繰り返すことで基板温度は調整
される。
The heating of the substrate 1 or the holding of the substrate temperature are performed in the following procedure. A desired substrate temperature is set in advance in the temperature controller 4. Substrate 1 measured with control thermocouple 5
Is input to the temperature controller 4, the difference from the desired substrate temperature set in the temperature controller 4 is calculated, and the amount of electric power required to reach or hold the desired substrate temperature is supplied from the power source 3 to the heat source 2 Supply to. The heat source 2 supplied with electric power generates heat,
It emits radiant heat. The substrate 1 absorbs the radiant heat emitted from the heat source 2, and the substrate temperature rises or is maintained at a desired substrate temperature. The substrate temperature is adjusted by repeating this procedure.

【0006】ところで,従来方法による半導体薄膜,例
えばIII−V族化合物半導体薄膜の成長は以下の工程で
行なわれていた。
By the way, the growth of a semiconductor thin film such as a III-V group compound semiconductor thin film by the conventional method has been carried out in the following steps.

【0007】まずシャッタ6aをあけてV族原料を基板
1に供給しながら基板温度を前述した手順に従い所定の
温度に加熱し,基板表面の酸化物を除去する。次に基板
温度を温度調節器4で薄膜を成長する所望の温度(以下
成長初期温度と称する)に設定し,前述した手順にて保
持する。一般に薄膜の成長温度は,酸化物を除去する際
の温度より低い温度となる。この後シャッタ7aを開け
III族原料を基板に供給し,所定時間III−V族薄膜の成
長を行なう。III−V族薄膜の成長の間温度調節器4に
設定した成長初期温度は終始一定に保持されている。こ
の後シャッタ7a,6aを順次閉じてIII族原料及びV
族原料の基板1への供給を停止し,III−V族薄膜の成
長を終了する。
First, the shutter 6a is opened to supply the group V raw material to the substrate 1, and the substrate temperature is heated to a predetermined temperature in accordance with the procedure described above to remove the oxide on the substrate surface. Next, the substrate temperature is set to a desired temperature for growing the thin film by the temperature controller 4 (hereinafter referred to as initial growth temperature), and the temperature is maintained in the above-described procedure. Generally, the growth temperature of the thin film is lower than the temperature at which the oxide is removed. After this, open the shutter 7a
The Group III raw material is supplied to the substrate, and the Group III-V thin film is grown for a predetermined time. During the growth of the III-V thin film, the initial growth temperature set in the temperature controller 4 is kept constant throughout. After that, the shutters 7a and 6a are sequentially closed to close the group III raw material and the V
The supply of the group raw material to the substrate 1 is stopped, and the growth of the III-V group thin film is completed.

【0008】[0008]

【発明が解決しようとする課題】しかしながら従来方法
による薄膜の形成方法では,薄膜成長中の表面温度は,
その薄膜表面が固体ソース分子線セルまたはクラッキン
グセルからの輻射熱で加熱されるため,異常に上昇する
問題が生じる。
However, in the method of forming a thin film according to the conventional method, the surface temperature during thin film growth is
The surface of the thin film is heated by the radiant heat from the solid source molecular beam cell or cracking cell, causing a problem of abnormal rise.

【0009】図10に従来方法によるInP基板上のI
nGaAs薄膜とInP薄膜から成るヘテロ構造薄膜の
形成時における,基板表面に対向する位置に置かれた放
射温度計で測定した成長中の薄膜表面の温度と,制御用
熱電対で測定したInP基板裏面の温度の成長時間依存
性を示した。制御用熱電対で測定した基板裏面の温度
は,成長開始後も成長開始時の温度に保持されている
が,放射温度計で測定した成長中のInGaAs薄膜の
表面の温度は,成長終了までに成長初期温度460℃よ
り52℃高い512℃にまで上昇している。またこの温
度の上昇は,ほとんどInGaAs薄膜の成長の間で進
行していることがわかる。InGaAs薄膜の方がIn
P薄膜に対して薄膜表面温度の上昇が著しい理由は,I
nGaAs薄膜,InP薄膜の光の吸収(以下輻射吸収
と称する)特性が異なっていることが考えられる。つま
りInGaAs薄膜の方がInP薄膜より固体ソース分
子線セルまたはクラッキングセルからの輻射熱を効率良
く吸収する性質を有しているため,InGaAs薄膜の
表面温度が異常に上昇した。
FIG. 10 shows the I on the InP substrate according to the conventional method.
When forming a heterostructure thin film consisting of an nGaAs thin film and an InP thin film, the temperature of the growing thin film surface measured by a radiation thermometer placed at a position facing the substrate surface and the back surface of the InP substrate measured by a control thermocouple. The growth time dependence of the temperature was shown. The temperature of the backside of the substrate measured by the control thermocouple is maintained at the temperature at the start of growth even after the start of growth, but the temperature of the surface of the InGaAs thin film during growth measured by the radiation thermometer is The initial growth temperature has risen to 512 ° C., which is 52 ° C. higher than 460 ° C. It is also seen that this temperature increase almost progresses during the growth of the InGaAs thin film. InGaAs thin film is more In
The reason why the temperature of the thin film surface rises significantly with respect to the P thin film is
It is considered that the nGaAs thin film and the InP thin film have different light absorption (hereinafter referred to as radiation absorption) characteristics. That is, since the InGaAs thin film has a property of efficiently absorbing the radiant heat from the solid source molecular beam cell or the cracking cell than the InP thin film, the surface temperature of the InGaAs thin film abnormally increased.

【0010】図11は同じく従来方法で成長したInG
aAs薄膜とInP薄膜から成るヘテロ構造薄膜のIn
P薄膜表面を,ノマルスキ微分干渉顕微鏡で観察したス
ケッチを示している。表面には燐の欠乏に起因して発生
する表面欠陥が多数現われている。この欠陥の密度は1
cm2あたり約100から200個であった。
FIG. 11 shows InG similarly grown by the conventional method.
In of a heterostructure thin film composed of an aAs thin film and an InP thin film
The sketch which observed the P thin film surface by the Nomarski differential interference microscope is shown. Many surface defects appear due to the lack of phosphorus on the surface. The density of this defect is 1
The number was about 100 to 200 per cm 2 .

【0011】図12は同じく従来方法で成長したInG
aAs薄膜とInP薄膜から成るヘテロ構造薄膜のIn
P薄膜のみを,塩酸系エッチャントでを用いて選択除去
した後のInGaAs薄膜表面を,ノマルスキ微分干渉
顕微鏡で観察したスケッチを示している。InGaAs
薄膜表面には,砒素の欠乏に起因した欠陥は全く現われ
ていない。
FIG. 12 shows InG similarly grown by the conventional method.
In of a heterostructure thin film composed of an aAs thin film and an InP thin film
The sketch which observed the InGaAs thin film surface after selectively removing only P thin film using hydrochloric acid type etchant by the Nomarski differential interference microscope is shown. InGaAs
No defects caused by arsenic deficiency appear on the surface of the thin film.

【0012】InP薄膜にのみに,燐の欠乏の起因した
表面欠陥が生じた理由として,以下の現象が考えられ
る。
The following phenomenon can be considered as the reason why the surface defects caused by the phosphorus deficiency occur only in the InP thin film.

【0013】燐は砒素と比較し,蒸気圧が非常に高く,
付着効率も著しく低い材料である。またGSMBE法に
よって,高品質なInP薄膜が得られるInP薄膜の成
長温度範囲は450℃から490℃である。これらから
前述したInP薄膜成長後の薄膜表面温度である512
℃は,InP薄膜の成長温度としては非常に高過ぎたた
めにInP薄膜の成長中に燐の再蒸発が加速しているこ
とが推察される。このためInP薄膜の成長中に,薄膜
表面に取り込まれる燐の絶対量が不足するか,または一
旦取り込まれたものの再び蒸発している。この結果In
P薄膜を構成に要する燐の絶対量が不足することにな
り,燐の欠乏に起因した表面欠陥が多数生じたものと思
われる。
Phosphorus has a much higher vapor pressure than arsenic,
It is also a material with extremely low adhesion efficiency. In addition, the growth temperature range of the InP thin film that can obtain a high quality InP thin film by the GSMBE method is 450 ° C to 490 ° C. From these, the above-mentioned thin film surface temperature after the growth of the InP thin film is 512
Since the growth temperature of the InP thin film is too high, the re-evaporation of phosphorus is presumably accelerated during the growth of the InP thin film. Therefore, during growth of the InP thin film, the absolute amount of phosphorus taken in on the surface of the thin film is insufficient, or once taken in, it is evaporated again. As a result In
It is considered that the absolute amount of phosphorus required for forming the P thin film was insufficient, and many surface defects were caused by the lack of phosphorus.

【0014】図13は,従来例に基いて成長したアンド
ープInGaAs薄膜と,ベリリウムを5×1019/c
3ドーピングしたInGaAs薄膜を交互に積層した
超格子構造の,深さ方向の元素の分布状態を2次イオン
質量分析計で測定した結果である。薄膜中のベリリウム
濃度を示す実線がアンドープInGaAs薄膜領域に裾
を引いている。この結果は,従来方法による薄膜形成方
法では,ベリリウムをドープしたInGaAs薄膜層か
らアンドープInGaAs薄膜層へ,その成長中にベリ
リウムが内部拡散していることを示している。
FIG. 13 shows an undoped InGaAs thin film grown according to the conventional example and beryllium of 5 × 10 19 / c.
of m 3 doped superlattice structure obtained by stacking InGaAs thin films alternately with the results of measuring the distribution in the depth direction of the element a secondary ion mass spectrometer. The solid line showing the beryllium concentration in the thin film is tailed to the undoped InGaAs thin film region. This result shows that in the thin film forming method according to the conventional method, beryllium is internally diffused from the beryllium-doped InGaAs thin film layer to the undoped InGaAs thin film layer during its growth.

【0015】以上の結果から,従来方法に従った半導体
薄膜の形成手段では,実際に成長が進行している薄膜の
表面温度が異常に上昇する現象が生じる。この結果,成
長した半導体薄膜表面には表面欠陥及び薄膜中の元素の
内部拡散が発生することが明らかである。
From the above results, in the semiconductor thin film forming means according to the conventional method, there occurs a phenomenon in which the surface temperature of the thin film in which the growth actually progresses abnormally rises. As a result, it is clear that surface defects and internal diffusion of elements in the thin film occur on the surface of the grown semiconductor thin film.

【0016】以上説明してきたような,薄膜の表面にV
族の欠乏に起因した表面欠陥が生じた場合,電子デバイ
ス,光デバイスの作成が不可能になることは言うまでも
ない。さらにドーパントである元素の内部拡散は,電子
デバイス,光デバイスの特性に多大な影響を及ぼすこと
になる。その中でも特にヘテロバイポーラトランジスタ
(以下HBTと省略する)におけるドーパントの拡散
は,電流利得,動作速度等のデバイス特性の著しい劣化
を招く一因となる。また本説明では特にInGaAs薄
膜とInP薄膜から成るヘテロ構造薄膜の成長について
のみ触れているが,同様の問題は例えばInGaP,G
aAs,ZnS,ZnSeと言った他の材料系の薄膜ま
たはヘテロ構造薄膜の成長の際も生じる。
As described above, V is formed on the surface of the thin film.
Needless to say, it is impossible to make electronic devices and optical devices if surface defects occur due to the lack of a group. Further, the internal diffusion of the element as a dopant has a great influence on the characteristics of electronic devices and optical devices. Among them, the diffusion of a dopant in a hetero-bipolar transistor (hereinafter abbreviated as HBT) is one of the causes of causing significant deterioration of device characteristics such as current gain and operating speed. Further, in this description, only the growth of a heterostructure thin film composed of an InGaAs thin film and an InP thin film is mentioned, but the same problem is caused by, for example, InGaP, G
It also occurs during the growth of thin films or heterostructure thin films of other materials such as aAs, ZnS, ZnSe.

【0017】本発明は上記問題を解消することにあり,
特にHBT等の超格子ヘテロ構造デバイスの成長方法に
おいて,欠陥,拡散の無い高品質な薄膜,特にヘテロ構
造薄膜の成長手段を提供することにある。
The present invention is to eliminate the above problems,
In particular, in a method of growing a superlattice heterostructure device such as HBT, it is to provide a means for growing a high quality thin film, particularly a heterostructure thin film, without defects and diffusion.

【0018】[0018]

【課題を解決するための手段】V族原料を基板に照射し
ながら基板上の酸化物を除去した後,基板温度を高品質
な薄膜が得られる成長初期温度に温度調節器に設定す
る。この後III族原料の供給を開始し,III−V族薄膜の
成長を開始する。成長中のIII−V族薄膜の表面温度は
放射温度計で測定し,その温度が高品質な薄膜が得られ
る成長温度の上限値である所定の温度に達した時,若し
くは薄膜の表面温度の変化に同期して,漸次温度調節器
の基板温度の設定値を調整する。
[Means for Solving the Problems] After removing the oxide on the substrate while irradiating the substrate with a group V source, the substrate temperature is set in a temperature controller at an initial growth temperature at which a high quality thin film can be obtained. After that, the supply of the group III raw material is started and the growth of the group III-V thin film is started. The surface temperature of the growing III-V thin film is measured by a radiation thermometer, and when the temperature reaches a predetermined temperature which is the upper limit of the growth temperature to obtain a high quality thin film, or the surface temperature of the thin film In synchronization with the change, gradually adjust the substrate temperature setting value of the temperature controller.

【0019】[0019]

【作用】成長中の薄膜表面の温度変化に対応して,温度
調節器の基板温度設定値を調整することによって,輻射
吸収特性の異なる異種の薄膜から成るヘテロ構造薄膜で
あっても,その成長を通して常にその薄膜の表面温度
を,高品質な膜が得られる成長温度範囲内に保持するこ
とが可能となる。また温度調節器の基板温度設定値の調
整を行なう指針である薄膜表面の所定温度は,高品質な
膜が得られる成長温度の上限以下の温度である。これに
よって薄膜表面の温度の異常な温度の上昇が抑制される
ため,その薄膜を構成する蒸気圧の高い,付着効率の低
い元素の成長中の再蒸発速度が適切となり,これによっ
て欠陥及び拡散の無い極めて高品質な薄膜またはヘテロ
構造薄膜が実現できる。
[Function] By adjusting the substrate temperature setting value of the temperature controller according to the temperature change of the thin film surface during growth, even the heterostructure thin film composed of different thin films having different radiation absorption characteristics can be grown. It is possible to keep the surface temperature of the thin film within the growth temperature range where a high quality film can be obtained. Further, the predetermined temperature of the thin film surface, which is a guide for adjusting the substrate temperature set value of the temperature controller, is a temperature below the upper limit of the growth temperature at which a high quality film can be obtained. Since this suppresses an abnormal rise in the temperature of the thin film surface, the re-evaporation rate during the growth of the elements with high vapor pressure and low deposition efficiency that compose the thin film becomes appropriate, which leads to the formation of defects and diffusion. An extremely high quality thin film or heterostructure thin film can be realized.

【0020】[0020]

【実施例】以下本発明によるヘテロ構造薄膜の成長方法
を,特にInP基板上のInGaAs薄膜及びInP薄
膜から構成されるヘテロ構造薄膜の成長の実施例をもと
に説明する。
The method for growing a heterostructure thin film according to the present invention will be described below with reference to an embodiment of growing a heterostructure thin film composed of an InGaAs thin film and an InP thin film on an InP substrate.

【0021】図1は本発明によるヘテロ構造薄膜の成長
方法に従った各種薄膜の成長過程における温度調節器の
基板温度設定値の変更チャートを示す。
FIG. 1 shows a chart for changing the substrate temperature set value of the temperature controller during the growth process of various thin films according to the method for growing a heterostructured thin film according to the present invention.

【0022】図2は本実施例で用いたGSMBE装置の
概略図である。図2において従来のGSMBE装置(図
9)と同一符号は同等部分を示す。
FIG. 2 is a schematic diagram of the GSMBE apparatus used in this embodiment. In FIG. 2, the same reference numerals as those of the conventional GSMBE device (FIG. 9) indicate the same parts.

【0023】薄膜原料としては,III族原料として固体
In12,固体Ga10,V族原料としてアルシン(A
sH3)16,ホスフイン(PH3)17を用いる。
As the thin film raw material, solid In12 and solid Ga10 as group III raw materials, and arsine (A) as group V raw material.
sH 3 ) 16 and phosphine (PH 3 ) 17 are used.

【0024】ヘテロ構造薄膜を成長するInP基板20
は,真空雰囲気に保持された成長室13内に置かれる。
固体In12,固体Ga10は固体ソース分子線セル1
1,9に充填されており,任意温度に加熱し蒸発させた
後InP基板20に供給する。アルシン16,ホスフイ
ン17はそれぞれボンベ18,19に充填されている。
アルシン16及びホスフイン17はそれぞれバルブ16
a,バルブ17aを介してクラッキングセル6に導入さ
れ,クラッキングセル6内にて任意温度に加熱し,分解
された後,As2,P2の形態でInP基板20に供給す
る。各々の固体ソース分子線セル9,11及びクラッキ
ングセル6には,シャッタ6a,9a,11aがそれぞ
れ具備されている。
InP substrate 20 for growing a heterostructure thin film
Are placed in a growth chamber 13 maintained in a vacuum atmosphere.
Solid source In12 and solid Ga10 are solid source molecular beam cells 1
1 and 9 are filled, heated to an arbitrary temperature and evaporated, and then supplied to the InP substrate 20. Arsine 16 and phosphine 17 are filled in cylinders 18 and 19, respectively.
Arsine 16 and phosphine 17 are valve 16 respectively
a, introduced into the cracking cell 6 via the valve 17a, heated to an arbitrary temperature in the cracking cell 6 and decomposed, and then supplied to the InP substrate 20 in the form of As 2 and P 2 . Each solid source molecular beam cell 9, 11 and cracking cell 6 is provided with a shutter 6a, 9a, 11a, respectively.

【0025】図2のGSMBE装置を用いて,図1に示
した基板温度変更チャートに従ったInGaAs薄膜と
InP薄膜から構成されるヘテロ構造薄膜の形成は以下
の手順で行なわれる。
Using the GSMBE apparatus of FIG. 2, a heterostructure thin film composed of an InGaAs thin film and an InP thin film according to the substrate temperature change chart shown in FIG. 1 is formed by the following procedure.

【0026】まずバルブ17a,シャッタ6aを開けI
nP基板20にP2を照射しながらInP基板20を5
00℃に加熱し,InP基板20上の酸化物を除去す
る。この後InP基板20の温度をInGaAs薄膜の
成長温度である460℃に変更してしばらくの間保持す
る。この後バルブ17aを閉め,バルブ16aを開けA
2をInP基板20に照射し,次いでシャッタ9a,
11aを開けIn,GaをInP基板20に照射し,I
nGaAs薄膜の成長を開始する。成長中の薄膜表面の
温度は,InP基板20に対向する位置に透過窓15を
介して置かれた放射温度計14で測定する。尚上記の5
00℃,460℃の値は放射温度計14を用いて,各セ
ルのシャッタ6a,9a,11aを閉じた時に測定した
InP基板20表面の温度の値であり,以降特別に説明
しない限り,温度の値は放射温度計14で測定した値を
示している。放射温度計14を用いてInP基板20ま
たは薄膜の表面の温度を測定する際に,各セルのシャッ
タ6a,9a,11aを閉じる理由は以下による。一般
に放射温度計を用いて被測定物,例えば半導体の温度を
測定する場合,放射温度計の誤動作(測定誤差)を避け
るために,半導体表面に反射する蛍光灯またはフィラメ
ント電球等の背光源を遮蔽する手段が必要となる。GS
MBEの場合高温に加熱し赤熱したセルが上記の背光源
となるため,正確な薄膜表面の温度を測定するために
は,各セルのシャッタ6a,9a,11aを閉じて行わ
なければならない。成長中のInGaAsの薄膜の表面
温度は,InGaAsの輻射吸収率がInPと異なるた
めセルから放射される輻射熱をInPより効率良く吸収
し,成長の進行による膜厚の増加に伴い上昇すること
が,これまでの実験から判明している。一般にGSMB
E法において,高品質なInGaAs薄膜は,その成長
温度が450℃から510℃の範囲で成長した時に得ら
れる。よって成長中のInGaAs薄膜表面の温度が,
その成長中常に上記温度範囲内にあるように温度調節器
4に対してあらかじめ温度調節器4に入力されている基
板温度設定値を制御することで,高品質なInGaAs
薄膜が得られる。本実施例ではInGaAs薄膜の表面
温度が480℃に達した時点で,温度調節器4の基板温
度設定値を成長初期温度より10℃低い値に変更した。
設定値変更後のInGaAs薄膜の表面温度は,一時4
62℃まで低下し,再びInGaAs薄膜の成長の進行
に伴い上昇した。温度調節器4の成長初期温度を変更す
る指針としたInGaAs薄膜の表面温度480℃は,
InGaAs薄膜に対してドーパントとなる元素,例え
ばシリコン,ベリリウムをドーピングしながら成長して
いる場合においても,そのドーパントが内部拡散しない
温度である。上記手順をInGaAs薄膜の成長の間繰
り返して行なうことによって,InGaAs薄膜の表面
温度は460℃以上480℃以下に制御される。上記工
程を採りながら所定時間InGaAs薄膜の成長を行な
った後,シャッタ9a,11aを閉めInGaAsの成
長を停止する。この後バルブ16aを閉め,バルブ17
aを開けてP2をInP基板20に向けて照射し,次い
でシャッタ11aを開けInP薄膜の成長を所定時間行
なう。InP薄膜の表面温度も,InGaAs薄膜の成
長と同様に成長の進行に伴う膜厚の増加に従い上昇す
る。本実施例では,InP薄膜の表面温度は最高473
℃まで上昇した。この温度は前述した高品質なInP薄
膜が得られる成長温度である450℃から490℃の範
囲内にあるため,InP薄膜の成長の間に温度調節器4
の基板温度の設定値の変更は行なっていない。
First, the valve 17a and the shutter 6a are opened I
While irradiating the nP substrate 20 with P 2 ,
The oxide on the InP substrate 20 is removed by heating to 00 ° C. After that, the temperature of the InP substrate 20 is changed to 460 ° C., which is the growth temperature of the InGaAs thin film, and the temperature is maintained for a while. After this, the valve 17a is closed and the valve 16a is opened A
The InP substrate 20 is irradiated with s 2 and then the shutters 9a,
11a is opened, In and Ga are irradiated on the InP substrate 20, and I
The growth of the nGaAs thin film is started. The temperature of the surface of the growing thin film is measured by a radiation thermometer 14 placed at a position facing the InP substrate 20 via a transmission window 15. The above 5
The values of 00 ° C. and 460 ° C. are the values of the temperature of the surface of the InP substrate 20 measured by using the radiation thermometer 14 when the shutters 6a, 9a, 11a of the respective cells are closed. The value of indicates the value measured by the radiation thermometer 14. The reason for closing the shutters 6a, 9a and 11a of each cell when measuring the temperature of the surface of the InP substrate 20 or the thin film using the radiation thermometer 14 is as follows. Generally, when measuring the temperature of an object to be measured, such as a semiconductor, using a radiation thermometer, in order to avoid malfunction of the radiation thermometer (measurement error), the back light source such as a fluorescent lamp or filament bulb that reflects on the semiconductor surface is shielded. Means are needed. GS
In the case of MBE, the cells that are heated to a high temperature and red-heated serve as the back light source. Therefore, in order to accurately measure the temperature of the thin film surface, the shutters 6a, 9a and 11a of the cells must be closed. The surface temperature of a growing InGaAs thin film absorbs radiant heat emitted from the cell more efficiently than InP because the radiant absorption coefficient of InGaAs is different from InP, and rises as the film thickness increases as the growth progresses. It is known from previous experiments. Generally GSMB
In the E method, a high quality InGaAs thin film is obtained when the growth temperature is grown in the range of 450 ° C to 510 ° C. Therefore, the temperature of the InGaAs thin film surface during growth is
By controlling the substrate temperature set value input in advance to the temperature controller 4 so that it is always within the above temperature range during the growth, high-quality InGaAs
A thin film is obtained. In this example, when the surface temperature of the InGaAs thin film reached 480 ° C., the substrate temperature set value of the temperature controller 4 was changed to a value 10 ° C. lower than the initial growth temperature.
The surface temperature of the InGaAs thin film after changing the set value is 4
The temperature decreased to 62 ° C. and increased again as the growth of the InGaAs thin film proceeded. The surface temperature of the InGaAs thin film of 480 ° C., which is a guide for changing the initial growth temperature of the temperature controller 4, is
The temperature is a temperature at which the dopant does not diffuse internally even when the InGaAs thin film is grown while being doped with an element serving as a dopant, for example, silicon or beryllium. By repeating the above procedure during the growth of the InGaAs thin film, the surface temperature of the InGaAs thin film is controlled to 460 ° C or higher and 480 ° C or lower. After growing the InGaAs thin film for a predetermined time while taking the above steps, the shutters 9a and 11a are closed to stop the growth of InGaAs. After this, the valve 16a is closed and the valve 17
A is opened and P 2 is irradiated toward the InP substrate 20, and then the shutter 11a is opened to grow an InP thin film for a predetermined time. The surface temperature of the InP thin film also rises as the thickness of the InGaAs thin film increases as the growth proceeds, similar to the growth of the InGaAs thin film. In this embodiment, the surface temperature of the InP thin film is 473 at maximum.
It rose to ℃. Since this temperature is within the range of 450 ° C. to 490 ° C., which is the growth temperature at which the above-mentioned high quality InP thin film can be obtained, the temperature controller 4 is used during the growth of the InP thin film.
The setting value of the substrate temperature was not changed.

【0027】図3は本発明の第2の実施例の成長過程に
おける基板温度設定値の変更チャートを示す。InGa
As薄膜の成長を開始するまでは,第1の実施例と同一
の工程を採る。成長中のInGaAs薄膜の表面温度の
上昇率は,これまでの実験結果の統計から,InGaA
s薄膜の膜厚が20nmから30nm増加するに従い約
1℃上昇することが判明している。つまりInGaAs
の薄膜が2nmまたは3nm形成される時間内に,温度
調節器4の基板温度設定値を0.1℃ずつ低下しながら
InGaAs薄膜の成長を行なうことで,その成長中の
薄膜表面の温度は成長開始時の温度に保持することが可
能となる。本実施例では,InGaAs薄膜の成長速度
は1分当り16.8nmであったこと,またInGaA
s薄膜の表面温度の上昇率が平均してその膜厚が25n
m増加するに当り1℃上昇するとして,1分当り0.7
℃の低下率で温度調節器4の基板温度設定値の変更を行
なった。InGaAs薄膜の成長の間,上記低下率で温
度調節器4の基板温度設定値の変更を継続して行なっ
た。InGaAs薄膜の形成後の工程は第1の実施例と
同一の工程を採る。
FIG. 3 shows a change chart of the substrate temperature set value in the growth process of the second embodiment of the present invention. InGa
The same steps as in the first embodiment are taken until the growth of the As thin film is started. The rate of increase in the surface temperature of the growing InGaAs thin film was calculated from the statistics of the experimental results obtained so far.
It has been found that the film thickness of the s thin film increases by about 1 ° C. as the film thickness increases from 20 nm to 30 nm. In other words InGaAs
By growing the InGaAs thin film while lowering the substrate temperature setting value of the temperature controller 4 by 0.1 ° C. within the time when the thin film of 2 nm or 3 nm is formed, the temperature of the thin film surface during the growth is increased. It is possible to maintain the temperature at the start. In this example, the growth rate of the InGaAs thin film was 16.8 nm per minute, and InGaA
s The rate of rise of the surface temperature of the thin film is 25 n on average
As the temperature increases by 1 ° C per m, 0.7 per minute
The substrate temperature set value of the temperature controller 4 was changed at a rate of decrease of ° C. During the growth of the InGaAs thin film, the substrate temperature set value of the temperature controller 4 was continuously changed at the above-mentioned reduction rate. The steps after the formation of the InGaAs thin film are the same as those in the first embodiment.

【0028】図4は本発明の第3の実施例の成長過程に
おける基板温度の設定値変更チャートを示す。InGa
As薄膜の成長を開始するまでは,第1の実施例と同一
の工程を採る。InGaAs薄膜の成長の間は基板温度
の変更は行なわず,成長初期温度で所定時間行なう。I
nGaAs薄膜の成長後の薄膜の表面温度は,508℃
であった。この後シャッタ9a,11aを閉めInGa
Asの成長を停止する。この時薄膜表面の温度が460
℃以上480℃以下となるように温度調節器4の基板温
度設定値を変更する。この間InP基板20に向けての
As2の照射は継続されて行なわれる。上記手順を繰り
返して薄膜表面の温度を460℃以上480℃以下に保
持した時点でバルブ16aを閉め,バルブ17aを開け
てP2をInP基板20に向けて照射し,次いでシャッ
タ11aを開けInP薄膜の成長を所定時間行なう。本
実施例によれば,温度調節器4の基板温度設定値の変更
は,成長中断中のInGaAs薄膜とInP薄膜の界面
で行なわれるため,界面の平坦化の面でも大きな効果が
得られる。
FIG. 4 is a set temperature change chart of the substrate temperature in the growth process of the third embodiment of the present invention. InGa
The same steps as in the first embodiment are taken until the growth of the As thin film is started. The substrate temperature is not changed during the growth of the InGaAs thin film, but is performed at the initial growth temperature for a predetermined time. I
The surface temperature of the nGaAs thin film after growth is 508 ° C.
Met. After that, the shutters 9a and 11a are closed and InGa
Stop the growth of As. At this time, the temperature of the thin film surface is 460
The substrate temperature set value of the temperature controller 4 is changed so that the temperature becomes higher than or equal to 480 ° C. During this period, the As 2 irradiation toward the InP substrate 20 is continued. When the temperature of the thin film surface is maintained at 460 ° C. or higher and 480 ° C. or lower by repeating the above procedure, the valve 16a is closed, the valve 17a is opened, P 2 is irradiated toward the InP substrate 20, and then the shutter 11a is opened to open the InP thin film. Growth for a predetermined time. According to the present embodiment, since the substrate temperature setting value of the temperature controller 4 is changed at the interface between the InGaAs thin film and the InP thin film during the growth interruption, a great effect can be obtained in terms of flattening the interface.

【0029】図8は本発明によるガスソースMBE装置
の第2の実施例を示している。図8において図2のガス
ソースMBE装置と同一符号は同等部分を示す。
FIG. 8 shows a second embodiment of the gas source MBE device according to the present invention. 8, the same reference numerals as those of the gas source MBE device of FIG. 2 indicate the same parts.

【0030】放射温度計14用の透過窓15には,シャ
ッタ15aを設けており,透過窓15への薄膜原料の蒸
着による曇りを防止している。各シャッタ6a,9a,
11a,15aは,シャッタ駆動系21によってその開
閉動作が制御される。温度制御系22は,放射温度計1
4及び温度調節器4と接続している。この温度制御系2
2には,複数の所望の薄膜の放射率が記憶されており,
随時放射温度計14への任意の所望の薄膜の放射率の設
定を可能としている。図8のGSMBE装置を用いた第
1の実施例に従う薄膜表面温度の制御は,以下の手順で
行われる。尚,他の第2,第3の実施例に基いた薄膜表
面温度の制御も以下に述べる同様の手順で行われる。
The transmission window 15 for the radiation thermometer 14 is provided with a shutter 15a to prevent fogging due to vapor deposition of the thin film raw material on the transmission window 15. Each shutter 6a, 9a,
The shutter drive system 21 controls the opening / closing operation of the shutters 11a and 15a. The temperature control system 22 is a radiation thermometer 1
4 and the temperature controller 4. This temperature control system 2
2 stores the emissivity of a plurality of desired thin films,
It is possible to set the emissivity of any desired thin film to the radiation thermometer 14 at any time. Control of the thin film surface temperature according to the first embodiment using the GSMBE apparatus of FIG. 8 is performed by the following procedure. Incidentally, the control of the thin film surface temperature based on the other second and third embodiments is also performed by the same procedure as described below.

【0031】まず放射温度計14に,温度制御系22か
らInP基板20の放射率を設定する。この後,InG
aAs薄膜を成長するまでは前述した工程を採る。In
GaAs薄膜の成長と同時に,またはその前後に,放射
温度計14の放射率を温度制御系22からInGaAs
薄膜の放射率に変更する。InGaAs薄膜成長中のI
nGaAs薄膜表面の温度の測定は,シャッタ制御系2
1によって,放射温度計14用の透過窓15のシャッタ
15aを開けると同時に,セルのシャッタ6a,9a,
11aを,III族原料であるIn12,Ga10のセル
シャッタ9a,11a,次いでV族原料供給用のクラッ
キングセル6のシャッタ6aの順に閉じ,任意時間この
状態を保持している間に放射温度計14でInGaAs
薄膜表面の温度の測定を行う。放射温度計14で測定し
たInGaAs薄膜表面の温度は,随時温度制御系22
に送られる。任意時間の間InGaAs薄膜表面温度の
測定を行った後,シャッタ制御系21によって再び透過
窓15のシャッタ15aは閉じられ,これと同期してV
族原料用のクラッキングセル6のシャッタ6a,次いで
III族原料であるIn12,Ga10用のセルシャッタ
9a,11aの順で開けられる。InGaAs薄膜表面
温度の測定時間は,前述したように任意時間として問題
は無いが,その間に進行するInGaAs薄膜表面から
の砒素の再蒸発がInGaAs薄膜の品質に充分影響を
与えない時間とするのが望ましい。本実施例において,
InGaAs薄膜表面温度の測定時間は5秒としてい
る。InGaAs薄膜の成長の間上記手順を複数回繰返
し,成長中のInGaAs薄膜表面温度の測定を行い,
InGaAs薄膜表面温度が480℃に達した時点で,
InGaAs薄膜表面温度が460℃以上480℃以下
の範囲になるように,温度制御系22によって温度調節
器4の基板温度設定値の変更を行う。上記手順を繰返し
行うことで,所定時間InGaAs薄膜の成長の間In
GaAs薄膜の表面温度は,正確に460℃以上480
℃以下の一定の範囲に極めて高精度に制御される。この
後前述した工程を採り,続けてInP薄膜の成長を開始
する。InP薄膜の成長を開始すると同時に,またはそ
の前後に,温度制御系22から放射温度計14に設定さ
れているInGaAs薄膜の放射率をInP薄膜の放射
率に設定変更する。InP薄膜の成長の間,InGaA
s薄膜表面温度の測定と同様の手順で成長中のInP薄
膜表面温度の測定を行う。
First, the emissivity of the InP substrate 20 is set in the radiation thermometer 14 from the temperature control system 22. After this, InG
The above steps are taken until the aAs thin film is grown. In
Simultaneously with or before the growth of the GaAs thin film, the emissivity of the radiation thermometer 14 is adjusted from the temperature control system 22 to InGaAs.
Change to the emissivity of the thin film. I during InGaAs thin film growth
The temperature of the nGaAs thin film surface is measured by the shutter control system 2
1, the shutter 15a of the transmission window 15 for the radiation thermometer 14 is opened, and at the same time, the shutters 6a, 9a of the cell,
11a is closed in the order of the cell shutters 9a and 11a of In12 and Ga10 which are group III raw materials, and then the shutter 6a of the cracking cell 6 for supplying the group V raw material, and the radiation thermometer 14 while keeping this state for an arbitrary time. InGaAs
The temperature of the thin film surface is measured. The temperature of the surface of the InGaAs thin film measured by the radiation thermometer 14 is measured by the temperature control system 22 as needed.
Sent to. After measuring the surface temperature of the InGaAs thin film for an arbitrary time, the shutter 15a of the transmission window 15 is closed again by the shutter control system 21, and V is synchronized with this.
Shutter 6a of cracking cell 6 for group materials, then
The cell shutters 9a and 11a for In12 and Ga10, which are group III raw materials, are opened in this order. As described above, the measurement time of the surface temperature of the InGaAs thin film is arbitrary, but there is no problem, but the time during which the re-evaporation of arsenic from the surface of the InGaAs thin film does not affect the quality of the InGaAs thin film sufficiently. desirable. In this embodiment,
The measurement time of the surface temperature of the InGaAs thin film is 5 seconds. The above procedure is repeated multiple times during the growth of the InGaAs thin film to measure the surface temperature of the InGaAs thin film during the growth.
When the surface temperature of the InGaAs thin film reaches 480 ° C,
The temperature control system 22 changes the substrate temperature set value of the temperature controller 4 so that the surface temperature of the InGaAs thin film is in the range of 460 ° C. or higher and 480 ° C. or lower. By repeating the above procedure, the In
The surface temperature of the GaAs thin film is exactly 460 ° C or higher and 480
Controlled within a certain range below ℃ with extremely high precision. After that, the above-mentioned steps are taken to continue the growth of the InP thin film. Simultaneously with or before the growth of the InP thin film, the emissivity of the InGaAs thin film set in the radiation thermometer 14 from the temperature control system 22 is changed to the emissivity of the InP thin film. During the growth of InP thin film, InGaA
s The InP thin film surface temperature during growth is measured by the same procedure as the thin film surface temperature measurement.

【0032】尚,本実施例では,放射温度計14と制御
用熱電対5の両方を併用して薄膜表面温度の制御を行っ
ているが,放射温度計14のみを使用して上記薄膜表面
温度の制御を行っても良い。その際以下の工夫が必要と
なる。一般に放射温度計14はその温度測定範囲が限定
されている。本実施例で使用した放射温度計14の測定
下限値は400℃である。このため基板を前述した温度
に到達させるまでに加熱する際に,電源3から熱源2に
供給する電力量を適切に制御するなどで,急激な基板の
温度上昇を抑制する手順が必要となる。
Although the thin film surface temperature is controlled by using both the radiation thermometer 14 and the control thermocouple 5 in this embodiment, the radiation thin film surface temperature is controlled by using only the radiation thermometer 14. May be controlled. In that case, the following measures are necessary. Generally, the radiation thermometer 14 has a limited temperature measurement range. The lower limit of measurement of the radiation thermometer 14 used in this example is 400 ° C. For this reason, when heating the substrate until it reaches the above-mentioned temperature, it is necessary to appropriately control the amount of electric power supplied from the power source 3 to the heat source 2 to suppress a rapid temperature rise of the substrate.

【0033】図5は図2のGSMBE装置を用いて,第
1の実施例に基いてInP基板上に成長したInGaA
s薄膜とInPとから成るヘテロ構造薄膜において,I
nP薄膜の表面をノマルスキ微分干渉顕微鏡で観察した
スケッチである。従来問題となっていた,成長中の薄膜
表面温度の異常上昇による燐の欠乏に起因した表面欠陥
は全く現われておらず,表面のモホロジも極めて良い状
態にあることが分かる。
FIG. 5 shows InGaA grown on an InP substrate according to the first embodiment using the GSMBE apparatus of FIG.
In a heterostructure thin film composed of an s thin film and InP, I
It is a sketch of observing the surface of the nP thin film with a Nomarski differential interference microscope. It can be seen that the surface morphology, which has been a problem in the past, due to the phosphorus deficiency due to the abnormal increase in the surface temperature of the growing thin film does not appear at all, and the surface morphology is in an extremely good state.

【0034】図6は同じヘテロ構造薄膜において,In
P薄膜のみを塩酸系エッチャントで選択除去し,InG
aAs薄膜表面をノマルスキ微分干渉顕微鏡で観察した
スケッチである。InGaAs薄膜表面もInP薄膜の
表面と同様に表面欠陥は全く見られず,良好なモホロジ
が得られていることがわかる。
FIG. 6 shows that in the same heterostructure thin film, In
Selectively remove only P thin film with hydrochloric acid etchant
It is a sketch of observing the surface of an aAs thin film with a Nomarski differential interference microscope. As with the surface of the InP thin film, no surface defects were observed on the surface of the InGaAs thin film, indicating that good morphology was obtained.

【0035】図7は図2のGSMBE装置を用いて,第
2の実施例に基いて成長した,アンドープInGaAs
薄膜とベリリウムを5×1019/cm3ドーピングした
InGaAs薄膜を交互に積層した超格子構造の,深さ
方向の元素の分布状態を2次イオン質量分析計で測定し
た結果である。従来方法に基いて成長した同一構造の超
格子構造で生じていた,ベリリウムをドープしたInG
aAs薄膜層からアンドープInGaAs薄膜層へのベ
リリウムの拡散は全く生じておらず,優れたドーピング
プロファイルが得られている。
FIG. 7 shows undoped InGaAs grown according to the second embodiment by using the GSMBE apparatus shown in FIG.
It is the result of measuring the distribution state of the element in the depth direction of the superlattice structure in which the thin film and the InGaAs thin film doped with 5 × 10 19 / cm 3 of beryllium were alternately stacked by the secondary ion mass spectrometer. Beryllium-doped InG produced in the same-structure superlattice structure grown by the conventional method
No beryllium was diffused from the aAs thin film layer to the undoped InGaAs thin film layer, and an excellent doping profile was obtained.

【0036】以上説明してきたように,本発明によれ
ば,薄膜,特に輻射吸収率の異なる複数の薄膜から成る
ヘテロ構造薄膜の形成において,その成長中の薄膜表面
の温度は正確に常に一定にまたは一定範囲内に高精度に
保持されるため,成長中の薄膜表面温度の異常上昇によ
るV族元素の欠乏に起因した表面欠陥またはその構成元
素の内部拡散が生じること無く,高品質なヘテロ構造薄
膜が容易に得られることは明白であり,超格子ヘテロ構
造デバイス,例えばHBTの作成が容易と成る。
As described above, according to the present invention, in the formation of a thin film, particularly a heterostructure thin film composed of a plurality of thin films having different radiation absorptances, the temperature of the thin film surface during the growth is always kept exactly constant. Alternatively, since it is maintained within a certain range with high accuracy, a high-quality heterostructure can be obtained without causing surface defects or internal diffusion of its constituent elements due to the deficiency of group V elements due to an abnormal rise in the surface temperature of the thin film during growth. Clearly, thin films are readily obtained, facilitating the fabrication of superlattice heterostructure devices such as HBTs.

【0037】尚本発明で述べてきた複数の実施例を組み
合わせた手法で,基板温度の設定値の変更を行なっても
同様の効果が得られることは言うまでもない。また本実
施例では,説明上特にInP基板上のInGaAs薄膜
とInP薄膜からなるヘテロ構造薄膜の形成についての
み述べているが,他の材料系,例えばIII−V族化合物
半導体であればGaAs,InGaP,II−VI族化合物
半導体であればZnS,ZnSe等の薄膜またはそれら
の組合せから成るヘテロ構造薄膜の成長の際ももちろん
適用可能であり,その際本実施例と同様の効果が得られ
ることは当然である。
Needless to say, the same effect can be obtained even if the set value of the substrate temperature is changed by a method combining a plurality of embodiments described in the present invention. Further, in this embodiment, only the formation of the heterostructure thin film composed of the InGaAs thin film and the InP thin film on the InP substrate is described for the sake of description, but other material systems such as GaAs and InGaP for III-V group compound semiconductors are described. , II-VI group compound semiconductors can be applied to the growth of a thin film of ZnS, ZnSe, etc., or a heterostructure thin film composed of a combination thereof, and the same effect as that of this embodiment can be obtained. Of course.

【0038】[0038]

【発明の効果】本発明による薄膜形成方法による薄膜,
特にヘテロ構造薄膜の形成方法を採れば,欠陥及び内部
拡散の無い高品質なヘテロ構造薄膜を容易に得ることが
可能であり,超格子ヘテロ構造デバイス,例えばHBT
等の高性能デバイスの作成が容易となる。
The thin film formed by the thin film forming method according to the present invention,
In particular, if a method for forming a heterostructure thin film is adopted, it is possible to easily obtain a high quality heterostructure thin film without defects and internal diffusion.
It becomes easy to create high-performance devices such as.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の第1の実施例を示す薄膜成長中の基板
温度設定値の変更チャート図である。
FIG. 1 is a chart for changing a substrate temperature set value during thin film growth showing a first embodiment of the present invention.

【図2】本発明の実施例で用いたガスソースMBE装置
の構成図である。
FIG. 2 is a configuration diagram of a gas source MBE device used in an example of the present invention.

【図3】本発明の第2の実施例を示す薄膜成長中の基板
温度設定値の変更チャート図である。
FIG. 3 is a chart of changing a substrate temperature set value during thin film growth showing a second embodiment of the present invention.

【図4】本発明の第3の実施例を示す薄膜成長中の基板
温度設定値の変更チャート図である。
FIG. 4 is a chart for changing a substrate temperature set value during thin film growth showing a third embodiment of the present invention.

【図5】本発明に従い成長したInGaAs/InPヘ
テロ構造薄膜のInP薄膜表面のノマルスキ微分干渉顕
微鏡観察のスケッチ図である。
FIG. 5 is a sketch diagram of Nomarski differential interference microscope observation of the InP thin film surface of the InGaAs / InP heterostructure thin film grown according to the present invention.

【図6】本発明に従い成長したInGaAs/InPヘ
テロ構造薄膜のInGaAs薄膜のノマルスキ微分干渉
顕微鏡観察のスケッチ図である。
FIG. 6 is a sketch drawing of Nomarski differential interference microscope observation of an InGaAs thin film of an InGaAs / InP heterostructure thin film grown according to the present invention.

【図7】本発明に従い成長したベリリウムドープInG
aAs/InGaAs超格子構造の深さ方向の2次イオ
ン質量分析結果を示す図である。
FIG. 7: Beryllium-doped InG grown according to the present invention
It is a figure which shows the secondary ion mass spectrometry result of the depth direction of an aAs / InGaAs superlattice structure.

【図8】本発明の実施例で用いた第2のガスソースMB
E装置の構成図である。
FIG. 8 is a second gas source MB used in the example of the present invention.
It is a block diagram of an E apparatus.

【図9】ガスソースMBE装置の主要部の配置図であ
る。
FIG. 9 is a layout view of a main part of a gas source MBE device.

【図10】従来方法に従い成長したInGaAs/In
Pヘテロ構造薄膜の成長中の温度変化
FIG. 10: InGaAs / In grown according to the conventional method
Temperature change during growth of P heterostructure thin film

【図11】従来方法に従い成長したInGaAs/In
Pヘテロ構造薄膜のInP薄膜のノマルスキ微分干渉顕
微鏡観察のスケッチ図
FIG. 11: InGaAs / In grown according to the conventional method
Sketch drawing of Nomarski differential interference microscope observation of InP thin film of P heterostructure thin film

【図12】従来方法に従い成長したInGaAs/In
Pヘテロ構造薄膜のInGaAs薄膜のノマルスキ微分
干渉顕微鏡観察のスケッチ図である。
FIG. 12: InGaAs / In grown according to the conventional method
It is a sketch drawing of Nomarski differential interference microscope observation of the InGaAs thin film of P heterostructure thin film.

【図13】従来方法に従い成長したベリリウムドープI
nGaAs/InGaAs超格子構造の深さ方向の2次
イオン質量分析結果を示す図である。
FIG. 13: Beryllium-doped I grown according to conventional method
It is a figure which shows the secondary ion mass spectrometry result of the nGaAs / InGaAs superlattice structure of the depth direction.

【符号の説明】[Explanation of symbols]

1…基板,2…熱源,3…電源,4…温度調節器,5…
制御用熱電対,6…クラッキングセル,6a…シャッ
タ,7…固体ソース分子線セル,7a…シャッタ,8…
固体III,9…固体ソース分子線セル,9a…シャッ
タ,10…固体Ga,11…固体ソース分子線セル,1
1a…シャッタ,12…固体In,13…成長室,14
…放射温度計,15…透過窓,15a…透過窓シャッタ
16…アルシン,16a…バルブ,17…ホスフイン,
17a…バルブ,18…ボンベ,19…ボンベ,20…
InP基板,21…シャッタ駆動系,22…温度制御
系。
1 ... Substrate, 2 ... Heat source, 3 ... Power supply, 4 ... Temperature controller, 5 ...
Control thermocouple, 6 ... Cracking cell, 6a ... Shutter, 7 ... Solid source molecular beam cell, 7a ... Shutter, 8 ...
Solid III, 9 ... Solid source molecular beam cell, 9a ... Shutter, 10 ... Solid Ga, 11 ... Solid source molecular beam cell, 1
1a ... Shutter, 12 ... Solid In, 13 ... Growth chamber, 14
... radiation thermometer, 15 ... transparent window, 15a ... transparent window shutter 16 ... arsine, 16a ... valve, 17 ... phosphine,
17a ... Valve, 18 ... Cylinder, 19 ... Cylinder, 20 ...
InP substrate, 21 ... Shutter drive system, 22 ... Temperature control system.

フロントページの続き (72)発明者 大内 潔 東京都国分寺市東恋ケ窪1丁目280番地 株式会社日立製作所中央研究所内Front page continuation (72) Inventor Kiyoshi Ouchi 1-280, Higashi Koigokubo, Kokubunji, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd.

Claims (12)

【特許請求の範囲】[Claims] 【請求項1】真空雰囲気中に,任意温度に保持された基
板の表面に,元素周期律表のIV族若しくはIII−V族若
しくはII−VI族元素またはそれらの組合せから成る所望
の薄膜を,前記所望の薄膜の成分または成分を含むガス
をセルを介して供給することによって形成する薄膜形成
方法において,前記所望の薄膜の形成過程に,前記所望
の薄膜の形成を開始した後,前記基板の温度を所定の低
下率で低減する工程を少なくとも1回以上含むことを特
徴とする薄膜形成方法。
1. A desired thin film comprising a group IV element, a group III-V element or a group II-VI element of the Periodic Table of Elements or a combination thereof is formed on the surface of a substrate which is kept at an arbitrary temperature in a vacuum atmosphere. In the method for forming a thin film by supplying a component of the desired thin film or a gas containing the component through a cell, in the process of forming the desired thin film, after forming the desired thin film, A method for forming a thin film, comprising a step of reducing the temperature at a predetermined reduction rate at least once.
【請求項2】請求項1記載の基板の温度を低減する工程
が,前記所望の薄膜の形成を継続しながら漸次連続して
行なうことを特徴とする薄膜形成方法。
2. A method of forming a thin film, wherein the step of reducing the temperature of the substrate according to claim 1 is performed continuously and continuously while forming the desired thin film.
【請求項3】請求項1記載の所定の低下率が,前記基板
に形成する所望の薄膜の膜厚に対して,1℃/20nm以
上1℃/30nm以下であることを特徴とする薄膜形成方
法。
3. The thin film formation according to claim 1, wherein the predetermined reduction rate is 1 ° C./20 nm or more and 1 ° C./30 nm or less with respect to a desired thin film thickness formed on the substrate. Method.
【請求項4】請求項1記載の所望の薄膜が,前記所望の
薄膜に対してドーパントとして機能する元素をドーピン
グする薄膜であることを特徴とする薄膜形成方法。
4. A method for forming a thin film, wherein the desired thin film according to claim 1 is a thin film in which the desired thin film is doped with an element functioning as a dopant.
【請求項5】請求項1〜4記載の所望の薄膜が,前記所
望の薄膜を構成する元素に少なくとも砒素を含む薄膜で
あることを特徴とする薄膜形成方法。
5. A thin film forming method, wherein the desired thin film according to any one of claims 1 to 4 is a thin film containing at least arsenic as an element constituting the desired thin film.
【請求項6】請求項5記載の所望の薄膜がInGaAs
であることを特徴とする薄膜形成方法。
6. The desired thin film of claim 5 is InGaAs
And a thin film forming method.
【請求項7】請求項1〜4記載の所望の薄膜が,前記所
望の薄膜を構成する元素に少なくとも砒素を含む一方の
薄膜と,少なくとも燐をその構成元素に含む他方の薄膜
から成るヘテロ構造薄膜であることを特徴とする,薄膜
形成方法。
7. A heterostructure in which the desired thin film according to any one of claims 1 to 4 comprises one thin film containing at least arsenic as an element constituting the desired thin film and the other thin film containing at least phosphorus as its constituent element. A method for forming a thin film, which is a thin film.
【請求項8】請求項7記載のヘテロ構造薄膜において,
請求項1記載の薄膜形成方法を,前記ヘテロ構造薄膜の
構成元素に少なくとも砒素を含む一方の薄膜の形成にの
み行なうことを特徴とする薄膜形成方法。
8. The heterostructure thin film according to claim 7,
The thin film forming method according to claim 1, wherein the thin film forming method is performed only for forming one thin film containing at least arsenic as a constituent element of the heterostructure thin film.
【請求項9】請求項7記載のヘテロ構造薄膜が,InP
とInGaAsから構成される前記ヘテロ構造薄膜であ
ることを特徴とする薄膜形成方法。
9. The heterostructure thin film according to claim 7, wherein the heterostructure thin film is InP.
And a heterostructure thin film composed of InGaAs.
【請求項10】請求項7記載のヘテロ構造薄膜が,ヘテ
ロバイポーラトランジスタにおけるベースとエミッタ,
コレクタとベースであることを特徴とする薄膜形成方
法。
10. The heterostructure thin film according to claim 7, wherein the heterostructure thin film comprises a base and an emitter in a heterobipolar transistor,
A method for forming a thin film, which is a collector and a base.
【請求項11】真空雰囲気に保持された真空容器内に,
請求項1記載の基板と,前記基板を任意温度に加熱する
熱源と,前記熱源に電力を供給する熱源と,前記電力の
供給量を制御する温度調節器と,前記基板に対向する位
置に請求項1記載のセルと,前記セルから前記基板に供
給される前記所望の薄膜の成分または成分を含むガスを
遮断するシャッタと,透過窓と前記透過窓を介して前記
基板の表面もしくは請求項1記載の所望の薄膜の表面の
温度を測定する放射温度計を備えた薄膜形成装置におい
て,前記所望の薄膜が2種以上の異なる薄膜から成るヘ
テロ構造薄膜の形成の際に,前記放射温度計の放射率
を,前記ヘテロ構造薄膜を構成する各々の薄膜の放射率
に前記各々の薄膜の形成時にその場で設定することを特
徴とする薄膜形成装置。
11. A vacuum container maintained in a vacuum atmosphere,
The substrate according to claim 1, a heat source for heating the substrate to an arbitrary temperature, a heat source for supplying electric power to the heat source, a temperature controller for controlling the supply amount of the electric power, and a position facing the substrate. The cell according to claim 1, a shutter for blocking a gas containing the desired thin film component or a component supplied from the cell to the substrate, a transmission window, and the surface of the substrate through the transmission window or the transmission window. In a thin film forming apparatus equipped with a radiation thermometer for measuring the temperature of the surface of a desired thin film as described above, when forming a heterostructure thin film in which the desired thin film is composed of two or more different thin films, A thin film forming apparatus, wherein the emissivity is set to the emissivity of each thin film forming the heterostructure thin film in-situ when each thin film is formed.
【請求項12】請求項11記載の薄膜形成装置におい
て,前記セルから前記基板に供給される前記所望の薄膜
の成分または成分を含むガスを遮断するシャッタの開閉
動作に同期して前記所望の薄膜または前記基板の表面温
度を前記放射温度計で測定することを特徴とする薄膜形
成装置。
12. The thin film forming apparatus according to claim 11, wherein the desired thin film is synchronized with an opening / closing operation of a shutter for blocking a component of the desired thin film or a gas containing the component supplied from the cell to the substrate. Alternatively, the thin film forming apparatus is characterized in that the surface temperature of the substrate is measured by the radiation thermometer.
JP10812294A 1994-05-23 1994-05-23 Semiconductor thin film forming method and device Pending JPH07321038A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10812294A JPH07321038A (en) 1994-05-23 1994-05-23 Semiconductor thin film forming method and device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10812294A JPH07321038A (en) 1994-05-23 1994-05-23 Semiconductor thin film forming method and device

Publications (1)

Publication Number Publication Date
JPH07321038A true JPH07321038A (en) 1995-12-08

Family

ID=14476491

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10812294A Pending JPH07321038A (en) 1994-05-23 1994-05-23 Semiconductor thin film forming method and device

Country Status (1)

Country Link
JP (1) JPH07321038A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009130255A (en) * 2007-11-27 2009-06-11 Ulvac Japan Ltd Deposition device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009130255A (en) * 2007-11-27 2009-06-11 Ulvac Japan Ltd Deposition device

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