JPH07312377A - Method and device for mounting semiconductor chip - Google Patents
Method and device for mounting semiconductor chipInfo
- Publication number
- JPH07312377A JPH07312377A JP6105109A JP10510994A JPH07312377A JP H07312377 A JPH07312377 A JP H07312377A JP 6105109 A JP6105109 A JP 6105109A JP 10510994 A JP10510994 A JP 10510994A JP H07312377 A JPH07312377 A JP H07312377A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- adhesive
- substrate
- mounting
- heating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75754—Guiding structures
- H01L2224/75756—Guiding structures in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
- H01L2224/83048—Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体チップの実装方法
とそのための実装装置、特に、加熱圧着ヘッドを用いて
ガラス基板に半導体チップを実装させる方法とその装置
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of mounting a semiconductor chip and a mounting apparatus therefor, and more particularly to a method of mounting a semiconductor chip on a glass substrate using a thermocompression bonding head and the apparatus therefor.
【０００２】製品サイズの小型，薄型化に伴って、その
製品に使用する半導体チップの実装方法、例えば一対の
ガラス基板の間に液晶を充填した液晶表示パネルにパネ
ル駆動用の半導体チップを実装する方法として、チップ
・オン・グラス（ＣＯＧ）方式、即ち、接着剤を用い半
導体チップをパネル構成済みのガラス基板にフェイスダ
ウン実装する方式、が採用されるようになった。As the product size becomes smaller and thinner, a method of mounting a semiconductor chip used in the product, for example, a panel driving semiconductor chip is mounted on a liquid crystal display panel in which liquid crystal is filled between a pair of glass substrates. As a method, a chip-on-glass (COG) method, that is, a method of mounting a semiconductor chip facedown on a glass substrate having a panel structure using an adhesive has been adopted.
【０００３】[0003]
【従来の技術】図７は回路基板に半導体チップをフェイ
スダウン実装する従来方法の説明図である。2. Description of the Related Art FIG. 7 is an explanatory view of a conventional method for mounting a semiconductor chip face down on a circuit board.
【０００４】熱硬化性接着剤を用いて半導体チップを回
路基板にフェイスダウン実装する一般的な方法を示す図
７(a) 〜(c) において、多数の導体端子２を形成した回
路基板１の表面に接着剤３を貼着し、半導体チップ４に
形成した多数のバンプ５と端子２との位置合わせをした
のち、加熱圧着ヘッド６を用いて半導体チップ４のバン
プ５を回路基板１の端子２に押圧し、２０〜３０秒程度
経過し接着剤３が硬化した状態でヘッド６を除去し、半
導体チップ４のフェイスダウン実装が完了する。7 (a) to 7 (c) showing a general method for mounting a semiconductor chip face down on a circuit board using a thermosetting adhesive, a circuit board 1 having a large number of conductor terminals 2 is formed. After the adhesive 3 is attached to the surface and the numerous bumps 5 formed on the semiconductor chip 4 are aligned with the terminals 2, the bumps 5 of the semiconductor chip 4 are connected to the terminals of the circuit board 1 using the thermocompression bonding head 6. The head 6 is removed in a state where the adhesive 3 is hardened after being pressed against 2, and about 20 to 30 seconds have passed, and the face-down mounting of the semiconductor chip 4 is completed.
【０００５】かかる半導体チップ４の実装方法におい
て、半導体チップ４の本体より突出するバンプ５と、回
路基板１の半導体チップ搭載面より突出する端子２との
間の接着剤３は、半導体チップ４の押圧力によって押し
退けられ、硬化した接着剤３はバンプ５と端子２との電
気的接続を維持すると共に、回路基板１と半導体チップ
４との機械的接合を維持する。In the method of mounting the semiconductor chip 4, the adhesive 3 between the bump 5 projecting from the main body of the semiconductor chip 4 and the terminal 2 projecting from the semiconductor chip mounting surface of the circuit board 1 is the adhesive of the semiconductor chip 4. The adhesive 3 that is pushed away by the pressing force and hardened maintains the electrical connection between the bump 5 and the terminal 2, and at the same time maintains the mechanical connection between the circuit board 1 and the semiconductor chip 4.
【０００６】一般に接着剤３は熱硬化性であり、例えば
エポキシ系の熱硬化性接着剤３は１７０℃〜２００℃程
度で硬化させる。そのとき回路基板１は、半導体チップ
４→バンプ５→端子２および半導体チップ４→接着剤３
を介して加熱される。Generally, the adhesive 3 is thermosetting, and for example, the epoxy thermosetting adhesive 3 is cured at about 170 to 200 ° C. At that time, the circuit board 1 includes the semiconductor chip 4 → the bump 5 → the terminal 2 and the semiconductor chip 4 → the adhesive 3.
Is heated through.
【０００７】[0007]
【発明が解決しようとする課題】半導体チップ４の前記
実装方法において、回路基板１がガラス基板であり、そ
のガラス基板１が液晶表示パネルを構成したものである
とき、表示パネルに充填した液晶およびガラス基板１に
被着した偏向膜は２００℃以上に加熱できない。従っ
て、半導体チップ４をフェイスダウン実装するとき、ガ
ラス基板１は室温であった。In the above mounting method of the semiconductor chip 4, when the circuit board 1 is a glass substrate and the glass substrate 1 constitutes a liquid crystal display panel, liquid crystal filled in the display panel and The deflection film deposited on the glass substrate 1 cannot be heated to above 200 ° C. Therefore, when the semiconductor chip 4 was mounted face down, the glass substrate 1 was at room temperature.
【０００８】そのため、半導体チップ４を介して２０秒
〜３０秒程度の加熱で硬化する接着剤３は、半導体チッ
プ４に接する部分とガラス基板１に接する部分との間に
温度差が発生する。Therefore, the adhesive 3 which is cured by heating for about 20 to 30 seconds through the semiconductor chip 4 causes a temperature difference between the portion in contact with the semiconductor chip 4 and the portion in contact with the glass substrate 1.
【０００９】半導体チップ４の実装時における接着剤３
の温度差を示す図８において、実線Ａは半導体チップ４
に接する部分の温度上昇特性、実線Ｂはガラス基板１に
接する部分の温度上昇特性であり、３０秒程度経過し接
着剤３が硬化した時点で、基板１に接する部分の接着剤
３の温度は、半導体チップ４に接する部分より２０〜３
０℃程度低くなる。Adhesive 3 when mounting the semiconductor chip 4
In FIG. 8 showing the temperature difference of the semiconductor chip 4, the solid line A indicates the semiconductor chip 4.
The solid line B shows the temperature rise characteristic of the portion in contact with the glass substrate 1, and the solid line B shows the temperature rise characteristic of the portion in contact with the glass substrate 1. When the adhesive 3 is cured after about 30 seconds, the temperature of the adhesive 3 in the portion in contact with the substrate 1 is , 20 to 3 from the part in contact with the semiconductor chip 4
It will be about 0 ° C lower.
【００１０】接着剤３の前記温度差は、接着剤３の流動
性むら，硬化進行むらを招き、その結果図９に示す如
く、硬化を完了した接着剤３の内部に気泡７が生じ易
い。かかる気泡７は、半導体チップ４の実装に対する信
頼性を低下せしめ、加速試験時に半導体チップ４の接続
断の要因になった。The temperature difference of the adhesive 3 causes unevenness in fluidity and unevenness in curing of the adhesive 3, and as a result, as shown in FIG. 9, air bubbles 7 are easily generated inside the cured adhesive 3. The bubbles 7 deteriorated the reliability of the mounting of the semiconductor chip 4, and became a factor of disconnection of the semiconductor chip 4 during the acceleration test.
【００１１】なお、液晶表示パネルに実装する半導体チ
ップ４の大きさは、現在、３mm×１７mm〜１mm×１０mm
程度であり、小型の半導体チップ４を使用した接着剤３
の前記温度差は比較的小さくなるが、気泡７をなくすこ
とができない。The size of the semiconductor chip 4 mounted on the liquid crystal display panel is currently 3 mm × 17 mm to 1 mm × 10 mm.
Adhesive 3 using a small semiconductor chip 4
Although the temperature difference of 1 is relatively small, the bubbles 7 cannot be eliminated.
【００１２】[0012]
【課題を解決するための手段】図１は本発明の基本構成
の説明図である。熱硬化性接着剤を用いて半導体チップ
を基板にフェイスダウン実装したとき、硬化した接着剤
内に気泡が生じないようにする本発明方法は、図１
（ａ）に示す如く、半導体チップ実装用の導体端子２を
形成し半導体チップ実装用の熱硬化性接着剤３を貼着し
たガラス基板１の局部、即ち半導体チップ実装部の周辺
部を加熱体１１で加熱し、ガラス基板１を介して接着剤
３の予備加熱を行なう。FIG. 1 is an explanatory diagram of the basic configuration of the present invention. When a semiconductor chip is mounted face down on a substrate using a thermosetting adhesive, the method of the present invention for preventing bubbles from being generated in the cured adhesive is as shown in FIG.
As shown in (a), the conductor part 2 for mounting the semiconductor chip is formed, and the local portion of the glass substrate 1 on which the thermosetting adhesive 3 for mounting the semiconductor chip is adhered, that is, the peripheral part of the semiconductor chip mounting part is heated. The adhesive 3 is preheated through the glass substrate 1 by heating at 11.
【００１３】次いで、半導体チップ４に形成したバンプ
５と端子２との位置合わせを行なったのち、図１（ｂ）
に示す如く、半導体チップ４を下面に吸着し半導体チッ
プ４を接着剤３の硬化温度に加熱する加熱圧着ヘッド６
を使用し、半導体チップ４のバンプ５を基板１の端子２
に押圧する。Then, the bumps 5 formed on the semiconductor chip 4 and the terminals 2 are aligned with each other, and then, as shown in FIG.
As shown in FIG. 2, a thermocompression bonding head 6 for adsorbing the semiconductor chip 4 on the lower surface and heating the semiconductor chip 4 to the curing temperature of the adhesive 3.
Using the bumps 5 of the semiconductor chip 4 to the terminals 2 of the substrate 1.
Press on.
【００１４】そこで、接着剤３が硬化してからヘッド６
を除くと、図１（ｃ）に示す如く半導体チップ４のフェ
イスダウン実装が完了する。基板１の予備加熱体１１を
具えた半導体チップ実装装置要部の基本構成例は図１
（ｄ）に示す如く、下面に半導体チップ４を吸着する加
熱圧着ヘッド６から、上下動自在手段（例えばばね）１
２を介して基板予備加熱体１１が垂下し、加圧シリンダ
10の動作によってヘッド６を降下動させたとき、ヘッド
６によって加熱された加熱体１１が基板１に接したの
ち、ヘッド６によって加熱された半導体チップ４が接着
剤３に接するように、加熱体１１の垂下量を設定する。Therefore, after the adhesive 3 is cured, the head 6
Excluding the above, the face-down mounting of the semiconductor chip 4 is completed as shown in FIG. An example of the basic configuration of a main part of a semiconductor chip mounting apparatus including a preheater 11 for a substrate 1 is shown in FIG.
As shown in (d), a vertically movable means (for example, a spring) 1 from a thermocompression bonding head 6 for adsorbing a semiconductor chip 4 on its lower surface.
Substrate preheating body 11 hangs down via 2 and pressurizing cylinder
When the head 6 is lowered by the operation of 10, the heating body 11 heated by the head 6 contacts the substrate 1 and then the semiconductor chip 4 heated by the head 6 contacts the adhesive 3. Set the hanging amount of 11.
【００１５】[0015]
【作用】以上説明したように本発明は、加熱体１１が基
板１の半導体チップ実装部（所要局部）を加熱し、局部
加熱された基板１が接着剤３を予備加熱したのち、半導
体チップ４が接着剤３をその硬化温度に加熱する。As described above, according to the present invention, the heating body 11 heats the semiconductor chip mounting portion (required local portion) of the substrate 1, and the locally heated substrate 1 preheats the adhesive 3, and then the semiconductor chip 4 is heated. Heats the adhesive 3 to its curing temperature.
【００１６】従って、全体を加熱できない基板１例えば
液晶表示パネルを構成するガラス基板１に半導体チップ
４をフェイスダウン実装するとき、接着剤３の硬化時に
おける温度差を抑制し、従来方法において発生した気泡
７をなくすことができるようになる。Therefore, when the semiconductor chip 4 is mounted face down on the substrate 1 which cannot be heated as a whole, for example, the glass substrate 1 which constitutes the liquid crystal display panel, the temperature difference during curing of the adhesive 3 is suppressed, and the conventional method occurs. The bubbles 7 can be eliminated.
【００１７】その結果、半導体チップ４のフェイスダウ
ン実装に対し、高い信頼性を確保できるようになった。As a result, high reliability can be secured for the face-down mounting of the semiconductor chip 4.
【００１８】[0018]
【実施例】図２は本発明の第１の実施例における装置の
主要構成の説明図、図３は図２に示す装置の動作説明
図、図４は本発明の第２の実施例における装置の主要構
成の説明図、図５は本発明の第３の実施例に係わる基板
予備加熱体の説明図、図６は本発明の第４の実施例にお
ける装置の主要構成の説明図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 2 is an explanatory view of the main structure of the apparatus in the first embodiment of the present invention, FIG. 3 is an operation explanatory view of the apparatus shown in FIG. 2, and FIG. 4 is an apparatus in the second embodiment of the present invention. FIG. 5 is an explanatory view of the main structure of FIG. 5, FIG. 5 is an explanatory view of a substrate preheating body according to the third embodiment of the present invention, and FIG. 6 is an explanatory view of the main structure of an apparatus in the fourth embodiment of the present invention.
【００１９】図２において、上下動する加圧シリンダ１
０の下面にはヒータを内蔵した加熱圧着ヘッド６を装着
する。ヘッド６の下面には、半導体チップ４を真空吸着
する吸気孔（吸着手段）が開口し、ヘッド６の側面には
半導体チップ４を囲う枠型の基板予備加熱用ヘッド１４
を設ける。In FIG. 2, the pressurizing cylinder 1 moves up and down.
On the lower surface of 0, a thermocompression bonding head 6 having a built-in heater is mounted. An intake hole (suction unit) for vacuum-sucking the semiconductor chip 4 is opened on the lower surface of the head 6, and a frame-shaped substrate preheating head 14 surrounding the semiconductor chip 4 is formed on the side surface of the head 6.
To provide.
【００２０】予備加熱用ヘッド１４は、断面がほぼコ字
形即ち下向き開口が窄まるコ字形断面の枠型基体１５，
上部が基体１５のコ字形内に嵌合し下端部が基体１５よ
り突出する基板加熱体１６，基体１５のコ字形内に収納
され加熱体１６を常時下方に付勢する耐熱性弾性ゴム
（上下動自在手段）１７からなる。なお、弾性ゴム１７
は他の弾性体例えばコイルばねに置き換え可能である。The preheating head 14 has a frame-shaped base 15 having a substantially U-shaped cross section, that is, a U-shaped cross section with a downward opening narrowed.
A substrate heating body 16 whose upper part is fitted in the U-shape of the base 15 and whose lower end is projected from the base 15, and heat-resistant elastic rubber (upper and lower) which is housed in the U-shape of the base 15 and always urges the heating body 16 downward. Movable means) 17. The elastic rubber 17
Can be replaced with another elastic body such as a coil spring.
【００２１】図１の加熱体１１に相当しヒータを内蔵し
ない加熱体１６は、基体１５を介して加熱圧着ヘッド６
により、例えば１５０℃程度に加熱されるようになる。
図３において、多数の導体端子２を形成したガラス基板
１の表面に、シート状の接着剤３を貼着し（８０℃，１
秒程度）、半導体チップ４に形成した多数のバンプ５と
基板端子２との位置合わせをしたのち、加圧シリンダ１
０の降下動によって、加熱された基板加熱体１６の下面
を基板１の表面に数十秒程度だけ接触させる。A heating element 16 corresponding to the heating element 11 shown in FIG. 1 and having no built-in heater is provided with a thermocompression bonding head 6 via a substrate 15.
As a result, it is heated to, for example, about 150 ° C.
In FIG. 3, a sheet-like adhesive 3 is attached to the surface of the glass substrate 1 on which a large number of conductor terminals 2 are formed (80 ° C., 1
After aligning a large number of bumps 5 formed on the semiconductor chip 4 with the substrate terminals 2, the pressurizing cylinder 1
By the downward movement of 0, the lower surface of the heated substrate heating body 16 is brought into contact with the surface of the substrate 1 for about several tens of seconds.
【００２２】すると、加熱体１６の熱が基板１に伝播
し、基板１の半導体チップ実装部を接着剤３の硬化が著
しく進まない程度の適当な温度、例えば１２０℃程度に
加熱されるようになる。Then, the heat of the heating element 16 is propagated to the substrate 1 so that the semiconductor chip mounting portion of the substrate 1 is heated to an appropriate temperature, for example, about 120 ° C. at which curing of the adhesive 3 does not proceed significantly. Become.
【００２３】次いで、弾性ゴム１７が圧縮されるように
加圧シリンダ１０をさらに降下せしめ、バンプ５が端子
２に当接した状態で数十秒程度維持せしめ接着剤３を硬
化させたのち、ヘッド６の半導体チップ吸着力を解除し
加圧シリンダ１０を上昇させると、接着剤３内に気泡を
発生させることなく、半導体チップ４のフェイスダウン
実装が完了する。Next, the pressurizing cylinder 10 is further lowered so that the elastic rubber 17 is compressed, and the adhesive 5 is hardened by keeping the bumps 5 in contact with the terminals 2 for several tens of seconds. When the semiconductor chip suction force of 6 is released and the pressure cylinder 10 is raised, the face-down mounting of the semiconductor chip 4 is completed without generating bubbles in the adhesive 3.
【００２４】図４において、下面に半導体チップ４を真
空吸着する加熱圧着ヘッド６の側面には、図１の加熱体
１１に相当する金具（加熱体）２１が垂下する。そし
て、上下方向に長さを有する長孔２２が設けられた金具
２１は、長孔（上下動自在手段）２２が上下動自在に嵌
合するねじ２３によってヘッド６の側面に垂下し、それ
自体の重量によって長孔２２の長さだけ上下動自在であ
る。In FIG. 4, a metal fitting (heating body) 21 corresponding to the heating body 11 of FIG. 1 hangs on the side surface of the thermocompression bonding head 6 for vacuum-sucking the semiconductor chip 4 on the lower surface. Further, the metal fitting 21 provided with the elongated hole 22 having a length in the up-down direction is hung down on the side surface of the head 6 by the screw 23 into which the elongated hole (vertically movable means) 22 is vertically movably fitted, and is itself. It is vertically movable by the length of the long hole 22 depending on the weight of.
【００２５】そして、圧着ヘッド６によって加熱される
金具２１は加熱体１６と同様に、接着剤３に気泡を生じ
ない半導体チップ４のフェイスダウン実装を可能にす
る。図５において、本発明方法に係わるガラス基板局部
加熱用シート（加熱体）３１は、通電による発熱シート
を一対の絶縁フィルムで挟んだものであり、ガラス基板
１の半導体チップ実装部に搭載し使用する。The metal fitting 21 heated by the pressure bonding head 6 enables the face-down mounting of the semiconductor chip 4 without generating bubbles in the adhesive 3, like the heating body 16. In FIG. 5, a glass substrate local heating sheet (heating body) 31 according to the method of the present invention is obtained by sandwiching a heat generating sheet by energization with a pair of insulating films, and is mounted on a semiconductor chip mounting portion of the glass substrate 1 for use. To do.
【００２６】図６の実施例は、シート３１を圧着ヘッド
６に装着し、シート３１を上下動自在かつヘッド６の上
下動によって、基板１を介する接着剤３を予備加熱し、
半導体チップ４をフェイスダウン実装するようにした構
成例である。In the embodiment shown in FIG. 6, the sheet 31 is attached to the pressure bonding head 6, and the sheet 31 is vertically movable and the head 3 is vertically moved to preheat the adhesive 3 via the substrate 1.
It is a configuration example in which the semiconductor chip 4 is mounted face down.
【００２７】圧着ヘッド６の側面より垂下し上下動自在
な一対の金具２１にシート３１を装着した実施例である
図６の装置は、加熱圧着ヘッド６からの熱伝動を利用し
た加熱体１６または金具２１により基板１の貼着接着剤
３を予備加熱する方式より、接着剤３の予備加熱効率が
よい、即ち予備加熱の所要時間を短縮できる。The apparatus shown in FIG. 6, which is an embodiment in which the sheet 31 is attached to a pair of metal fittings 21 that hang down from the side surface of the crimping head 6 and can move up and down, has a heating body 16 utilizing heat transmission from the thermocompression bonding head 6 or The preheating efficiency of the adhesive 3 is better than that of the method of preheating the bonding adhesive 3 of the substrate 1 by the metal fitting 21, that is, the time required for preheating can be shortened.
【００２８】[0028]
【発明の効果】以上説明したように本発明は、基板に半
導体チップをフェイスダウン実装した接着剤の気泡をな
くし、フェイスダウン実装に対し高い信頼性を確保でき
るようにした。As described above, according to the present invention, it is possible to ensure high reliability in face-down mounting by eliminating air bubbles in the adhesive in which the semiconductor chip is face-down mounted on the substrate.
【図１】 本発明の基本構成の説明図FIG. 1 is an explanatory diagram of a basic configuration of the present invention.
【図２】 本発明の第１の実施例における装置の主要構
成の説明図FIG. 2 is an explanatory diagram of a main configuration of an apparatus according to the first embodiment of the present invention.
【図３】 図２に示す装置の動作説明図FIG. 3 is an operation explanatory diagram of the apparatus shown in FIG.
【図４】 本発明の第２の実施例における装置の主要構
成の説明図FIG. 4 is an explanatory diagram of a main configuration of an apparatus according to a second embodiment of the present invention.
【図５】 本発明の第３の実施例に係わる基板予備加熱
体の説明図FIG. 5 is an explanatory diagram of a substrate preheater according to a third embodiment of the present invention.
【図６】 本発明の第４の実施例における装置の主要構
成の説明図FIG. 6 is an explanatory diagram of a main configuration of an apparatus according to a fourth embodiment of the present invention.
【図７】 半導体チップをフェイスダウン実装する従来
方法の説明図FIG. 7 is an explanatory view of a conventional method for mounting a semiconductor chip face down.
【図８】 従来方法による半導体チップ実装時の接着剤
の温度分布図FIG. 8 is a temperature distribution diagram of an adhesive when a semiconductor chip is mounted by a conventional method.
【図９】 従来方法による接着剤内部に発生する気泡の
説明図FIG. 9 is an explanatory view of bubbles generated inside the adhesive by a conventional method.
１ 半導体チップ実装基板 ２ 導体端子 ３ 熱硬化性接着剤 ４ 半導体チップ ５ バンプ ６ 加熱圧着ヘッド １１，１６ 基板局部を加熱する加熱体 １２ 上下動自在手段 １７ 弾性ゴム（上下動自在手段） ２１ 金具（加熱体） ２２ 長孔（上下動自在手段） ３１ 加熱シート（加熱体） 1 Semiconductor Chip Mounting Board 2 Conductor Terminal 3 Thermosetting Adhesive 4 Semiconductor Chip 5 Bump 6 Thermocompression Bonding Head 11, 16 Heating Body for Heating Local Area of Board 12 Vertically Flexible Means 17 Elastic Rubber (Vertically Flexible Means) 21 Metal Fittings ( Heater 22 Long hole (means that can move up and down) 31 Heating sheet (heater)
Claims (6)
プ(4) を基板(1) にフェイスダウン実装するに際し、該
基板(1) の半導体チップ実装部に該接着剤(3) を貼着
し、該基板(1) の局部加熱によって該接着剤(3) の予備
加熱を行い、該半導体チップ(4) を該基板(1) の半導体
チップ実装部に押圧し、該接着剤(3) を硬化温度に加熱
して硬化させること、を特徴とする半導体チップの実装
方法。1. When a semiconductor chip (4) is face-down mounted on a substrate (1) using a thermosetting adhesive (3), the adhesive (3) is attached to a semiconductor chip mounting portion of the substrate (1). The adhesive (3) is preheated by locally heating the substrate (1), the semiconductor chip (4) is pressed against the semiconductor chip mounting portion of the substrate (1), and the adhesive (3) is heated to a curing temperature to be cured, which is a semiconductor chip mounting method.
チップ(4) 実装部の周囲に当接する加熱体(11,31) によ
りなされること、を特徴とする請求項１記載の半導体チ
ップの実装方法。2. The semiconductor according to claim 1, wherein the local heating of the substrate (1) is performed by a heating body (11, 31) contacting the periphery of the mounting portion of the semiconductor chip (4). Chip mounting method.
が、前記半導体チップ(4) を前記接着剤(3) の硬化温度
に加熱した該基板(1) に向けて押圧する加熱圧着ヘッド
(6) により加熱されること、を特徴とする請求項２記載
の半導体チップの実装方法。3. A heating body (11) for locally heating the substrate (1)
Is a thermocompression bonding head for pressing the semiconductor chip (4) toward the substrate (1) heated to the curing temperature of the adhesive (3).
The semiconductor chip mounting method according to claim 2, wherein the semiconductor chip is heated by (6).
が、該基板(1) を局部加熱するヒータを内蔵すること、
を特徴とする請求項２記載の半導体チップの実装方法。4. A heating body (31) for locally heating the substrate (1)
But has a built-in heater for locally heating the substrate (1),
The method for mounting a semiconductor chip according to claim 2, wherein:
着ヘッド(6) より上下動自在に垂下し、該加熱圧着ヘッ
ド(6) により加熱された前記半導体チップ(4) が前記接
着剤(3) に接するのに先立って該加熱体(11)が該基板
(1) に接すること、を特徴とする請求項２記載の半導体
チップの実装方法。5. The heating body (11) according to claim 2 hangs down vertically from the thermocompression bonding head (6), and the semiconductor chip (4) heated by the thermocompression bonding head (6) is Prior to contact with the adhesive (3), the heating body (11)
The method for mounting a semiconductor chip according to claim 2, wherein the method is in contact with (1).
プ(4) を基板(1) にフェイスダウン実装するに際し、該
接着剤(3) の硬化温度に半導体チップ(4) を加熱する前
記加熱圧着ヘッド(6) の下面には該半導体チップ(4) を
吸着する手段が設けられ、該半導体チップ(4) の前記実
装部周囲に当接する前記加熱体(11,31) が上下動自在手
段(12)を介して該加熱圧着ヘッド(6) より垂下し、該加
熱圧着ヘッド(6) に吸着した該半導体チップ(4) が該接
着剤(3) に接する前に該加熱体(11)が該基板(1) に当接
するように構成したこと、を特徴とする半導体チップの
実装装置。6. The semiconductor chip (4) is heated to the curing temperature of the adhesive (3) when mounting the semiconductor chip (4) face down on the substrate (1) using the thermosetting adhesive (3). A means for adsorbing the semiconductor chip (4) is provided on the lower surface of the thermocompression bonding head (6), and the heating element (11, 31) contacting the periphery of the mounting portion of the semiconductor chip (4) is vertically moved. Before the semiconductor chip (4) which is hung from the thermocompression bonding head (6) through the movable means (12) and adsorbed to the thermocompression bonding head (6) contacts the adhesive (3), A semiconductor chip mounting device, characterized in that (11) is configured to abut the substrate (1).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6105109A JPH07312377A (en) | 1994-05-19 | 1994-05-19 | Method and device for mounting semiconductor chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6105109A JPH07312377A (en) | 1994-05-19 | 1994-05-19 | Method and device for mounting semiconductor chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07312377A true JPH07312377A (en) | 1995-11-28 |
Family
ID=14398685
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6105109A Withdrawn JPH07312377A (en) | 1994-05-19 | 1994-05-19 | Method and device for mounting semiconductor chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07312377A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001080302A1 (en) * | 2000-04-14 | 2001-10-25 | Namics Corporation | Flip chip mounting method |
| US6666947B2 (en) * | 2001-01-31 | 2003-12-23 | Hewlett-Packard Development Company, L.P. | Method for producing an inkjet printhead element; and an inkjet printhead element |
| US6972381B2 (en) | 1998-07-01 | 2005-12-06 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board and electronic instrument |
| US7042644B2 (en) | 1998-12-10 | 2006-05-09 | Seiko Epson Corporation | Optical substrate and display device using the same |
| CN111656505A (en) * | 2018-01-25 | 2020-09-11 | 库利克和索夫工业公司 | Bonding tool for a bonding machine, bonding machine for bonding semiconductor elements and associated method |
-
1994
- 1994-05-19 JP JP6105109A patent/JPH07312377A/en not_active Withdrawn
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7198984B2 (en) | 1998-07-01 | 2007-04-03 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board and electronic instrument |
| US7868466B2 (en) | 1998-07-01 | 2011-01-11 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board and electronic instrument |
| US7560819B2 (en) | 1998-07-01 | 2009-07-14 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board and electronic instrument |
| US7332371B2 (en) | 1998-07-01 | 2008-02-19 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board and electronic instrument |
| US6972381B2 (en) | 1998-07-01 | 2005-12-06 | Seiko Epson Corporation | Semiconductor device and method of manufacture thereof, circuit board and electronic instrument |
| US6995476B2 (en) | 1998-07-01 | 2006-02-07 | Seiko Epson Corporation | Semiconductor device, circuit board and electronic instrument that include an adhesive with conductive particles therein |
| US7042644B2 (en) | 1998-12-10 | 2006-05-09 | Seiko Epson Corporation | Optical substrate and display device using the same |
| WO2001080302A1 (en) * | 2000-04-14 | 2001-10-25 | Namics Corporation | Flip chip mounting method |
| US6841415B2 (en) | 2000-04-14 | 2005-01-11 | Namics Corporation | Flip chip mounting method which avoids void formation between a semiconductor chip and a substrate |
| JP2002313841A (en) * | 2000-04-14 | 2002-10-25 | Namics Corp | Flip-chip mounting method |
| US6666947B2 (en) * | 2001-01-31 | 2003-12-23 | Hewlett-Packard Development Company, L.P. | Method for producing an inkjet printhead element; and an inkjet printhead element |
| CN111656505A (en) * | 2018-01-25 | 2020-09-11 | 库利克和索夫工业公司 | Bonding tool for a bonding machine, bonding machine for bonding semiconductor elements and associated method |
| CN111656505B (en) * | 2018-01-25 | 2024-01-30 | 库利克和索夫工业公司 | Soldering tool for soldering machine, soldering machine for soldering semiconductor element and related method |
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| A300 | Withdrawal of application because of no request for examination |
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