JPH07307539A - Circuit board and manufacture thereof - Google Patents

Circuit board and manufacture thereof

Info

Publication number
JPH07307539A
JPH07307539A JP10124394A JP10124394A JPH07307539A JP H07307539 A JPH07307539 A JP H07307539A JP 10124394 A JP10124394 A JP 10124394A JP 10124394 A JP10124394 A JP 10124394A JP H07307539 A JPH07307539 A JP H07307539A
Authority
JP
Japan
Prior art keywords
circuit wiring
circuit board
circuit
tungsten
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
JP10124394A
Other languages
Japanese (ja)
Inventor
Jun Monma
旬 門馬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP10124394A priority Critical patent/JPH07307539A/en
Publication of JPH07307539A publication Critical patent/JPH07307539A/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks

Landscapes

  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To provide a circuit board, having a the circuit wiring and excellent electric characteristics, and the manufacturing method thereof. CONSTITUTION:In a circuit substrate on which a circuit wiring is integrally formed on the surface of a ceramic board, a circuit wiring is formed by a composition consisting of a composite oxide of 1 to 50wt.% containing tungsten and rare-earth element. Also, the hole rate of the circuit wiring is set at 20wt.% or smaller.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明はセラミックス基板表面に
回路配線を一体に形成した回路基板およびその製造方法
に係り、特に回路配線が緻密であり電気的特性が優れた
回路基板およびその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board in which circuit wiring is integrally formed on the surface of a ceramic substrate and a method for manufacturing the same, and more particularly to a circuit board having fine circuit wiring and excellent electrical characteristics and a method for manufacturing the same. .

【0002】[0002]

【従来の技術】LSIパッケージ等の半導体素子を搭載
するセラミックス回路基板が、電子機器部品として広く
使用されている。近年、電子機器の小型化や機能向上に
対する要求はさらに高くなっており、これに伴って半導
体素子は集積密度の向上,多機能化,高速化,高出力化
を目指す方向に急速に進展している。特に半導体素子の
信頼性も高い水準で要求されており、半導体素子の誤動
作を防止する技術の開発も進められている。これらに対
応して半導体素子から発生する熱量はさらに増大化する
方向にあり、従来のAl2 3 基板に代わる放熱能力が
大きい窒化アルミニウム(AlN)基板を用いた半導体
素子搭載用回路基板が普及している。
2. Description of the Related Art Ceramic circuit boards on which semiconductor elements such as LSI packages are mounted are widely used as electronic equipment parts. In recent years, demands for miniaturization and improvement of functions of electronic devices have further increased, and accordingly, semiconductor elements have rapidly progressed toward the aim of improvement in integration density, multifunction, speed, and output. There is. In particular, the reliability of semiconductor elements is also required to be at a high level, and the development of technology for preventing malfunction of semiconductor elements is underway. Corresponding to these, the amount of heat generated from the semiconductor element tends to further increase, and a circuit board for mounting a semiconductor element using an aluminum nitride (AlN) substrate, which has a large heat dissipation ability in place of the conventional Al 2 O 3 substrate, is widely used. is doing.

【0003】上記AlN基板を用いた回路基板によれ
ば、AlN基板特有の高熱伝導性に加え、熱膨張率,気
密性,電気絶縁性などの諸特性において高い評価を得て
いる。
According to the circuit board using the AlN substrate, in addition to the high thermal conductivity peculiar to the AlN substrate, various characteristics such as coefficient of thermal expansion, airtightness, and electrical insulation are highly evaluated.

【0004】ところで、一般に使用されているAlN基
板は焼結温度が高いため、AlN成形体と回路配線とを
同時焼成して回路基板を製造する場合には、回路配線材
料として高融点金属であるタングステン(W)が使用さ
れている。タングステン金属は、その高融点性のため、
AlN成形体と同時に高い温度で焼結した場合において
も、回路配線の溶解による電気的短絡等の不良を生じる
ことが少ない利点がある。
By the way, since a commonly used AlN substrate has a high sintering temperature, when a circuit board is manufactured by simultaneously firing an AlN compact and a circuit wiring, a refractory metal is used as a circuit wiring material. Tungsten (W) is used. Tungsten metal, due to its high melting point,
Even when the AlN compact is sintered at a high temperature at the same time, there is an advantage that defects such as electrical short circuits due to melting of circuit wiring are less likely to occur.

【0005】しかしながらタングステン製の回路配線自
体の緻密化焼結温度はさらに高くなる難点がある。すな
わちAlNの焼結温度とタングステンの緻密化温度との
差が大きく、また緻密化の挙動も異なるため、同時焼成
して形成した回路基板の回路配線中には気孔が残存し易
い問題点があった。この問題点を解決する一手段とし
て、タングステン原料粉末の粒径を可及的に小さくし、
緻密化を促進する対応も試行されたが、同時焼成時にお
けるAlN基板と回路配線との収縮率差が大きく実用化
は殆ど不可能であった。
However, there is a problem that the densification and sintering temperature of the circuit wiring itself made of tungsten becomes higher. That is, since there is a large difference between the sintering temperature of AlN and the densification temperature of tungsten and the behavior of densification is different, there is a problem that pores tend to remain in the circuit wiring of the circuit board formed by simultaneous firing. It was As a means for solving this problem, the particle size of the tungsten raw material powder is made as small as possible,
Although attempts were made to promote densification, the difference in shrinkage ratio between the AlN substrate and the circuit wiring during simultaneous firing was large, and practical application was almost impossible.

【0006】上記のような気孔を多く含む多孔質回路配
線層は気密性が低く耐食性が低下するとともに、体積抵
抗が大きくなるなど、いずれにしても半導体素子搭載用
回路基板の耐久性および動作信頼性を低下させる難点が
ある。
The porous circuit wiring layer containing a large number of pores as described above has low airtightness, low corrosion resistance, and high volume resistance. In any case, the durability and operation reliability of the semiconductor element mounting circuit board are high. There is a drawback that reduces the sex.

【0007】上記気孔を埋める対策として、従来、回路
配線を印刷形成するためのタングステン組成物中に、A
lN成分および焼結助剤成分を予め配合しておき、回路
配線と基板との焼結収縮率を近接させるとともに、Al
Nセラミックスの二次生成相(液相)を気孔内部に浸透
させて埋め込み、結果的に緻密化を図る対策も実施され
ていた。
As a measure for filling the above-mentioned pores, A has been conventionally used in a tungsten composition for forming circuit wiring by printing.
The 1N component and the sintering aid component are preliminarily blended to bring the circuit wiring and the substrate close to each other in sintering shrinkage, and
There has also been taken a measure to make the secondary generation phase (liquid phase) of N ceramics permeate the inside of the pores and embed it, resulting in densification.

【0008】[0008]

【発明が解決しようとする課題】しかしながら上記従来
製法のように回路配線形成用組成物中にAlN成分およ
び焼結助剤成分を予め配合し発生した液相を気孔内に埋
め込む場合には、AlN原料混合体の組成や焼結条件に
よって液相発生量が異なり、完全に気孔を埋め込むこと
が困難になる問題点があった。
However, in the case where the liquid phase generated by previously blending the AlN component and the sintering aid component in the composition for forming a circuit wiring and filling the generated liquid phase in the pores as in the above-mentioned conventional method, AlN is used. The amount of liquid phase generated varies depending on the composition of the raw material mixture and the sintering conditions, and it is difficult to completely fill the pores.

【0009】また配合するAlN成分量および焼結助剤
成分量が多くなると必然的に回路配線の電気抵抗が増大
し易くなる問題点もあった。さらに焼結時に回路配線上
またはその周囲に液相成分の偏析が起こり易くなり、回
路基板製品の外観不良やめっき異常が生じ易い難点もあ
った。
There is also a problem that the electrical resistance of the circuit wiring is inevitably increased when the amount of the AlN component and the amount of the sintering aid compounded are increased. Further, segregation of the liquid phase component is likely to occur on or around the circuit wiring during sintering, and there is also a drawback that the appearance of the circuit board product or plating abnormality is likely to occur.

【0010】さらに上記気孔が消失せず回路配線層の緻
密化が不充分な場合には、不純物が回路配線層内に侵入
し易く、配線層上部にめっき処理や薄膜形成処理を実施
した後に加熱処理をした際に、めっき層や薄膜層に膨れ
不良が発生し易く、いずれにしても回路基板の製造歩留
りが大幅に低下する問題点があった。
Further, when the pores do not disappear and the circuit wiring layer is not sufficiently densified, impurities easily enter the circuit wiring layer, and after the plating process or the thin film forming process is performed on the wiring layer, heating is performed. When the treatment is performed, the plating layer or the thin film layer is likely to have a bulge defect, and in any case, the production yield of the circuit board is significantly reduced.

【0011】本発明は上記問題点を解決するためになさ
れたものであり、緻密な回路配線を有し、電気的特性が
優れた回路基板およびその製造方法を提供することを目
的とする。
The present invention has been made to solve the above problems, and an object of the present invention is to provide a circuit board having fine circuit wiring and excellent electrical characteristics, and a method for manufacturing the same.

【0012】[0012]

【課題を解決するための手段】本発明者らは上記目的を
達成するため、回路配線形成用組成物に種々の添加物を
配合して同時焼成し多種類の回路基板を作成し、各添加
物の種類および添加量が回路配線の特性に及ぼす影響を
比較検討した。その結果、タングステンおよび希土類元
素を含む複合酸化物をタングステン基材に所定量添加し
たときに、気孔の発生が少なく緻密度が高い回路配線層
が得られるという知見を得た。本発明は上記知見に基づ
いて完成されたものである。
In order to achieve the above-mentioned object, the present inventors have prepared various kinds of circuit boards by blending various additives with a composition for forming a circuit wiring and co-firing them. The effects of the type of material and the added amount on the characteristics of circuit wiring were compared and examined. As a result, it has been found that when a predetermined amount of a composite oxide containing tungsten and a rare earth element is added to a tungsten base material, a circuit wiring layer with few pores and high density can be obtained. The present invention has been completed based on the above findings.

【0013】すなわち本発明に係る回路基板は、セラミ
ックス基板表面に回路配線を一体に形成した回路基板に
おいて、タングステンおよび希土類元素を含む複合酸化
物を1〜50重量%含有し、残部タングステンから成る
組成物で上記回路配線を形成したことを特徴とする。ま
た回路配線の空孔率は20vol%以下に設定される。さら
にセラミックス基板が窒化アルミニウム基板である同時
焼成回路基板に好適である。
That is, the circuit board according to the present invention is a circuit board in which circuit wiring is integrally formed on the surface of a ceramics substrate, containing 1 to 50% by weight of a complex oxide containing tungsten and a rare earth element, and the balance being tungsten. It is characterized in that the circuit wiring is formed of a product. The porosity of the circuit wiring is set to 20 vol% or less. Furthermore, the ceramic substrate is suitable for a co-firing circuit substrate which is an aluminum nitride substrate.

【0014】また本発明に係る回路基板の製造方法は、
タングステンおよび希土類元素を含む複合酸化物粉末を
1〜50重量%含有し、残部タングステン粉末から成る
組成物に有機添加物を添加して回路配線用組成物ペース
トを調製し、この組成物ペーストをセラミックス成形体
表面に塗布して所定形状の配線パターンを形成し、しか
る後に上記セラミックス成形体と配線パターンとを同時
焼成することを特徴とする。
A method of manufacturing a circuit board according to the present invention is
1 to 50% by weight of a composite oxide powder containing tungsten and a rare earth element is added, an organic additive is added to a composition consisting of the balance tungsten powder to prepare a circuit wiring composition paste, and the composition paste is used as a ceramics. It is characterized in that it is applied to the surface of the molded body to form a wiring pattern of a predetermined shape, and thereafter the ceramic molded body and the wiring pattern are simultaneously fired.

【0015】ここで上記タングステンおよび希土類元素
を含有する複合酸化物は、回路配線の基材となるタング
ステン金属より低い融点を有し、AlN成形体の焼成温
度1780〜1880℃で窒素ガス雰囲気中でAlN成
形体と同時焼成すると、溶融し回路配線中の気孔を埋め
ると同時に窒化熱分解してタングステン金属の緻密化層
に変化する。
Here, the composite oxide containing tungsten and a rare earth element has a lower melting point than the tungsten metal that is the base material of the circuit wiring, and the firing temperature of the AlN compact is 1780 to 1880 ° C. in a nitrogen gas atmosphere. When it is co-fired with the AlN compact, it melts and fills the pores in the circuit wiring, and at the same time decomposes by nitriding and pyrolysis into a dense layer of tungsten metal.

【0016】上記複合酸化物の具体例としては、Y2
3 ・WO3 (Y2 WO6 ),Y2 3 ・3WO3 ,Yb
2 3 ・WO3 ,Eu2 3 ・3WO3 ,La2 3
3WO3 ,Sc2 3 ・3WO3 ,Pr2 3 ・W
3 ,Gd2 3 ・3WO3 ,Lu2 3 ・3WO3
Lu2 3 ・WO3 ,Dy2 3 ・3WO3 ,Tb2
3 ・3WO3 などがある。
Specific examples of the above composite oxide include Y 2 O.
3 · WO 3 (Y 2 WO 6 ), Y 2 O 3 · 3 WO 3 , Yb
2 O 3 · WO 3 , Eu 2 O 3 · 3WO 3 , La 2 O 3 ·
3WO 3 , Sc 2 O 3 · 3WO 3 , Pr 2 O 3 · W
O 3 , Gd 2 O 3 · 3WO 3 , Lu 2 O 3 · 3WO 3 ,
Lu 2 O 3 · WO 3 , Dy 2 O 3 · 3WO 3 , Tb 2 O
3 · 3WO 3, and the like.

【0017】本発明方法において使用する回路配線形成
用の組成物は、基材となるタングステン粉末に対して上
記複合酸化物を1〜50重量%配合して調製される。複
合酸化物の配合量が1重量%未満の場合には、酸化物か
ら発生する液相によって気孔を埋める作用が不充分とな
り、空孔率が20vol%以下の回路配線を形成することが
困難となる。一方、配合量が50重量%を超える過大量
となると、回路配線の電気抵抗が増大するため、複合酸
化物の配合量は上記範囲に設定されるが、より好ましく
は10〜30重量%の範囲が望ましい。
The composition for forming circuit wiring used in the method of the present invention is prepared by blending 1 to 50% by weight of the above composite oxide with respect to the tungsten powder as the base material. When the compounding amount of the composite oxide is less than 1% by weight, the action of filling the pores by the liquid phase generated from the oxide becomes insufficient, and it is difficult to form circuit wiring having a porosity of 20 vol% or less. Become. On the other hand, if the blending amount exceeds 50% by weight, the electrical resistance of the circuit wiring increases, so the blending amount of the complex oxide is set within the above range, but more preferably in the range of 10 to 30% by weight. Is desirable.

【0018】また本発明方法において使用する回路配線
用組成物ペーストは、上記組成物に結合剤ならびに分散
媒、さらに必要に応じて可塑剤などの有機物添加物を合
量で20重量%以下添加し、均一に混練して調製され
る。上記結合剤としては、エチルセルロースやアクリル
樹脂が好適であり、組成物に対して1〜5重量%程度添
加される。また分散媒としては、テレピネオールやブチ
ルカルビトールが使用される一方、可塑剤としてはジブ
チルフタレート(DBP)やジオクチルフタレート(D
OP)などが使用される。
The composition paste for circuit wiring used in the method of the present invention comprises a binder, a dispersion medium, and, if necessary, an organic additive such as a plasticizer in a total amount of 20% by weight or less. It is prepared by uniformly kneading. Ethyl cellulose or acrylic resin is suitable as the binder, and is added in an amount of about 1 to 5% by weight based on the composition. In addition, terpineol and butyl carbitol are used as the dispersion medium, while dibutyl phthalate (DBP) and dioctyl phthalate (D) are used as the plasticizer.
OP) is used.

【0019】上記のように調製した回路配線用組成物ペ
ーストを、スクリーン印刷法等を使用してセラミックス
成形体表面に塗布して所定の配線パターンを形成した
後、温度400〜800℃で1〜2時間加熱脱脂して有
機物添加物を除去し、さらに窒素ガス雰囲気等の非酸化
性雰囲気において温度1750〜1850℃で2〜5時
間同時焼成することにより、セラミックス基板表面に回
路配線を一体に形成した回路基板が形成される。
The composition paste for circuit wiring prepared as described above is applied to the surface of the ceramic molded body by a screen printing method or the like to form a predetermined wiring pattern, and then at a temperature of 400 to 800 ° C. The circuit wiring is integrally formed on the surface of the ceramic substrate by degreasing by heating for 2 hours to remove the organic additives, and by cofiring at a temperature of 1750 to 1850 ° C. for 2 to 5 hours in a non-oxidizing atmosphere such as a nitrogen gas atmosphere. The formed circuit board is formed.

【0020】また多層回路基板を製造する場合には、セ
ラミックス原料粉末と焼結助剤との混合体を泥漿化して
スラリーを調製し、このスラリーをドクターブレード法
等によってシート状またはテープ状の成形体とし、各シ
ート状成形体等の表面に、上記組成物ペーストを塗布し
て配線パターンを形成し、配線パターンを形成した複数
のシート状成形体を熱圧着して積層し、得られた積層体
を同様に脱脂後、同時焼成することにより多層回路基板
が得られる。
In the case of producing a multilayer circuit board, a mixture of ceramic raw material powder and a sintering aid is made into a slurry to prepare a slurry, and the slurry is formed into a sheet or tape by a doctor blade method or the like. As a body, the composition paste is applied to the surface of each sheet-shaped molded body or the like to form a wiring pattern, and a plurality of sheet-shaped molded bodies having the wiring pattern formed thereon are thermocompression-bonded to obtain a laminated body. The body is similarly degreased and then co-fired to obtain a multilayer circuit board.

【0021】[0021]

【作用】上記構成に係る回路基板およびその製造方法に
おいては、回路配線を形成するタングステン基材中に、
タングステンおよび希土類元素を含有する複合酸化物を
含有しており、セラミックス基板および回路配線パター
ンを焼成する温度において、上記複合酸化物が溶融し、
タングステン基材中に発生した気孔を埋めると同時に窒
化熱分解して緻密な回路配線を形成する。
In the circuit board and the method of manufacturing the same having the above structure, the tungsten base material for forming the circuit wiring is
Containing a composite oxide containing tungsten and a rare earth element, the composite oxide melts at a temperature at which the ceramic substrate and the circuit wiring pattern are fired,
The pores generated in the tungsten base material are filled, and at the same time, nitriding pyrolysis is performed to form a dense circuit wiring.

【0022】したがって、回路配線の電気抵抗が低減さ
れるため、半導体素子の動作の高速化が図れる。また回
路配線中の気孔の発生が少ないため、回路配線上部にめ
っき層や薄膜を形成した後に加熱処理を実施した場合に
おいても、めっき層や薄膜の膨れ等の不良発生が少な
く、回路基板の製造歩留りを大幅に改善することができ
る。
Therefore, since the electric resistance of the circuit wiring is reduced, the operation speed of the semiconductor element can be increased. In addition, since there are few pores in the circuit wiring, even when heat treatment is performed after forming the plating layer or thin film on the circuit wiring, there are few defects such as swelling of the plating layer or thin film The yield can be significantly improved.

【0023】[0023]

【実施例】次に本発明を以下に示す実施例に基づいて、
より具体的に説明する。
EXAMPLES Next, the present invention will be described based on the following examples.
This will be described more specifically.

【0024】実施例1〜11および比較例1 希土類元素酸化物として表1に示す酸化イットリウム
(Y2 3 )等の金属酸化物およびタングステン酸化物
としての酸化タングステン(WO3 )を用意し、タング
ステン酸化物が60mol%、希土類元素酸化物が40mol%
となるようにエタノール中で湿式混合し、得られた各混
合体を大気中で温度120℃に加熱してそれぞれ乾燥粉
末とした。
Examples 1 to 11 and Comparative Example 1 Prepare metal oxides such as yttrium oxide (Y 2 O 3 ) shown in Table 1 as rare earth element oxides and tungsten oxide (WO 3 ) as tungsten oxide, 60 mol% tungsten oxide, 40 mol% rare earth element oxide
Wet-mixing in ethanol so that the resulting mixture was heated to a temperature of 120 ° C. in the atmosphere to obtain dry powders.

【0025】次に得られた各乾燥粉末を小型のアルミナ
製るつぼ内に充填しアルミナ製の蓋を装着し、この小型
るつぼ全体を、さらに大型の箱状のアルミナ製るつぼ内
に収容し、専用の蓋を装着した。なお、乾燥粉末を充填
した小型るつぼの転倒を防止するため、小型るつぼの周
囲に耐火煉瓦を敷き詰めて小型るつぼを固定した。そし
て大型箱状るつぼを大気中にて温度1200℃に加熱
後、冷却して複合酸化物粉末をそれぞれ調製した。
Next, each of the dry powders obtained was filled in a small alumina crucible and an alumina lid was attached, and the entire small crucible was housed in a larger box-shaped alumina crucible for exclusive use. I put on the lid. In order to prevent the small crucible filled with the dry powder from falling, refractory bricks were spread around the small crucible to fix the small crucible. Then, the large box-shaped crucible was heated to a temperature of 1200 ° C. in the atmosphere, and then cooled to prepare complex oxide powders.

【0026】次に調製した各複合酸化物粉末について、
X線回折装置を使用して相の同定を行った。その結果、
いずれの複合酸化物粉末についても、表1に示すような
化学組成をそれぞれ有する単一相から構成されているこ
とが判明した。各複合酸化物粉末を粉砕して篩分けして
粒径50μm以下に粒度を揃えた。
Next, for each of the prepared composite oxide powders,
Phase identification was performed using an X-ray diffractometer. as a result,
It was found that each of the composite oxide powders was composed of a single phase having a chemical composition shown in Table 1. Each composite oxide powder was pulverized and sieved to have a uniform particle size of 50 μm or less.

【0027】さらに粒度を調整した上記複合酸化物粉末
を、平均粒径1μmのタングステン粉末中に表1に示す
含有量となるように添加配合して回路配線用組成物をそ
れぞれ調製し、さらこの組成物に対して有機高分子を3
重量%添加し、さらに分散媒としてのテレピオネールを
添加して混合体とし、この混合体を3本ロールに通して
混練し、それぞれ組成物ペーストを調製した。
Further, the above-mentioned composite oxide powder having the adjusted particle size was added and blended into tungsten powder having an average particle size of 1 μm so as to have the content shown in Table 1, and each composition for circuit wiring was prepared. 3 organic polymers to the composition
% By weight, and terpionel as a dispersion medium was further added to form a mixture, and the mixture was kneaded by passing it through a three-roll mill to prepare a composition paste.

【0028】一方、窒化アルミニウム(AlN)原料粉
末に対して焼結助剤としての酸化イットリウム(Y2
3 )を3重量%添加した原料混合体を泥漿化して調製し
たスラリーをドクターブレード法によって厚さ0.5mm
のグリーンシートに成形後、このグリーンシートをブラ
ンク型で打ち抜き、正方形状のAlN成形体を多数製造
した。
On the other hand, yttrium oxide (Y 2 O) as a sintering aid is added to aluminum nitride (AlN) raw material powder.
3 ) was added to 3% by weight of the raw material mixture, and the slurry prepared by slurring was prepared to have a thickness of 0.5 mm by the doctor blade method.
After being formed into a green sheet, the green sheet was punched out with a blank mold to manufacture a large number of square AlN formed bodies.

【0029】次に調整したシート状のAlN成形体表面
に、上記各組成物ペーストをスクリーン印刷して所定の
配線パターン,電極パッド,ワイヤボンディングパッド
などの配線部を形成した。さらに配線パターン等を形成
した複数のシート状AlN成形体を熱圧着法で一体に積
層して厚さ3mmの積層体とした。
Next, the above composition pastes were screen-printed on the surface of the prepared sheet-shaped AlN molded body to form wiring portions such as predetermined wiring patterns, electrode pads, and wire bonding pads. Further, a plurality of sheet-shaped AlN compacts having wiring patterns and the like formed thereon were integrally laminated by a thermocompression bonding method to form a laminate having a thickness of 3 mm.

【0030】さらに各積層体を窒素雰囲気中で温度70
0℃で脱脂した後に、同じく窒素雰囲気中で温度180
0℃で6時間加熱して同時焼成を行い、AlN基板に回
路配線が一体に形成された実施例1〜11に係る同時焼
成多層回路基板をそれぞれ調製した。
Further, each laminated body is heated at a temperature of 70 in a nitrogen atmosphere.
After degreasing at 0 ° C, also in a nitrogen atmosphere at a temperature of 180
Simultaneous firing was performed by heating at 0 ° C. for 6 hours to prepare the co-fired multilayer circuit boards according to Examples 1 to 11 in which the circuit wiring was integrally formed on the AlN substrate.

【0031】一方、比較例1として、複合酸化物を全く
添加しないタングステン粉末のみを含むペーストを使用
した以外は実施例1〜11と同一条件でAlN成形体の
調製,配線パターンの印刷,積層体の形成,脱脂,焼結
を行って実施例1〜11と同一寸法を有する比較例1に
係る同時焼成多層回路基板を調製した。
On the other hand, as Comparative Example 1, preparation of an AlN molded body, printing of a wiring pattern, and laminated body were carried out under the same conditions as in Examples 1 to 11 except that a paste containing only tungsten powder to which no complex oxide was added was used. Was formed, degreased and sintered to prepare a co-fired multilayer circuit board according to Comparative Example 1 having the same dimensions as those of Examples 1 to 11.

【0032】こうして調製した実施例1〜11および比
較例1に係る各多層回路基板の回路配線の体積抵抗,緻
密化度および空孔率を測定して下記表1に示す結果を得
た。なお上記緻密化度は、回路配線の断面写真を画像解
析して求めた。すなわち回路配線の5箇所の破断面を走
査型電子顕微鏡(SEM)で写真撮影し、各写真におい
て気孔部を除く緻密な領域面積の全断面積に対する比率
を平均して求めた。また空孔率は上記気孔部の面積割合
で算出した。
The volume resistance, densification degree and porosity of the circuit wiring of each of the multilayer circuit boards according to Examples 1 to 11 and Comparative Example 1 thus prepared were measured and the results shown in Table 1 below were obtained. The densification degree was obtained by image analysis of a cross-sectional photograph of circuit wiring. That is, five fracture surfaces of the circuit wiring were photographed with a scanning electron microscope (SEM), and in each photograph, the ratio of the dense region area excluding the pore portion to the total cross-sectional area was averaged and obtained. The porosity was calculated by the area ratio of the pores.

【0033】[0033]

【表1】 [Table 1]

【0034】上記表1に示す結果から明らかなように、
実施例1〜11に係る多層回路基板においては、タング
ステンおよび希土類元素を含む複合酸化物を含有した組
成物で回路配線を形成しているため、気孔が少ない緻密
な回路配線が得られた。また回路配線が緻密であるた
め、配線抵抗がいずれも小さく高速化に対応できる回路
基板が得られた。特に回路配線に気孔が発生することが
少ないため、めっき工程や薄膜層形成工程において液体
不純物や有機不純物成分が回路配線の気孔に浸透するこ
とが少なく信頼性に優れた回路基板を提供することがで
きた。
As is clear from the results shown in Table 1,
In the multilayer circuit boards according to Examples 1 to 11, since the circuit wiring was formed by the composition containing the composite oxide containing tungsten and the rare earth element, the dense circuit wiring with few pores was obtained. In addition, since the circuit wiring is dense, the wiring resistance is small and a circuit board that can cope with high speed is obtained. In particular, since pores are rarely generated in the circuit wiring, it is possible to provide a highly reliable circuit board in which liquid impurities and organic impurity components do not penetrate into the pores of the circuit wiring in the plating process and the thin film layer forming process. did it.

【0035】[0035]

【発明の効果】以上説明の通り、本発明に係る回路基板
およびその製造方法においては、回路配線を形成するタ
ングステン基材中に、タングステンおよび希土類元素を
含有する複合酸化物を含有しており、セラミックス基板
および回路配線パターンを焼成する温度において、上記
複合酸化物が溶融し、タングステン基材中に発生した気
孔を埋めると同時に窒化熱分解して緻密な回路配線を形
成する。
As described above, in the circuit board and the method for manufacturing the same according to the present invention, the tungsten base material forming the circuit wiring contains the composite oxide containing tungsten and a rare earth element, At the temperature at which the ceramics substrate and the circuit wiring pattern are fired, the composite oxide melts and fills the pores generated in the tungsten base material, and at the same time decomposes by nitriding and pyrolysis to form a dense circuit wiring.

【0036】したがって、回路配線の電気抵抗が大幅に
低減されるため、半導体素子の動作の高速化が図れる。
また回路配線中の気孔の発生が少ないため、回路配線上
部にめっき層や薄膜を形成した後に加熱処理を実施した
場合においても、めっき層や薄膜の膨れ等の不良発生が
少なく、回路基板の製造歩留りを大幅に改善することが
できる。
Therefore, since the electric resistance of the circuit wiring is greatly reduced, the operation speed of the semiconductor element can be increased.
In addition, since there are few pores in the circuit wiring, even when heat treatment is performed after forming the plating layer or thin film on the circuit wiring, there are few defects such as swelling of the plating layer or thin film The yield can be significantly improved.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 セラミックス基板表面に回路配線を一体
に形成した回路基板において、タングステンおよび希土
類元素を含む複合酸化物を1〜50重量%含有し、残部
タングステンから成る組成物で上記回路配線を形成した
ことを特徴とする回路基板。
1. A circuit board integrally formed with circuit wiring on the surface of a ceramic substrate, wherein the circuit wiring is formed of a composition containing 1 to 50% by weight of a complex oxide containing tungsten and a rare earth element, and the balance being tungsten. A circuit board characterized by the above.
【請求項2】 回路配線の空孔率が20vol%以下である
ことを特徴とする請求項1記載の回路基板
2. The circuit board according to claim 1, wherein the porosity of the circuit wiring is 20 vol% or less.
【請求項3】 セラミックス基板が窒化アルミニウム基
板であることを特徴とする請求項1記載の回路基板。
3. The circuit board according to claim 1, wherein the ceramics substrate is an aluminum nitride substrate.
【請求項4】 タングステンおよび希土類元素を含む複
合酸化物粉末を1〜50重量%含有し、残部タングステ
ン粉末から成る組成物に有機添加物を添加して回路配線
用組成物ペーストを調製し、この組成物ペーストをセラ
ミックス成形体表面に塗布して所定形状の配線パターン
を形成し、しかる後に上記セラミックス成形体と配線パ
ターンとを同時焼成することを特徴とする回路基板の製
造方法。
4. A circuit wiring composition paste is prepared by adding 1 to 50% by weight of a composite oxide powder containing tungsten and a rare earth element, and adding an organic additive to a composition comprising the balance tungsten powder. A method for producing a circuit board, comprising applying the composition paste to the surface of a ceramic molded body to form a wiring pattern having a predetermined shape, and then simultaneously firing the ceramic molded body and the wiring pattern.
【請求項5】 タングステンおよび希土類元素を含む複
合酸化物粉末を1〜50重量%含有し、残部タングステ
ン粉末から成ることを特徴とする回路配線用組成物。
5. A circuit wiring composition comprising 1 to 50% by weight of a composite oxide powder containing tungsten and a rare earth element, and the balance being tungsten powder.
JP10124394A 1994-05-16 1994-05-16 Circuit board and manufacture thereof Abandoned JPH07307539A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10124394A JPH07307539A (en) 1994-05-16 1994-05-16 Circuit board and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10124394A JPH07307539A (en) 1994-05-16 1994-05-16 Circuit board and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH07307539A true JPH07307539A (en) 1995-11-21

Family

ID=14295471

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10124394A Abandoned JPH07307539A (en) 1994-05-16 1994-05-16 Circuit board and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH07307539A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100986288B1 (en) * 2008-08-04 2010-10-07 삼성전기주식회사 Manufacturing Method for Printed Circuit Board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100986288B1 (en) * 2008-08-04 2010-10-07 삼성전기주식회사 Manufacturing Method for Printed Circuit Board

Similar Documents

Publication Publication Date Title
JP2013241322A (en) Alumina sintered body, member including the same, and semiconductor manufacturing apparatus
EP3439442A1 (en) Ceramic substrate and production method for same
JP6728859B2 (en) Ceramic substrate and manufacturing method thereof
JP2001342063A (en) Low temperature-baked ceramic composition, low temperature ceramic, its production method, wiring board using the same and its production method
JP2634133B2 (en) Aluminum nitride multilayer wiring board having high dielectric layer and method of manufacturing the same
JP2011088756A (en) Low temperature-sintering ceramic material, low temperature-sintered ceramic sintered compact and multilayer ceramic substrate
JP2003318060A (en) Manufacturing method of laminated electronic component
JPH07307539A (en) Circuit board and manufacture thereof
JPH0881267A (en) Aluminum nitride sintered compact, its production, aluminum nitride circuit board and its production
JP4688460B2 (en) Glass ceramic multilayer wiring board with built-in capacitor
JP5004548B2 (en) Low-temperature fired porcelain, method for producing the same, and wiring board using the same
JPH08109069A (en) Aluminum nitride sintered compact
JP4535575B2 (en) Silicon nitride multilayer wiring board
JPH10251069A (en) Silicon nitride circuit board and semiconductor device
JP4950379B2 (en) AlN metallized substrate and manufacturing method thereof
JP2666744B2 (en) Alumina multilayer wiring board, method of manufacturing the same, and method of manufacturing alumina sintered body
EP0725438A2 (en) Capacitor built-in type substrate
JP7438743B2 (en) Aluminum nitride wiring board and its manufacturing method
JP3101966B2 (en) High thermal expansion Al2O3-SiO2-based sintered body and method for producing the same
JP3198139B2 (en) AlN metallized substrate
JP3628088B2 (en) Aluminum nitride multilayer wiring board and manufacturing method thereof
JP3038320B2 (en) Method for producing aluminum nitride sintered body for circuit board
JPH09237957A (en) Alumina circuit board and manufacture thereof
JP3330817B2 (en) Multilayer ceramic parts
JPH0881266A (en) Production of aluminum nitride sintered compact

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20041124

A762 Written abandonment of application

Free format text: JAPANESE INTERMEDIATE CODE: A762

Effective date: 20050112