JPH0730457A - Pll synthesizer circuit - Google Patents

Abstract

PURPOSE:To provide a PLL synthesizer circuit capable of quickly switching a speaking channel and a control channel and obtaining an efficient CNR characteristic and a high output signal level. CONSTITUTION:The collector of a transistor(TR) TR13 in a switching circuit 10 is connected to the emitter of an oscillation TR 11 in a speaking channel carrier oscillation circuit 8 through a resistor R13 and the collector of a TR TR14 in the circuit 10 is connected to the emitter of an oscillation TR TR12 in a control channel carrier oscillation circuit 9 through a resistor R23. An output pulse signal from a phase comparator circuit 4 is converted into DC voltage through a loop filter 22 or 23 and outputted to the cathode of a variable capacity diode D11 in the circuit 8 or the cathode of a variable capacity diode D21 in the circuit 9. The oscillation frequency of each oscillation circuit is controlled at objective frequency by the DC voltage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PLL synthesizer circuit suitable for use in a wireless communication device.

[0002]

2. Description of the Related Art A wireless communication device that uses two channels, a call channel and a control channel, to communicate is conventionally known.
A PLL synthesizer circuit that generates oscillation signals in two frequency bands with one oscillation circuit is used.

FIG. 2 is a diagram showing an example of a conventional PLL synthesizer circuit for a wireless communication device. In the figure, the oscillating unit 1 is composed of an oscillating transistor TR1 and a resonance element. At the base of the oscillation transistor TR1,
Λ / 4 type resonator 11 acting as an inductance of the LC resonance circuit via the capacitor C1 and the capacitor C2
And are connected. The other end of the capacitor C2 is connected to the cathode of the variable capacitance diode D1, and the anode of the variable capacitance diode D1 is grounded. The other end of the resonator 11 is grounded.

A capacitor C3 is connected between the collector and the emitter of the transistor TR1, and a capacitor C4 is connected between the base and the emitter. These capacitors C3, C4 and the transistor TR1 form a Colpitts type oscillation circuit. ing. Further, a power supply choke microstrip line 12 is connected between the collector of the transistor TR1 and the DC power supply, and a collector bias voltage is supplied via the power supply choke microstrip line 12. Further, resistors R1 and R2 are connected to the base of the transistor TR1, and the resistors R1 and R2
A voltage determined by the voltage dividing ratio of R2 is supplied as the base bias voltage.

The buffer amplifier 2 is a transistor T for amplification.
The amplification transistor TR2 is composed of R2, and the base of the amplification transistor TR2 is connected to the transistor TR1 via a coupling capacitor C5.
The collector output signal of is input. Further, resistors R4 and R5 are connected to the base, and those resistors R4 and R5 are connected.
The voltage determined by the voltage division ratio is supplied as the base bias voltage. The emitter of the transistor TR2 is a resistor R
6, and is grounded via a capacitor C6.

Further, a power supply choke microstrip line 13 is connected between the collector of the transistor TR2 and the DC power supply, and a collector bias voltage is supplied through the power supply choke microstrip line 13. Further, the collector of the transistor TR2 is connected to the prescaler circuit 3 via the impedance matching microstrip line 14 and the coupling capacitor C7, and the output impedance of the transistor TR2 and the input impedance of the prescaler circuit 3 are connected by the impedance matching microstrip line 14. It is matched with. In addition, the condenser C8, C
9 and C10 are bypass capacitors.

The prescaler circuit 3 divides the high frequency signal amplified by the amplifying transistor TR2 into a predetermined frequency and outputs it to the phase comparison circuit 4. The phase comparison circuit 4 compares the phase of the reference signal generated by the reference oscillator 5 and converted to the T-times frequency by the T-times circuit 6 with the oscillation signal output from the prescaler circuit 3, and outputs a pulse corresponding to the phase difference. The signal is output to the loop filter circuit 7. This pulse signal is converted into a DC voltage in the loop filter circuit 7, and is output to the anode of the variable capacitance diode D1 via the power supply choke microstrip line 15. By changing the control voltage applied to the anode of the variable capacitance diode D1, it is possible to generate signals in two frequency bands, that is, a communication channel carrier signal and a control channel carrier signal.

[0008]

By the way, in a communication system using a plurality of wireless channels such as the TDD system, it is necessary to switch signals in two frequency bands, a control channel and a speech channel, at high speed.

Therefore, in the above-mentioned PLL synthesizer circuit, it is possible to reduce the time constant of the loop filter so that the oscillation frequency is synchronized with the target frequency in a short time. However, when the time constant of the loop filter is made small, the capacitance of the capacitor used in the loop filter becomes small and the ripple of the output voltage increases. As a result, the pulse signal output from the PLL circuit cannot be sufficiently smoothed by the loop filter, and the CNR of the oscillation circuit cannot be obtained.
(Carrier to noise power ratio) There was a problem that the characteristic deteriorates.

Further, in order to switch the frequency band drastically, it is necessary to increase the frequency control sensitivity of the voltage controlled oscillator composed of a variable capacitance diode or the like. However, when the frequency control sensitivity is increased, the Q of the oscillation circuit is decreased, and the CNR is increased. Problems such as deterioration of characteristics and reduction of oscillation output signal level occur.

An object of the present invention is to switch a communication channel and a control channel at high speed and to obtain a good CNR.
It is an object of the present invention to provide a PLL synthesizer circuit that can obtain characteristics and a high output signal level.

[0012]

In a PLL synthesizer circuit of a wireless communication device that oscillates by switching between a call channel and a control channel, the PLL synthesizer circuit of the present invention is a call channel carrier for generating a carrier signal for the call channel. An oscillation circuit, a control channel carrier oscillation circuit that generates a carrier signal for the control channel, a switching circuit that activates one of the call channel carrier oscillation circuit and the control channel carrier oscillation circuit, and an output signal of the call channel carrier oscillation circuit Or a phase comparison circuit that compares the output signal of the control channel carrier oscillation circuit and the reference signal and outputs a signal according to the phase difference between them, and a speech channel carrier oscillation by converting the output signal of the phase comparison circuit into a DC voltage First filter output to the circuit and output signal of the phase comparison circuit It is composed of a second filter to the control channel carrier oscillation circuit into a DC voltage.

[0013]

In the present invention, for example, when a carrier signal for a communication channel is generated, the circuit current is supplied to the communication channel carrier oscillating circuit by the switching circuit to generate a carrier signal for the communication channel. The carrier signal for the communication channel is compared with the reference signal phase in the phase comparison circuit, and the signal corresponding to the phase difference between the two is output to the first filter. The first filter converts a signal corresponding to the phase difference into a DC voltage and outputs the DC voltage to the speech channel carrier oscillation circuit to control the oscillation frequency to a target frequency.

On the other hand, when generating the control channel carrier signal, the switching circuit supplies a circuit current to the control channel carrier oscillation circuit to oscillate the control channel carrier signal. This control channel carrier signal is compared with the reference signal phase in the phase comparison circuit, and a signal corresponding to the phase difference between the two is output to the second filter.
The second filter converts a signal corresponding to the phase difference into a DC voltage and outputs the DC voltage to the control channel carrier oscillation circuit to control the oscillation frequency to a target frequency.

Since the switching circuit switches between the call channel carrier oscillation circuit and the control channel carrier oscillation circuit in this way, the two frequency bands can be switched at high speed. Further, since the two oscillator circuits are provided with independent filter circuits, the time constant of the filter can be designed to a value suitable for the oscillation frequency of each oscillator circuit to reduce the ripple of the output voltage of the filter.

[0016]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit configuration diagram of a PLL synthesizer circuit according to an embodiment of the present invention. This PLL synthesizer circuit is used, for example, in a wireless communication terminal of a second generation cordless telephone system. Hereinafter, the same parts as those of the conventional circuit shown in FIG.

The PLL synthesizer circuit of this embodiment comprises a speech channel carrier oscillation circuit 8 for generating a speech channel carrier signal, a control channel carrier oscillation circuit 9 for generating a control channel carrier signal, and a speech channel carrier oscillation circuit 8. And control channel carrier oscillation circuit 9
A switching circuit 10 for supplying a circuit current to one side, a buffer amplifier 2 for amplifying an oscillation signal of an oscillation circuit selected by the switching circuit 10, a prescaler 3, a phase comparison circuit 4, and a T multiplication circuit 6, It is composed of a reference oscillator 5 and an output switching circuit 21.

The call channel carrier oscillator circuit 8 and the control channel carrier oscillator circuit 9 are basically the same as the oscillator section 1 shown in FIG. The difference from the oscillator 1 of FIG. 2 is that
The other ends of the resistors R13 and R23 connected to the emitters of the transistors TR11 and TR12 are connected to the collectors of switching transistors TR13 and TR14, respectively, which will be described later, and the loop filters 22 and 23, which are independent of each oscillation circuit, are provided. It is a point to have. Further, the buffer amplifier 2 is the same as the buffer amplifier 2 of FIG. 2, except that a coupling capacitor C31 is added.

The switching circuit 10 is composed of two switching transistors TR13 and TR14.
The collector of the transistor TR13 is connected to the resistor R13 connected to the emitter of the transistor TR11 described above, and the base of the transistor TR13 is connected to the switching terminal 28 via the resistor R31. The base of the transistor TR13 is grounded via the resistor R32. The base of the transistor TR14 is connected to the collector of the transistor TR13 via the resistor R33.

When the signal applied to the switching terminal 28 is at high level, the transistor TR13 is turned on and the transistor TR14 is turned off, so that the collector bias voltage is supplied to the call channel carrier oscillation circuit 8. Also,
When the signal applied to the switching terminal 28 is at the low level, the transistor TR13 is turned off and the transistor TR1 is turned off.
4 is turned on, and the collector bias voltage is supplied to the control channel carrier oscillation circuit 9.

The output switching circuit 21 is a phase comparison circuit 4
Output pulse is switched to the loop filter 22 (first filter) on the communication channel carrier oscillation circuit 8 side or the loop filter 23 (second filter) on the control channel carrier oscillation circuit 9 side. It is a circuit and switches output according to a control signal given to the output switching control terminal 29. This output switching circuit 21 outputs an output pulse to the loop filter 22 on the side of the call channel carrier oscillation circuit 8 when the above-mentioned switching circuit 10 selects the side of the call channel carrier oscillation circuit 8, and the switching circuit 10 When the control channel carrier oscillation circuit 9 side is selected, an output pulse is output to the loop filter 23 on the control channel carrier oscillation circuit 9 side.

Next, the operation of the PLL synthesizer circuit having the above configuration will be described. When generating a carrier signal for a communication channel, the control terminal 2 of the switching circuit 10
8 is supplied with a high level signal. When a high level signal is applied to the switching terminal 28, the transistor TR13 of the switching circuit 10 turns on and the transistor TR14 turns off. When the transistor TR13 is turned on, the other end of the resistor R13 connected to the emitter of the transistor TR11 of the call channel carrier oscillation circuit 8 is grounded,
Collector current is supplied to the transistor TR11. Then, the call channel carrier oscillation circuit 8 is determined by the capacitor C13 connected between the collector and the emitter of the transistor TR11, the capacitor C14 connected between the base and the emitter, the capacitance of the variable capacitance diode D11, the inductance of the resonant element 11, and the like. Start oscillating at the frequency. This oscillated signal is amplified by the buffer amplifier 2, divided into a predetermined frequency by the prescaler 3, and further phase-compared with the reference signal of the carrier signal for the communication channel by the phase comparison circuit 4 to obtain a pulse corresponding to the phase difference. The signal is output to the output switching circuit 21.

In this case, since the output switching circuit 21 selects the speech channel carrier oscillation circuit 8 side by the control signal given to the output switching control terminal 29, the pulse signal corresponding to the phase difference from the reference signal is looped. It is output to the filter 22 and converted into a DC voltage in the loop filter 22. Then, the DC voltage is supplied to the cathode of the variable capacitance diode D11 as a control voltage for controlling the oscillation frequency, and the capacitance of the variable capacitance diode D11 changes.

By repeating these operations, the control voltage corresponding to the phase difference between the oscillation frequency and the signal of the target frequency is supplied to the variable capacitance diode D11, and the oscillation frequency of the oscillator circuit matches the target frequency. Controlled as.

On the other hand, when the carrier signal for the control channel is generated, the control signal supplied to the switching terminal 28 is set to the low level. Then, the transistor TR13 of the switching circuit 10 is turned off, the transistor TR14 is turned on, the resistor R23 connected to the emitter of the transistor TR12 of the control channel carrier oscillation circuit 9 is grounded, and the collector current is supplied to the transistor TR12.

As a result, in the control channel carrier oscillator circuit 9, the capacitor C23 connected between the collector and the emitter of the transistor TR12, the capacitor C24 connected between the base and the emitter, and the variable capacitance diode D2.
1. Oscillation is started at a frequency determined by the inductance of the resonance element 11 and the like. This oscillation signal is amplified by the buffer amplifier 2, divided into a predetermined frequency by the prescaler 3, and further compared with the reference signal phase by the phase comparison circuit 4,
A pulse signal corresponding to the phase difference is output to the output switching circuit 21.

In this case, since the output switching circuit 21 is switched to the control channel carrier oscillation circuit 9 side, the signal corresponding to the phase difference from the reference signal is output to the loop filter 23, and the loop filter 23 directs the direct current. Converted to voltage. Then, the DC voltage is output to the variable capacitance diode D21 as a control voltage for varying the oscillation frequency, and the capacitance changes the capacitance of the variable capacitance diode D21 to change the oscillation frequency. By repeating these operations, the frequency of the carrier signal for the control channel is controlled to the target frequency.

In this embodiment, two oscillating circuits, a speech channel carrier oscillating circuit 8 and a control channel carrier oscillating circuit 9 having different oscillating frequency bands are provided, and these oscillating circuits are switched at high speed by a switching circuit 10. Therefore, the control channel and the communication channel can be switched instantaneously without increasing the frequency sensitivity of the voltage controlled oscillator of the oscillation circuit. Therefore, since the Q of the oscillation circuit can be increased, the output signal level of the oscillation circuit can be increased without deteriorating the CNR characteristic.

Further, since the oscillation circuit for generating only the carrier signal for the communication channel and the oscillation circuit for generating only the carrier signal for the control channel are separately provided, the loop filter of the conventional type is used to switch the oscillation frequency at a high speed as in the conventional case. It is not necessary to reduce the time constant, and the time constant of the loop filter can be set to an appropriate value that matches each oscillation frequency. Therefore, the pulse signal output from the phase comparison circuit can be converted into a DC voltage with less ripples by the loop filters of the respective oscillation circuits, and good CNR characteristics can be obtained. Further, the circuit scale can be reduced by sharing the buffer amplifier 2 and the resonance element, which is a relatively large component among the circuit components, between the communication channel carrier oscillation circuit 8 and the control channel carrier oscillation circuit 9.

The PLL synthesizer circuit of the present invention is not limited to the Colpitts oscillator circuit and the oscillator circuit using the variable capacitance diode described in the embodiments, but can be applied to oscillator circuits of other configurations.

[0031]

According to the present invention, the control channel carrier oscillation circuit and the speech channel carrier oscillation circuit are switched by the switching circuit, and the pulse signals output from the phase comparison circuit to the respective oscillation circuits are converted into DC voltage. Second
Since the filter is provided, the frequency can be switched at high speed, and the pulse signal can be converted into a DC voltage with a small ripple to obtain a good CNR characteristic. Further, in the present invention, since the frequency control sensitivity of the voltage controlled oscillator or the like does not have to be increased in order to switch the oscillation frequency, the output signal level of the oscillation circuit can be increased and good CNR characteristics can be realized.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram of a PLL synthesizer circuit according to an embodiment of the present invention.

FIG. 2 is a circuit configuration diagram of a conventional PLL synthesizer circuit.

[Explanation of symbols]

 4 Phase comparison circuit 8 Speech channel carrier oscillation circuit 9 Control channel carrier oscillation circuit 10 Switching circuit 22, 23 Loop filter

Claims (1)

[Claims] 1. A PLL synthesizer circuit of a wireless communication device that oscillates by switching between a call channel and a control channel, and a call channel carrier oscillator circuit that generates a carrier signal for a call channel, and a carrier signal for a control channel. A control channel carrier oscillating circuit, a switching circuit for activating one of the call channel carrier oscillating circuit and the control channel carrier oscillating circuit, and an output signal of the call channel carrier oscillating circuit or an output signal of the control channel carrier oscillating circuit. A phase comparison circuit that compares a reference signal and outputs a signal corresponding to the phase difference between the two, and a first filter that converts the output signal of the phase comparison circuit into a DC voltage and outputs the DC voltage to the speech channel carrier oscillation circuit. And converting the output signal of the phase comparison circuit into a DC voltage for the control A PLL synthesizer circuit comprising: a second filter for outputting to a channel carrier oscillator circuit.