JPH07297514A - Manufacture of ceramic circuit board with resistor - Google Patents

Abstract

PURPOSE:To provide a manufacturing method of a ceramic circuit board with a resistor wherein a blister is hardly generated in a conductor circuit layer in a heat resistance test and connection performance between a resistor layer and a conductor circuit layer is improved. CONSTITUTION:Processes 1) to 4) are executed one by one in a manufacturing method of a ceramic circuit board with a resistor which is provided with a resistor layer 30, a conductor circuit layer 60, a glass protection layer 40 covering the resistor layer 30 and a connection layer 20 connecting the resistor layer 30 and the conductor circuit layer 60. 1) A process for forming the connection layer 20, the resistor layer 30 and the glass protection layer 40. 2) A process for forming a film layer 50 of a platinum group element on the connection layer 20 by a plating method. 3) A process for performing a thermal treatment. 4) A process for forming the conductor circuit layer 60 which is connected with the film layer 50 of a platinum group element.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a ceramic circuit board with a resistor, and more particularly, it includes a conductor circuit layer made of a conductor metal such as copper and a resistor layer which becomes a resistance element in a circuit. The present invention relates to a method for manufacturing a ceramic circuit board with a resistor.

[0002]

2. Description of the Related Art Conventionally, in order to incorporate a resistance element into a wiring circuit of a ceramic circuit board, a separately manufactured terminal of the resistance element is attached to a ceramic circuit board on which a conductor circuit is formed by a circuit forming means such as plating in advance. It was connected and mounted by soldering. On the other hand, in recent years, a resistor layer made of a material having a large electric resistance is applied to an insulating substrate by a method such as printing, and then the resistor paste is fired to directly form a resistor layer on the substrate. A method has been devised, and a ceramic circuit board with a resistor has been proposed in which a resistor layer is formed on a ceramic circuit board at the same time as a normal conductor circuit layer.

An example of a method for manufacturing such a ceramic circuit board with a resistor will be described. First, after chemically roughening the surface of the ceramic substrate, nucleation of palladium is performed. Next, the substrate is immersed in an electroless copper plating solution to form a conductor metal layer of copper on the surface of the substrate. By etching this conductor metal layer according to a desired wiring pattern, a conductor circuit layer is formed. Further, in order to form the resistor layer, the resistor paste is applied at a predetermined position and then fired, but there is a problem that the copper in the conductor circuit layer is oxidized by the heating during the firing. In order to prevent the oxidation of copper, it is necessary to sinter the resistor paste in an N ₂ atmosphere. As the resistor paste, an N ₂ sinter type resistor paste such as TiSi ₂ system or LaB _{6 is used.} System, Ta
Resistor pastes such as N type and strontium / ruthenate type are used.

On the other hand, as the resistor paste, there is also a RuO ₂ type resistor paste which is fired in the air, and it is known that it is superior in reliability and the like to the N ₂ fired type paste. ing. However, as described above, in order to prevent the oxidation of copper, it cannot be fired in the atmosphere, so this RuO ₂ -based resistor paste can be used for the ceramic circuit board with a resistor as described above. There wasn't.

Therefore, at present, there is no choice but to use N ₂ firing type resistor paste, so that only a resistor with low reliability can be formed, and since firing is not in the atmosphere,
Special atmosphere controls and atmosphere furnaces were required, making the work difficult and expensive to manufacture. Further, there is a problem that the organic binder in the resistor paste is easily carbonized.

Therefore, a method has been proposed in which a resistor layer is first formed on a ceramic substrate, and then a conductor metal layer made of copper is formed, as disclosed in JP-A-63-28094 and JP-A-63-20.
No. 2987 and the like. In this method, a RuO ₂ type resistor paste is first applied on a ceramic substrate,
After firing in the air to form the resistor layer, a conductor layer is formed on the entire surface of the substrate including the resistor portion, and the conductor layer is patterned to form a conductor circuit layer. With such a method, since there is no concern that copper will oxidize, it is possible to use a RuO ₂ -based resistor paste having excellent performance such as reliability. Further, in the above method, it is also proposed to interpose a connection layer made of a conductor metal such as Ag / Pd based on the connection portion between the resistor layer and the conductor circuit layer to improve the connectivity between the resistor layer and the conductor circuit layer. There is.

However, in the method using the above RuO ₂ type resistor paste, the ceramic substrate is exposed to a high temperature, highly alkaline electroless copper plating bath with the resistor layer formed on the ceramic substrate being bare. Since it is soaked, there is an adverse effect that the resistor layer is eroded in the plating bath, and there is a problem that the reliability of the resistor layer is reduced.
There is also a problem that the connection reliability between the resistor layer and the conductor circuit layer is poor because the bonding force between the resistor layer and the conductor circuit layer is not sufficient. As described above, it is conceivable to provide a connection layer for improving the bondability between the resistor layer and the conductor circuit layer, but in this case also, the resistor layer and the conductor circuit layer are physically connected via the connection layer. Since it is only connected to, the bondability is not improved as expected, and there remains a problem in connection reliability.

Therefore, after forming a resistor layer on the ceramic substrate and forming a glass protective layer covering the resistor layer,
A method of forming a conductor circuit layer and then subjecting it to heat treatment is disclosed in JP-A-3-109793. In this method, a connection layer is first formed on a ceramic substrate with a conductor metal paste such as Ag / Pd system, a resistor layer is formed from a resistor paste such as RuO ₂ system, and then a glass layer covering the resistor layer is formed. A protective layer is formed, a conductor layer is formed on the entire surface of the substrate including a resistor portion, and a pattern is formed on this conductor layer to form a conductor circuit layer. With this method, the conductor circuit layer can be formed without fear of adverse effects such as erosion on the chemical treatment that the resistor layer undergoes when forming the conductor circuit layer. It is also disclosed in this method that after the formation of the conductor circuit layer, heat treatment is performed to improve the connectivity between the resistor layer and the conductor circuit layer.

[0009]

However, in the above-mentioned method of the prior art, since the heat treatment is performed after the conductor circuit layer having a considerable thickness is formed, the conductor circuit layer is incorporated by the plating liquid component taken into the film during plating. There is a problem in that the connection layer causes delamination during heat treatment, and the conductor circuit layer is likely to swell in the heat resistance test.

Further, in the above-mentioned method of the prior art, when a gold film layer is provided on the surface of the conductor circuit layer and then heat treatment is performed, when the semiconductor mounted on the substrate and the conductor circuit layer are wire-bonded to each other. There is a problem that the wire bonding characteristics are insufficient.

Therefore, a first object of the present invention is to solve the problem of the prior art that the conductor circuit layer swells in the heat resistance test described above and to improve the connection performance between the resistor layer and the conductor circuit layer. It is an object of the present invention to provide a method for manufacturing a ceramic circuit board with a resistor of high quality.

A second object of the present invention is to solve the problem that the conductor circuit layer has a blister in the heat resistance test in the ceramic circuit board with a resistor in which a gold film layer is provided on the surface of the conductor circuit layer. In addition to improving the wire bonding characteristics.

[0013]

A method for manufacturing a ceramic circuit board with a resistor according to claims 1 to 4 of the present invention comprises a resistor layer 30, a conductor circuit layer 60, and the resistor layer on a ceramic substrate 10. In a method for manufacturing a ceramic circuit board with a resistor, which includes a glass protective layer 40 covering 30 and a connection layer 20 connecting the resistor layer 30 and the conductor circuit layer 60, the following steps 1 to 3 are sequentially performed. I am trying. A step of forming the connection layer 20, the resistor layer 30, and the glass protective layer 40 on the ceramic substrate 10. The thickness is 0.01 to 1.0 μm on the exposed surface of the connection layer 20.
A step of forming the platinum group element coating layer 50 by a plating method. Process of heat treatment. A step of forming a conductor circuit layer 60 connected to the platinum group element coating layer 50.

A method of manufacturing a ceramic circuit board with a resistor according to claim 5 of the present invention is the method according to any one of claims 1 to 4, wherein the conductor circuit layer 60 is used.
It is characterized in that a gold coating layer is provided on the top.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings (FIG. 1) showing an embodiment of the present invention. Process (A)
As shown in, the ceramic substrate 10 is prepared. As the ceramic substrate 10, an insulating substrate made of various ceramic materials similar to a normal wiring substrate such as an alumina substrate, an aluminum nitride substrate, a beryllia substrate, and a mullite substrate is used. When the surface of the ceramic substrate 10 is chemically or physically roughened, when a conductor circuit layer is formed thereon, the roughening treatment causes a kind of gap between the ceramic substrate 10 and the conductor circuit layer. Since the anchor effect of the works, it is possible to increase the mutual adhesion. As a concrete example of the roughening treatment,
There is a method of immersing the ceramic substrate 10 in phosphoric acid heated to 250 to 330 ° C. for 2 to 20 minutes.

Next, as shown in step (B), a conductive connecting layer 20, a resistor layer 30, and a glass protective layer 40 are formed on the ceramic substrate 10. To form the connection layer 20,
It is formed by using various conductor pastes similar to those for a normal ceramic circuit board with a resistor, applying the conductor paste on the ceramic substrate 10 in a predetermined pattern, and then firing. As the conductor paste, Ag, Ag / Pd, C
Thick film conductor pastes, resinates and the like made of materials such as u, Au, Pt, Au / Pt / Pd are used.

To form the resistor layer 30, various resistor pastes similar to those used for a normal ceramic circuit board with a resistor are used, and the resistor paste is applied so as to cover a part of the connection layer 20 previously formed. After that, by firing, it is formed in a state of covering the end portion of the connection layer 20. As the resistor paste, a resistor paste such as RuO ₂ series, LaB series, TaN series is used. Note that, conversely to the above, the resistor layer 30 may be formed first, the resistor layer 30 may face downward, and the end portion thereof may be covered with a part of the connection layer 20.

The glass protective layer 40 is formed by applying a glass paste so as to cover the resistor layer 30 and firing it. As the glass paste, the same one as that used for an ordinary ceramic circuit board with a resistor is used, but the resistor layer 3 is used from the viewpoint of the resistance value drift during firing.
0 and a material that can be fired at a temperature lower than the firing temperature for forming the connection layer 20 are preferable.

Next, as shown in step (C), the connection layer 2
A coating layer 50 of a platinum group element is formed on the exposed surface of 0 by a plating method, and then heat treatment is performed. Platinum group element coating layer 5
The formation of 0 can be performed by an electroless plating method or an electrolytic plating method. When the electroless plating method is used, it is possible to form the platinum group element coating layer 50 by immersing the resistor-equipped substrate obtained in the step (B) in the electroless plating solution as it is. In order to eliminate the defective formation of the coating layer 50, it is preferable to perform the activation treatment of the connection layer 20 and then form the coating layer 50 of the platinum group element. As a method of activating the connection layer 20, a method of removing an oxide film on the surface of the connection layer 20 with an inorganic acid such as sulfuric acid, nitric acid, hydrochloric acid or various etching solutions and roughening the surface roughness,
There are a method of degreasing with an alkaline aqueous solution, a method of immersing in a reducing aqueous solution and expressing a metal active site on the surface of the connection layer 20, and the like, and one of them or a composite method can be used.

It is important that the component of the platinum group element coating layer 50 is a simple metal or alloy of any one of the platinum group elements of palladium, rhodium, ruthenium, osmium, iridium and platinum. . Among these platinum group elements, from the viewpoint of solder resistance (solder erosion resistance), the platinum group element coating layer 50 particularly contains any one of the three elements of palladium, rhodium and ruthenium. Is desirable.

With respect to the thickness of the platinum group element coating layer 50, 0.01 μm or more is required to bring out the effect of the present invention, and 0.1 μm or more is particularly preferable because the effect is remarkable. On the other hand, if the thickness is 1 μm or less, the effect of improving the conventional defect that the conductive circuit layer is likely to swell is exhibited, but from the viewpoint of plating speed, the thickness of up to 0.5 μm is effective in manufacturing. desirable.

In the present invention, the above-mentioned platinum group element coating layer 50 is used.
Is formed on the exposed surface of the connection layer 20, but it may be formed on the exposed surface of the connection layer 20, and the platinum group element is formed on the entire surface of the resistor-equipped substrate formed in step (B) as so-called thin plating. The unnecessary portion may be removed after the coating layer 50 is formed and the conductor circuit layer 60 is formed.

In the present invention, the above-mentioned platinum group element coating layer 50 is used.
After that, heat treatment is performed to improve the adhesive strength between the coating layer 50 and the connection layer 20. This heat treatment is 200 ~
It is preferably performed at 900 ° C., and in order to promote mutual diffusion of the components of the platinum group element coating layer 50 and the connection layer 20, 30
It is desirable to perform the treatment at 0 ° C. or higher, and in the case where this heat treatment is performed after forming the glass protective layer 40, the heat treatment is performed at a temperature equal to or lower than the transition point of the glass paste forming the glass protective layer 40, that is, 550 ° C. or lower. Preferably. The atmosphere for the heat treatment is not particularly limited, and can be performed in the air, a nitrogen atmosphere, or the like.

As shown in the step (D), in the present invention, the coating layer 50 of the platinum group element is provided, and after the heat treatment, the conductor circuit layer 60 is formed. As a method of forming the conductor circuit layer 60, the step (C) is performed by electroless plating or sputtering.
A metal layer having a predetermined thickness is formed on all or part of the resistor-equipped substrate formed by, the resist is applied to the conductor circuit portion, and unnecessary portions are removed by etching to form the conductor circuit layer 6
A metal thin film layer is formed on all or part of the substrate with a resistor formed by the step (C) by an etching method for forming 0, an electroless plating method or a sputtering method, and a resist is applied to the non-conductor circuit section. A semi-additive method in which a conductor circuit portion is formed by electroplating and the resist is removed, and then unnecessary portions are removed by etching to form the conductor circuit layer 60, or a resist is applied to the non-conductor circuit portion and electroless plating is performed. An additive method in which a metal layer having a predetermined thickness is formed on all or part of the substrate with a resistor formed in the step (C) by a sputtering method, and unnecessary portions are removed together with resist removal to form the conductor circuit layer 60, etc. Can be given. Also,
The metal forming the conductor circuit layer 60 can be made of one or more of copper, gold, nickel, palladium, chromium, titanium, rhodium, ruthenium, and the like.

In the present invention, after forming the conductor circuit layer 60, a gold coating layer may be formed on the conductor circuit layer 60. By forming the gold coating layer, a resistor having wire bonding characteristics is formed. It becomes a ceramic circuit board with a body.

After the above steps are completed, the resistor layer 30 is trimmed with a laser or the like to adjust it to a predetermined resistance value.
Then, a ceramic circuit board with a resistor is completed through steps similar to those for a normal circuit board.

[0027]

The thickness of the connecting layer 20 on the exposed surface is 0.01-1.
The platinum group element coating layer 50 having a thickness of 0 μm is provided, and then the heat treatment is performed.
It is presumed that the components of (4) interdiffuse with each other, but the adhesion between the coating layer 50 of the platinum group element and the connection layer 20 becomes strong, and acts to prevent the conductor circuit layer 60 from swelling in the heat resistance test. The connection reliability between the resistor layer 30 and the conductor circuit layer 60 is improved.

Regarding the ceramic circuit board with a resistor in which the gold film layer is provided on the conductor circuit layer 60, after the film layer 50 of the platinum group element is provided, the conductor circuit layer 60 is also provided.
The heat treatment before the formation of Cu improves the wire bonding characteristics because the base metal is prevented from diffusing to the gold surface as compared with the case where the heat treatment is performed after the gold coating layer is provided on the conductor circuit layer 60. Work.

[0029]

EXAMPLES The present invention will be described below based on Examples and Comparative Examples.

(Example 1) Steps (A) to (D) shown in the figure
Was carried out according to.

Commercially available 96% ceramic substrate 10
An alumina substrate (100 × 100 × 0.635 mm; manufactured by Matsushita Electric Works, Ltd.) is used, and this ceramic substrate 10 is set to 300.
The surface was uniformly roughened by immersing it in a phosphoric acid solution heated to ° C for 4 minutes. Then, a commercially available conductor paste (Ag / Pd
System) was applied to a predetermined position on the substrate by screen printing, dried and then baked at 850 ° C. to form a conductive connection layer 20. Next, a commercially available resistor paste (R
uO ₂ system) was applied to a predetermined position on the substrate by screen printing, dried and then baked at 850 ° C. to form the resistor layer 30. Then, a commercially available glass paste is applied to a predetermined position on the substrate by screen printing, dried, and then baked at 600 ° C. to form the glass protective layer 40.
Was formed. [Steps (A) to (B)]

Next, in order to activate the surface of the connection layer 20, the above-mentioned ceramic substrate 10 was immersed in a 10 wt% hydrochloric acid aqueous solution.
After soaking for 0 second, it was washed with ion-exchanged water. Then, a platinum group element coating layer 50 made of palladium was formed on the connection layer 20 by using a commercially available electroless palladium bath. The platinum group element coating layer 50 was selectively formed only on the exposed portion of the connection layer 20, and its thickness was 0.3 μm as measured by a fluorescent X-ray film thickness meter. . Next, the platinum group element coating layer 50 and the connection layer 20
To improve the adhesiveness of
Was heat-treated for 1 hour. [Step (C)]

Using the known Sensi-Acti method as plating nucleation, palladium is nucleated on the entire surface of the substrate, and electroless copper plating is performed on the entire surface of the substrate by an electroless copper plating bath having a bath composition shown in Table 1. Copper plating (so-called thin plating) for power supply was applied. When the film thickness of the obtained copper plating was measured by a fluorescent X-ray film thickness meter, it was 1 μm. Next, a commercially available dry film resist for plating was attached to the substrate, and a resist pattern was formed by using a mask (a so-called positive pattern mask) through which the non-conductor circuit portion transmits light.

Next, a conductive circuit layer 60 was formed by electrolytic copper plating as a thick plating for the conductive circuit portion using an electrolytic copper plating bath having a bath composition shown in Table 2. The thickness of the obtained electrolytic copper plating was measured by a fluorescent X-ray film thickness meter to be 5
was μm. [Process (D)]

Further, gold plating was performed using a commercially available primary electro-gold plating bath and secondary electro-gold plating bath to form a gold coating layer on the conductor circuit layer 60. The film thickness of this gold film layer was measured by a fluorescent X-ray film thickness meter and found to be 2 μm.

After that, the resist was peeled off, and the unnecessary thin plating was dissolved and removed by immersing it in a sodium persulfate-based soft etching solution to obtain a ceramic circuit board with a resistor.

[0037]

[Table 1]

[0038]

[Table 2]

Example 2 Example 1 was repeated except that the platinum group element coating layer 50 was formed to have a thickness of 0.1 μm.
A ceramic circuit board with a resistor was obtained in the same manner as in.

(Example 3) The connection layer 20 was formed using a commercially available Ag-based conductor paste, and the platinum group element coating layer 50 was formed to a thickness of 0.5 μm. A ceramic circuit board with a resistor was obtained in the same manner as in Example 1 except for the above.

Example 4 With respect to the formation of the platinum group element coating layer 50, a commercially available electroless ruthenium bath was used to form the platinum group element coating layer 50 of ruthenium. A ceramic circuit board with a resistor was obtained in the same manner as in 1.

(Embodiment 5) With respect to the formation of the platinum group element coating layer 50, a commercially available electroless rhodium bath was used to form the platinum group element coating layer 50 of rhodium. A ceramic circuit board with a resistor was obtained in the same manner as in 1.

(Example 6) Steps (A) to (D) shown in the figure
Was carried out according to.

Regarding steps (A) to (C), the conductive connecting layer 2 is formed on the ceramic substrate 10 in the same manner as in the first embodiment.
0, the resistor layer 30, the glass protective layer 40, and the platinum group element coating layer 50 made of palladium were formed, and then the same heat treatment as in Example 1 was performed.

Next, using a known Sensi-Acti method for plating nucleation, palladium is nucleated on the entire surface of the substrate, and electroless copper plating is performed using the electroless copper plating bath having the bath composition shown in Table 1 above. Conducted copper plating (so-called thin plating) for power supply on the entire surface of the substrate. The thickness of the obtained copper plating was measured by a fluorescent X-ray film thickness meter to be 1 μm.
Met. Next, a commercially available dry film resist for plating was attached to the substrate, and a resist pattern was formed by using a mask (a so-called positive pattern mask) through which the non-conductor circuit portion transmits light.

Then, electrolytic nickel plating was performed as a thick plating for the conductive circuit portion using an electrolytic nickel plating bath having a bath composition shown in Table 3 to form a conductive circuit layer 60. The film thickness of the obtained electrolytic nickel plating was measured by a fluorescent X-ray film thickness meter and found to be 3 μm. [Process (D)]

Further, gold plating was performed using a commercially available primary electro-gold plating bath and secondary electro-gold plating bath to form a gold coating layer on the conductor circuit layer 60. The film thickness of this gold film layer was measured by a fluorescent X-ray film thickness meter and found to be 2 μm.

After that, the resist was peeled off, and the unnecessary thin plating was dissolved and removed by immersing the resist in a sodium persulfate-based soft etching solution to obtain a ceramic circuit board with a resistor.

[0049]

[Table 3]

(Example 7) Steps (A) to (D) shown in the figure
Was carried out according to.

Commercially available 96% ceramic substrate 10
An alumina substrate (100 × 100 × 0.635 mm; manufactured by Matsushita Electric Works, Ltd.) is used, and this ceramic substrate 10 is set to 300.
The surface was uniformly roughened by immersing it in a phosphoric acid solution heated to ° C for 4 minutes. Then, a commercially available resinate paste (Au
/ Pt / Pd system) was applied to a predetermined position on the substrate by screen printing, dried, and then baked at 800 ° C. to form the conductive connection layer 20. Next, a commercially available resistor paste (RuO ₂ system) was applied to a predetermined position on the substrate by screen printing, dried and then baked at 850 ° C. to form a resistor layer 30. Next, a commercially available glass paste was applied to predetermined positions on the substrate by screen printing, dried, and then baked at 600 ° C. to form the glass protective layer 40. [Steps (A) to (B)]

Next, in order to activate the surface of the connection layer 20, the above-mentioned ceramic substrate 10 was immersed in a 10% by weight hydrochloric acid aqueous solution.
After soaking for 0 second, it was washed with ion-exchanged water. Then, a platinum group element coating layer 50 made of palladium was formed on the connection layer 20 by using a commercially available electroless palladium bath. The platinum group element coating layer 50 was selectively formed only on the exposed portion of the connection layer 20, and its thickness was 0.4 μm as measured by a fluorescent X-ray film thickness meter. . Next, the platinum group element coating layer 50 and the connection layer 20
To improve the adhesiveness of
Was heat-treated for 1 hour. [Step (C)]

Using the known Sensi-Acti method for plating nucleation, palladium is nucleated on the entire surface of the substrate, and electroless copper plating is performed using the electroless copper plating bath having the bath composition shown in Table 1 above. Copper plating (so-called thin plating) for power supply was applied to the entire surface. When the film thickness of the obtained copper plating was measured by a fluorescent X-ray film thickness meter, it was 1 μm. Next, a commercially available dry film resist for plating was attached to the substrate, and a resist pattern was formed by using a mask (a so-called positive pattern mask) through which the non-conductor circuit portion transmits light.

Then, electrolytic palladium plating was carried out as a plating for thickening the conductor circuit portion using a commercially available primary electric palladium plating bath and secondary electric palladium plating bath to form a conductor circuit layer 60. The thickness of the obtained electrolytic palladium plating was measured with a fluorescent X-ray film thickness meter to be 3 μm.
Met. [Process (D)]

Further, gold plating was performed using a commercially available primary electro-gold plating bath and secondary electro-gold plating bath to form a gold coating layer on the conductor circuit layer 60. The film thickness of this gold film layer was measured by a fluorescent X-ray film thickness meter and found to be 2 μm.

After that, the resist was peeled off, and the unnecessary thin plating was dissolved and removed by immersing it in a sodium persulfate-based soft etching solution to obtain a ceramic circuit board with a resistor.

(Embodiment 8) Steps (A) to (D) shown in the figure
Was carried out according to.

Regarding steps (A) to (B), the conductive connecting layer 2 is formed on the ceramic substrate 10 in the same manner as in the first embodiment.
0, the resistor layer 30, and the glass protective layer 40 were formed.
[Steps (A) to (B)]

Next, in order to activate the surface of the connecting layer 20, the ceramic substrate 10 was immersed in a 10 wt% hydrochloric acid aqueous solution for 30 seconds, and then washed with ion-exchanged water. Then
A platinum group element coating layer 50 made of palladium was formed on the connection layer 20 by using a commercially available electroless palladium bath. The platinum group element coating layer 50 was selectively formed only on the exposed portion of the connection layer 20, and its thickness was 0.5 μm as measured by a fluorescent X-ray film thickness meter. . Next, in order to improve the adhesion between the platinum group element coating layer 50 and the connection layer 20, the temperature is set to 1 at 400 ° C. in a nitrogen atmosphere.
Heat treatment was performed for an hour. [Step (C)] Next, using a known Sensi-Act method for plating nucleation, palladium is nucleated on the entire surface of the substrate, and then electroless plating is performed using a commercially available electroless nickel / phosphorus plating bath. Nickel plating (so-called thin plating) for power supply was applied to the entire surface. The film thickness of the obtained nickel plating was measured by a fluorescent X-ray film thickness meter to be 1 μm.
Met. Then, a commercially available dry film resist for plating was attached to the substrate, and a resist pattern was formed using a mask (a so-called positive pattern mask) through which the non-conductor circuit portion transmits.

Next, electrolytic palladium plating was carried out as a plating for thickening the conductor circuit portion using a commercially available primary electric palladium plating bath and secondary electric palladium plating bath to form a conductor circuit layer 60. The thickness of the obtained electrolytic palladium plating was measured by a fluorescent X-ray film thickness meter to be 2 μm.
Met. [Process (D)]

Further, gold plating was performed using a commercially available primary electro-gold plating bath and secondary electro-gold plating bath to form a gold coating layer on the conductor circuit layer 60. The film thickness of this gold film layer was measured by a fluorescent X-ray film thickness meter and found to be 1 μm.

Then, the resist is stripped off, and hydrogen peroxide /
The unnecessary thin plating was dissolved and removed by immersing in a sulfuric acid-based nickel etching solution to obtain a ceramic circuit board with a resistor.

Comparative Example 1 In Comparative Example 1, the surface of the connecting layer 20 was activated, the platinum group element coating layer 50 was formed on the connecting layer 20, and the platinum group element coating layer 50 and the connecting layer 20 were formed.
Heat treatment to improve the adhesiveness (under nitrogen atmosphere, 4
A ceramic circuit board with a resistor was obtained in the same manner as in Example 1 except that the heating was not performed at 00 ° C. for 1 hour).

(Comparative Example 2) In Comparative Example 2, a ceramic circuit board with a resistor was obtained in the same manner as in Example 1 except that the platinum group element coating layer 50 was formed to have a thickness of 1.5 μm. It was

Comparative Example 3 In Comparative Example 3, the conductor circuit layer 60 was subjected to a heat treatment (in a nitrogen atmosphere, at 400 ° C. for 1 hour) for improving the adhesion between the platinum-group element coating layer 50 and the connection layer 20. Is not performed in the step before the formation, but instead is immersed in a sodium persulfate-based soft etching solution to dissolve and remove the unnecessary thinning plating, that is, the gold film layer is formed on the conductor circuit layer 60. A ceramic circuit board with a resistor was obtained in the same manner as in Example 1 except that the heat treatment was performed at 400 ° C. for 1 hour in a nitrogen atmosphere after forming the.

Comparative Example 4 In Comparative Example 4, the conductor circuit layer 60 was subjected to a heat treatment (in a nitrogen atmosphere at 400 ° C. for 1 hour) to improve the adhesion between the platinum group element coating layer 50 and the connection layer 20. Is not performed in the step before the formation, but instead is immersed in a sodium persulfate-based soft etching solution to dissolve and remove the unnecessary thinning plating, that is, the gold film layer is formed on the conductor circuit layer 60. A ceramic circuit board with a resistor was obtained in the same manner as in Example 6 except that the heat treatment was performed at 400 ° C. for 1 hour in a nitrogen atmosphere after the formation of.

Examples 1 to 8 and Comparative Example 1 obtained above
About the ceramic circuit board with a resistor obtained in
When a heat resistance test was performed at 0 ° C. for 10 minutes, Examples 1 to
Regarding No. 8, there was no swelling defect, but Comparative Examples 1 to 4
Regarding, the blistering defect occurred. Further, in Comparative Examples 3 and 4, swelling defects were found immediately after the ceramic circuit boards with resistors were produced.

Next, when the wire bonding characteristics after the heat resistance test at 430 ° C. for 10 minutes were evaluated, there was no problem in Examples 1 to 8 and Comparative Examples 1 and 2, but Comparative Example 3 In addition, in Comparative Example 4, peeling at the secondary side bonding interface, so-called E failure, occurred. This indicates that there is a difference in wire bonding characteristics due to the difference in the timing of heat treatment at 400 ° C. for 1 hour.

Furthermore, with respect to the ceramic circuit boards with resistors obtained in Examples 1 to 8 and Comparative Examples 1 to 4, the temperature was 240 ° C.
When immersed in a solder bath (Sn (60%). Pb (40%)) for 30 seconds and evaluated, Examples 1 to 8 and Comparative Examples 2 to
In Comparative Example 4, there was no problem, but in Comparative Example 1, disconnection failure occurred in the portion where the connection layer 20 was exposed due to the displacement of the plating resist (the portion where the conductor circuit layer 60 was not formed). This means that the platinum group element coating layer 50
It is shown that the formation of the solder on the exposed surface of the connection layer 20 has the effect of improving the solder resistance of the connection layer 20 (improving the solder erosion property).

[0070]

Since the method for manufacturing a ceramic circuit board with a resistor according to the present invention is configured as described above, it has the following effects.

According to the manufacturing method of claims 1 to 4, a ceramic circuit board with a resistor having excellent heat resistance can be obtained. Therefore, the connection performance between the resistor layer and the conductor circuit layer is improved, and the post-process after the circuit formation is performed. It is possible to manufacture a ceramic circuit board with a resistor having high reliability.

According to the manufacturing method of claim 5, in addition to the effects of the manufacturing methods of claims 1 to 4, it is possible to manufacture a ceramic circuit board with a resistor having excellent wire bonding characteristics.

[Brief description of drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention in the order of steps.

[Explanation of symbols]

 10 Ceramic Substrate 20 Connection Layer 30 Resistor Layer 40 Glass Protective Layer 50 Platinum Group Element Film Layer 60 Conductor Circuit Layer

Claims (5)

[Claims] 1. A resistor layer (30), a conductor circuit layer (60), and the resistor layer (30) on a ceramic substrate (10).
Glass protective layer (40) for covering and the resistor layer (30)
And a connection layer (20) for connecting the conductor circuit layer (60) to the ceramic circuit board with a resistor,
A method for manufacturing a ceramic circuit board with a resistor, which comprises sequentially performing the following steps (1) to (3). A step of forming a connection layer (20), a resistor layer (30) and a glass protective layer (40) on the ceramic substrate (10). A thickness of 0.01 to 1.0 on the exposed surface of the connection layer (20).
A step of forming a coating layer (50) of a platinum group element of μm by a plating method. Process of heat treatment. A step of forming a conductor circuit layer (60) connected to the coating layer (50) of the platinum group element. 2. The platinum group element is palladium.
A method for manufacturing the ceramic circuit board with a resistor described in the above. 3. The method for manufacturing a ceramic circuit board with a resistor according to claim 1, wherein the platinum group element is rhodium. 4. The platinum group element is ruthenium.
A method for manufacturing the ceramic circuit board with a resistor described in the above. 5. The method for producing a ceramic circuit board with a resistor according to claim 1, wherein a gold coating layer is provided on the conductor circuit layer (60).