JPH07288439A - Signal converting circuit - Google Patents

Abstract

PURPOSE:To prevent converting characteristics from being fluctuated by the dispersion of elements and to reduce an error to be generated in an output signal even in an area where an input signal is small. CONSTITUTION:This circuit is composed of an operational amplifier 12, transistors 11 and 13, input current source 11, current sources I2 and I3 and resistors R1 and R2, and the sum of a voltage between the base and emitter of the transistor 11 caused by the current of the current source 12 and the dropped voltage of the resistor R1 caused by the currents of the input current source I1 and the current source I2 is supplied to the positive input terminal of the operational amplifier 12. The operational amplifier 12 is operated as a voltage follower circuit, and a voltage at the same value as the voltage supplied to the positive input terminal is outputted from an output terminal. The voltage at a value subtracting the dropped voltage of the resistor R2 caused by the current source I3 from the output voltage of the operational amplifier 12 is supplied to the base of the transistor 13 for providing an output current I4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal conversion circuit for inversely logarithmically converting an input signal.

[0002]

2. Description of the Related Art An automatic gain control circuit in a signal processing circuit for a magneto-optical disk or the like uses an inverse logarithmically converted control signal for gain control. Conventionally, as a signal conversion circuit for inversely logarithmically converting an input signal for gain control and obtaining an output signal having an exponential function with respect to the input signal, a circuit as shown in FIG. 4 has been considered. . A resistor R11 is connected to the input current source I11 which is an input signal source, and the voltage drop V11 generated across the resistor R11 is supplied to the positive input terminal of the operational amplifier 21. Above operational amplifier
The 21 negative input terminals are connected to the output terminals. That is, the operational amplifier 21 has a voltage V proportional to the input voltage V11.
Acts as a voltage follower circuit that outputs 12. The output voltage V12 of the operational amplifier 21 is supplied to the base of the npn transistor 22. Then, the output current I12 which is antilogarithmically converted is output from the collector of the transistor 22.

In the signal conversion circuit shown in FIG. 4, the resistor 12
The voltage drop V11 generated at both ends of is given by the following equation. V11 = R11 · I11 ... 1 Since the operational amplifier 21 functions as a voltage follower circuit as described above, its output voltage V12 is given by the following equation.

V12 = V11 ... 2 Since the voltage V12 is supplied to the base / emitter of the transistor 22, the current I12 flowing in the collector of the transistor 22 is given by the following equation by the current formula of the bipolar transistor.

I12 = Is.multidot. {Exp (V12 / VT) -1} ... 3 In the above three equations, Is is a reverse saturation current of the transistor, and VT is represented by kT / q, where k Is the Boltzmann constant, T is the absolute temperature, and q is the charge amount of electrons.

Then, by substituting the above equations 1 and 2 into equation 3, the following equation 4 is obtained. I12 = Is. {Exp (R11.I11 / VT) -1} ... 4 Now, in the above four expressions, if I11 is sufficiently large and R11.I11 >> VT ... 5 is satisfied, the right side of the above four expressions. At ex
Since the value of p becomes much larger than "1", "-1" can be approximately ignored, and thus the above equation (4) can be rewritten as the following equation (6).

I12 = Isexp (R11I11 / VT) 6 As is apparent from the above equation 6, the signal conversion circuit of FIG. 4 has an output current that has an inverse logarithmic relationship with the input current I11. I12 can be obtained.

[0008]

However, in the above circuit, the output current I12 is proportional to the reverse saturation current Is of the transistor, as is clear from the above equation (6). This current Is is a function of the impurity concentration in the base and emitter regions of the transistor. For example, when ion implantation is performed in order to determine the impurity concentration in the process of forming a transistor, the impurity concentration also varies due to mechanical variations at the time of implantation, which is the variation of Is. As a result, the circuit of FIG. 4 has a drawback that Is varies each time a transistor is formed and uniform conversion characteristics cannot be obtained.

Further, in order for Is to approximately show the characteristic of the above equation 6, it is necessary to satisfy the condition of equation 5, and the error becomes large in the vicinity of the input current I11 = 0 which deviates from the condition of equation 5. There is a drawback. For example, to simplify the explanation, if Is = R11 = VT = 1, then I11 is 5
Considering the time of, I12 = 148 from 6 and I12 from 4
= 147, a large error does not occur. But I
Considering the case when 11 is 0, I12 = 1 from the formula 6, but 4
According to the equation, I12 = 0, and the values of both equations are greatly different, and a large error occurs. As described above, the signal conversion circuit of FIG. 4 has a drawback that the conversion characteristics vary due to variations in elements, and has a drawback that an error generated in the output signal becomes large in a region where the input signal is small.

The present invention has been made in consideration of the above circumstances, and an object thereof is that the conversion characteristic does not change due to the variation of the element and the output signal is generated even in a small input signal region. An object of the present invention is to provide a signal conversion circuit that can reduce the error.

[0011]

According to a first aspect of the present invention, there is provided a signal conversion circuit comprising: a first transistor having a collector / base connected; and a first transistor connected between an emitter of the first transistor and a reference potential. No. 1 resistor, an input current source for supplying a first current as an input signal to a connection point between the emitter of the first transistor and the first resistance, and a collector-base connection point of the first transistor. A first current source for supplying a second current to the first and second operational amplifiers, and an operational amplifier having positive and negative input terminals and an output terminal, the positive input terminal being connected to the collector-base connection point of the first transistor. A second transistor whose base is connected to the output terminal of the operational amplifier, whose emitter is connected to the reference potential, and which outputs a third current as an output signal from its collector, and one end of which is the second transistor. A second resistor connected to the negative input terminal of the operational amplifier and the other end of which is connected to the negative input terminal of the operational amplifier, and a fourth resistor is provided at a connection point between the other end of the second resistor and the negative input terminal of the operational amplifier. And a second current source for supplying a current.

The signal conversion circuit of the second invention comprises a collector
A first transistor having a base connected thereto, a first resistor connected between the emitter of the first transistor and a reference potential, and a connection between the emitter of the first transistor and the first resistor. An input current source for supplying a first current which is an input signal to the point, a first current source for supplying a second current to the collector-base connection point of the first transistor, and positive and negative input terminals An operational amplifier having a positive input terminal connected to the collector-base connection point of the first transistor, and a base connected to the output terminal of the operational amplifier and an emitter connected to the reference potential. A second transistor for outputting a third current, which is a first output signal from, and one end connected to the base of the second transistor and the other end connected to the negative input terminal of the operational amplifier. A second resistor, a second current source that supplies a fourth current to the connection point between the other end of the second resistor and the negative input terminal of the operational amplifier, and the base is the base of the second transistor. A third transistor having an emitter connected to the reference potential and an emitter connected to the third potential.
Second from the collector connected to the collector of the transistor
The fourth transistor that outputs the fifth current, which is the output signal of, and the collector and the emitter are inserted in series between the base of the fourth transistor and the reference potential, and the collector and the base are short-circuited, respectively. A series circuit including fifth and sixth transistors, a third current source for supplying a sixth current to the series circuit, a collector of the third transistor, a base of which is connected to an emitter of which is connected to the reference potential. And a seventh transistor for outputting a seventh current which is a third output signal from the collector.

[0013]

In the signal conversion circuits of the first and second aspects of the invention, the positive input terminal of the operational amplifier is supplied with the sum of the voltage according to the input current and the voltage according to the reverse saturation current of the transistor. . The operational amplifier acts as a voltage follower circuit,
The output voltage of the output terminal is supplied to the base of the transistor for obtaining the output current. This cancels the influence of the reverse saturation current of the transistor on the output current.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the accompanying drawings. 1 is a circuit diagram of a first embodiment of a signal conversion circuit of the present invention. Input current source I for generating input signal
One end of a resistor R1 is connected to 1. This resistance R1
The other end of is connected to the node of ground potential. The emitter of the npn transistor 11 is connected to one end of the resistor R1. The collector and base of this transistor 11 are connected to each other, and the current of the current source I2 is supplied to this collector / base common connection node. The positive input terminal of the operational amplifier 12 is connected to the collector / base common connection node of the transistor 11. Further, one end of a resistor R2 having the same value as the resistor R1 is connected to the current source I3. The negative input terminal of the operational amplifier 12 is connected to one end of the resistor R2. The output terminal of the operational amplifier 12 and the base of the npn transistor 13 are connected to the other end of the resistor R2. The emitter of the transistor 13 is connected to the node of the ground potential, and the current I which is antilogarithmically converted from the collector of the transistor 13 with respect to the input signal.
4 is output. As the transistors 11 and 13, those having the same various physical characteristics such as element size and electrical characteristics are used.

Next, the operation of the circuit configured as described above will be described. The voltage V1 generated at the positive input terminal of the operational amplifier 12 when the input current is supplied is the sum of the voltage drop across the resistor R1 and the base-emitter voltage of the transistor 11. The current of the input current source I1 and the current of the current source I2 merge and flow in the resistor R1. In addition, the temperature voltage and the reverse saturation voltage in the transistor 11 are respectively V
Assuming T and Is, the base-emitter voltage VBE of the transistor 11 is given by the following equation.

VBE = VTln (I2 / Is + 1) ... 7 Therefore, the voltage V1 is given by the following equation. V1 = R1. (I1 + I2) + VT.ln (I2 / Is + 1) ... 8 The negative input terminal of the operational amplifier 12 is connected to the positive input terminal through the resistor R2 whose value is equal to that of the resistor R1. It is connected to the output terminal, the operational amplifier 12 receives negative feedback, and operates as a voltage follower circuit. That is, the operational amplifier 12 operates so that the potentials at the positive input terminal and the negative input terminal become equal, and the voltage V2 generated at the negative input terminal of the operational amplifier 12 is given by the following equation.

V2 = V1 ... 9 On the other hand, the base voltage V3 of the transistor 13 is the above voltage V2.
From the voltage drop in the resistor R2. If we consider the operational amplifier 12 as an ideal circuit model, since no current flows through the negative input terminal, the voltage drop across the resistor R2 is determined only by the current component of the current source I3. Like

V3 = V2-I3.R2 ... 10 In the transistor 13, the relation between the base voltage V3 given by the above equation 10 and the output current I4 is obtained from the following equation from the same equation as the above equation 7.

V3 = VTln (I4 / Is + 1) ... 11 Here, when the above equations 8, 9, and 11 are substituted into the equation 10, and I2 = I3, the following equation is established.

(I4 / Is + 1) / (I2 / Is + 1) = exp (R2.I1 / VT) ... 12 Here, in order to simplify the calculation, the current value of the current source I2 and the current value of the output current I4 Is large enough, (I
Since "1" in each term of 4 / Is +1) and (I2 / Is +1) can be ignored, I4 is given by the following formula from the above formula (12).

I4 = I2.exp (R2.I1 / VT) ... 13 As is apparent from the above equation 13, the output current I4 is proportional to the inverse logarithmic conversion of the input current. Moreover, the reverse saturation current Is of the transistor is not included in the formula expressing I4. Therefore, the conversion characteristics do not change due to variations in the transistors.

Further, since the above equation 13 is satisfied regardless of the value of the input current I1, it is possible to maintain the same relationship even when the value of I1 is large even when I1 = 0, and to reduce the conversion error. can do.

FIG. 2 is a circuit diagram showing the embodiment circuit of FIG. 1 in which the current values of the current sources I2 and I3 are 100 μA and the resistance R is
It is a characteristic view showing a result of simulating a change of the output current I4 with respect to the input current I1 when the resistance values of 1 and R2 are respectively set to 1 KΩ. As shown in the drawing, almost ideal input / output characteristics are obtained, and the error in the vicinity of the input current I1 is 0 is sufficiently small.

FIG. 3 is a circuit diagram of a second embodiment of the signal conversion circuit of the present invention. The portions corresponding to those of the embodiment circuit of FIG. 1 are designated by the same reference numerals as those in FIG. 1, and duplicated description will be omitted. In this embodiment, the base of the npn transistor 14 is connected to the base of the npn transistor 13.
The emitter of the transistor 14 is connected to the ground potential node. Also, two npn transistors 15 and 16
The collector and emitter of are connected in series and the series circuit 17
And the collector and base of each transistor are short-circuited. The emitter of the transistor 16 in the series circuit 17 is connected to the ground potential node. The collector / base common connection node of the transistor 15 in the series circuit 17 is supplied with the current of the current source I5. The base of an npn transistor 18 is connected to the collector / base common connection node of the transistor 15. The emitter of the transistor 18 is connected to the collector of the transistor 14, and the collector of the transistor 18 outputs an output current I6. Further, the collector of the transistor 14 is connected to the base of the npn transistor 19. The emitter of the transistor 19 is connected to the node of ground potential, and the collector outputs an output current I7.
Note that, also in the case of this embodiment, the transistors 11, 13, 14, 1
5, 16, 18 and 19 are assumed to have the same physical characteristics and electrical characteristics such as element dimensions.

In the circuit of this embodiment, the transistor 14
Since its base voltage is equal to that of the transistor 13, a current equal to the current I4 flows through its collector. If the base current of transistor 18 is small enough to be ignored compared to the collector current, this transistor 18
The output current I6, which is the collector current of, becomes equal to I4. The base-emitter voltage VBE of each of the transistors 15, 16, 18 and 19 is given by the following equation, assuming that each collector current Ic is sufficiently large.

VBE = VT.ln (Ic / Is) ... 14 Here, the base-emitter voltage VBE19 of the transistor 19 is given by the following equation.

[0027] VBE19 = VT · {2ln (I5 / Is) -ln (I4 / Is) = VT · ln (I5 2 / Is · I4) ... 15 Further, in VBE19 = VT · ln (I7 / Is) ... 16 Therefore, the following relationship is established between I4, I5, and I7.

VTln (I7 / Is) = VTln (I5 ² /IsI4)...17 Therefore, I5 ² = I4I7 ... 18 and I7 is given by the following equation.

[0029] I7 = I5 ² / I4 ... 19 i.e., in the embodiment circuit of Figure 3, transistors 13 and 18
Output currents I4 and I6 obtained by antilogarithmically converting the input current I1 are obtained from the collectors of the above, and an output current I7 inversely proportional to the antilogarithmic conversion current of the input current I1 is obtained from the collector of the transistor 19. Also in this case, the reverse saturation current I of the transistor is applied to each of the output currents I4, I6 and I7.
Since s is not included, the conversion characteristics do not fluctuate due to transistor variations, and the same relationship as when the value of I1 is large can be maintained even when the input current I1 = 0, and the conversion error can be reduced. it can.

[0030]

As described above, according to the present invention, the conversion characteristic does not fluctuate due to the variation of the element, and the error generated in the output signal can be reduced even in the region where the input signal is small. Can be provided.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a signal conversion circuit according to a first embodiment.

FIG. 2 is a diagram showing a result of simulating the characteristics of the embodiment circuit of FIG.

FIG. 3 is a circuit diagram of a signal conversion circuit according to a second embodiment.

FIG. 4 is a circuit diagram of a conventional signal conversion circuit.

[Explanation of symbols]

11, 13, 14, 15, 16, 18, 19, ... Npn transistor, 12
… Operational amplifier, 17… Series circuit, I1… Input current source, I2
, I3, I5 ... Current source, I4, I6, I7 ... Output current, R1, R2 ... Resistance.

Claims (4)

[Claims] 1. A first transistor having a collector-base connected, a first resistor connected between an emitter of the first transistor and a reference potential, an emitter of the first transistor, and the first resistor. An input current source that supplies a first current that is an input signal to a connection point with the first resistor, and a first current source that supplies a second current to a connection point between the collector and base of the first transistor. An operational amplifier having positive and negative input terminals and an output terminal, the positive input terminal being connected to the collector-base connection point of the first transistor,
A second transistor whose base is connected to the output terminal of the operational amplifier, whose emitter is connected to the reference potential, and which outputs a third current as an output signal from its collector, and one end of which is connected to the base of the second transistor. The second current is supplied to the second resistor whose other end is connected to the negative input terminal of the operational amplifier, and the connection point between the other end of the second resistor and the negative input terminal of the operational amplifier. A signal conversion circuit comprising a second current source. 2. The signal conversion circuit according to claim 1, wherein the value of the second current of the first current source is made equal to the value of the fourth current of the second current source. 3. A first transistor having a collector-base connected, a first resistor connected between an emitter of the first transistor and a reference potential, an emitter of the first transistor, and the first resistor. An input current source that supplies a first current that is an input signal to a connection point with the first resistor, and a first current source that supplies a second current to a connection point between the collector and base of the first transistor. An operational amplifier having positive and negative input terminals and an output terminal, the positive input terminal being connected to the collector-base connection point of the first transistor,
A second transistor having a base connected to the output terminal of the operational amplifier, an emitter connected to the reference potential, and a collector outputting a third current, which is a first output signal, and one end of which is the base of the second transistor A second resistor connected to the negative input terminal of the operational amplifier and the other end of the second resistor connected to the negative input terminal of the operational amplifier, and a fourth current at a connection point between the other end of the second resistor and the negative input terminal of the operational amplifier. A second current source for supplying the current, a third transistor having a base connected to the base of the second transistor and an emitter connected to the reference potential, and an emitter connected to the collector of the third transistor. A fourth transistor that outputs a fifth current, which is a second output signal from, and a collector-emitter series connection between the base of the fourth transistor and the reference potential. A series circuit composed of fifth and sixth transistors whose collector and base are short-circuited, a third current source for supplying a sixth current to the series circuit, and a base for the collector of the third transistor. And a seventh transistor that is connected to the emitter and is connected to the reference potential and outputs a seventh current, which is a third output signal, from the collector. 4. The signal conversion circuit according to claim 3, wherein the value of the second current of the first current source is made equal to the value of the fourth current of the second current source.