JPH07283960A - Digital correction circuit - Google Patents

Abstract

PURPOSE:To obtain a digital correction circuit which performs the correction of screen distortion or shift of convergence even when a power source is applied or a deflecting frequency is changed by calculating correction data on each scanning line between two correction points in sequence of differential value with high priority. CONSTITUTION:An arithmetic circuit 4 reads out the correction data on the two correction points neighboring in a perpendicular direction from nonvolatile memory 20, and calculates the differential value of the data. A number is attached on the data in sequence of higher differential value by comparing the differential values, and it is stored in the nonvolatile memory 20 of memory 2. Thence, when the power source is applied or a horizontal deflecting frequency is changed, the correction data on upper and lover correction points in the perpendicular direction stored in the nonvolatile memory 20 of the memory 2 are read out according to the order of an address stored in the nonvolatile memory 20 of the memory 2. The correction data on each scanning line located between the two correction points can be calculated from those data. Therefore, the correction data on the scanning line found after an image is changed can be made small, which prevents it from being prominent on the image.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital correction circuit for correcting screen distortion and convergence deviation of displays and projectors using a cathode ray tube.

[0002]

2. Description of the Related Art Generally, a display, a projector or the like using a cathode ray tube suffers from screen distortion and convergence deviation. FIG. 1 shows a digital correction circuit for correcting screen distortion, convergence deviation, and the like. The timing control circuit 1 to which the horizontal and vertical deflection pulses are input has a memory 2, a data creation circuit 3, an arithmetic circuit 4 and a digital-analog converter (DA) described later at the timing of the pulse.
C) Control the operation of 5. As shown in FIG. 2, a plurality of correction points 10 which are grid-shaped intersections are first set inside and outside the screen 9.
The data creation circuit 3 creates data necessary for correction at each correction point 10 and stores the correction data in the non-volatile memory 20 in the memory 2. The arithmetic circuit 4 arithmetically prepares the correction data of each scanning line between the two correction points 10 in the vertical direction based on the correction data of the two correction points 10 read from the nonvolatile memory 20. The arithmetic circuit 4 stores the obtained correction data in the buffer memory 21 of the memory 2 or sends it directly to the digital-analog converter 5. The digital-analog converter 5 converts the correction data into an analog signal. Low-pass filter 6
Performs interpolation on the analog signal from the digital-analog converter 5 in the time direction, that is, the horizontal direction. The correction waveform obtained by the low pass filter 6 is added to the output circuit 7. The output circuit 7 responds to the correction waveform of its input by
The correction coil 8 provided on the sub deflection yoke or the like is driven.

In recent years, displays and projectors for receiving video signals of a plurality of different deflection frequencies such as multi-scan have come out. If the screen distortion, the convergence shift, and the like are the same at the screen position, the correction data may be stored and read in the buffer memory 21 of the memory 2 so as to correspond to the screen position. However, in the case of multi-scan, the number of scanning lines between the correction points 10 in the vertical direction changes depending on the input signal. Therefore, conventionally, not only when the power is turned on, but also when the deflection frequency changes, the arithmetic circuit 4 sequentially stores the correction data of two correction points that are vertically adjacent to each other in the memory 2 in order from the top to the bottom of the screen in accordance with the scanning. Read out from the nonvolatile memory 20. Then, the arithmetic circuit 4 calculates based on the correction data of the correction points and obtains the correction data of each scanning line between the two correction points 10. Although it takes about 1 second until an image corresponding to the change in the deflection frequency appears, it takes several seconds until the arithmetic operation of the arithmetic circuit 4 is completed. Therefore, when the image changes according to the change of the deflection frequency, there is a possibility that an image whose correction is partially incorrect may be temporarily generated.

[0004]

In the conventional digital correction circuit, when the power is turned on or the deflection frequency changes, the calculation of the calculation circuit does not catch up with the change of the image, and an image whose correction is partially inaccurate is temporarily made. Could occur.

An object of the present invention is to provide a digital correction circuit capable of correcting screen distortion and convergence deviation even when the power is turned on or the deflection frequency changes.

[0006]

[Means for Solving the Problems]

(Structure Example 1) A plurality of correction points are provided inside and outside the screen of a receiver that receives different deflection frequencies, and a data creation circuit that creates correction data for each of the correction points and the correction data created by the data creation circuit are stored. The first memory and the correction data of the two correction points are read from the first memory, the difference value between the data of the two points is calculated, and the result is stored in the second memory. Alternatively, when the deflection frequency changes, at least 2 stored in the first memory in a predetermined order of the difference values stored in the second memory.
Read the correction data of the correction points of the points, calculate the correction data between the two correction points from the correction data of the two points,
An arithmetic circuit stored in a third memory, a digital-analog converter for reading the correction data stored in the third memory and converting it into an analog signal, and an output of the digital-analog converter in the time direction. An interpolation circuit for interpolating,
An output circuit to which the output correction waveform of the interpolation circuit is input,
And a correction coil driven by the output circuit.

(Structural Example 2) A plurality of correction points are provided inside and outside the screen of a receiver for receiving different deflection frequencies, and a data creating circuit for creating correction data for each of the correction points, and a correction created by the data creating circuit. A first memory for storing data and correction data of the two correction points are read from the first memory, a difference value between the data of the two points is calculated, and the data difference value is at least a rank of 2 or more. At least 2 stored in the first memory in a predetermined order of ranks stored in the second memory when the power is turned on or when the deflection frequency changes. Read the correction data of the correction point of the point,
An arithmetic circuit for calculating the correction data between the two correction points from the correction data of the two points and storing the correction data in the third memory, and a digital circuit for reading the correction data stored in the third memory and converting the correction data into an analog signal. An analog converter, an interpolation circuit for interpolating the output of the digital-analog converter in the time direction, an output circuit to which an output correction waveform of the interpolation circuit is input, and a correction coil driven by the output circuit It is equipped with.

(Structural Example 3) A plurality of correction points are provided inside and outside the screen of a receiver for receiving different deflection frequencies, and a data creating circuit for creating correction data for each of the correction points, and a correction created by the data creating circuit. A first memory for storing data and correction data for the two correction points are read from the first memory, and a data difference value between the two points is calculated and the data difference value is set to at least a rank of 2 or more. Separately stored in the second memory, and when power is turned on or when the deflection frequency is changed, a portion having a rank equal to or greater than a certain difference value stored in the second memory is stored in the first memory. Read out the correction data of at least two of the correction points, calculate the correction data between the two correction points from the correction data of the two points, and store it in the third memory;
For the portion of the rank equal to or less than the certain difference value stored in the second memory, the correction data of the linear interpolation is used as the third difference.
Of the memory, the digital-analog converter that reads the correction data stored in the third memory and converts the correction data into an analog signal, and interpolates the output of the digital-analog converter in the time direction. An interpolation circuit, an output circuit to which the output correction waveform of the interpolation circuit is input, and a correction coil driven by the output circuit are provided.

[0009]

[Action]

(Structural Example 1) The data creation circuit creates correction data for a plurality of correction points provided inside and outside the screen, and stores the correction data in the first memory. The arithmetic circuit reads the correction data of the two correction points from the first memory,
The difference value of the point data is calculated and the result is stored in the second memory. This difference value calculation is performed for all correction points. Next, when the power is turned on or when the deflection frequency changes,
The arithmetic circuit reads out at least two of the correction data stored in the first memory in a predetermined order of the difference values stored in the second memory, and corrects both of them from the correction data of these two points. The correction data of each scanning line between the points is calculated and the result is stored in the third memory. As described above, when the power is turned on or when the deflection frequency is changed, the calculation of the correction data of each scanning line between the two correction points of the first predetermined difference value is given priority, and the second predetermined difference value is calculated. The calculation of the correction data of each scanning line between the above two correction points will be given later. Therefore, even if the calculation of all the correction data is not completed by the time when the image changes, it corresponds to the calculation between the correction points of the second predetermined difference value, so that the correction of the screen distortion and the convergence deviation can be performed. Has almost no effect.

(Configuration Example 2) The arithmetic circuit of Configuration Example 2 is
The obtained difference value between the two correction points is divided into at least two ranks and stored in the second memory. When the power is turned on or when the deflection frequency is changed, the arithmetic circuit, in a predetermined order of ranks stored in the second memory, has at least two points stored in the first memory. The correction data is read, the correction data of each scanning line between the two correction points is calculated from the correction data of these two points, and the result is stored in the third memory. Above, power supply ON
When or when the deflection frequency changes, priority is given to the calculation of the correction data of each scanning line between the two correction points of the first predetermined rank, and the correction of the two points of the second predetermined rank is given priority. The calculation of the correction data for each scanning line that comes between the points will be given later. Therefore, even if the calculation of all the correction data until the time when the image changes is not completed, it corresponds to the calculation between the correction points of the second predetermined rank, so that it is almost necessary to correct the screen distortion and the convergence deviation. It does not affect.

(Structure Example 3) The arithmetic circuit of Structure Example 3 is
The obtained difference value between the two correction points is divided into at least two ranks and stored in the second memory. Then, when the deflection frequency changes, the arithmetic circuit corrects at least two points stored in the first memory for the rank portion having a certain difference value or more stored in the second memory. The correction data of the point is read, the correction data of each scanning line between the two correction points is calculated from the correction data of the two points, and the result is stored in the third memory. Then, the arithmetic circuit stores, in the third memory, the correction data for the linear interpolation for the rank portion having a predetermined difference value or less stored in the second memory. Above, power source O
At N time or when the deflection frequency changes, the calculation between the two correction points of the rank having the smaller difference value is simplified. Therefore, the calculation time of all correction data becomes short, and there is almost no effect on the correction of screen distortion and convergence deviation.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of the digital correction circuit of the present invention is almost the same as the block diagram shown in FIG. Therefore, a description will be given based on FIG. The timing control circuit 1 to which the horizontal and vertical deflection pulses are input controls the operations of a memory 2, a data generation circuit 3, an arithmetic circuit 4 and a digital-analog converter (DAC) 5 described later at the timing of the pulse.
As shown in FIG. 2, a plurality of correction points 10 which are grid-like intersections are first set inside and outside the screen 9. Within the vertical blanking period, the data creation circuit 3 creates data necessary for correction at each correction point and stores the correction data in the non-volatile memory 20 in the memory 2. During the vertical blanking period, the arithmetic circuit 4 reads the correction data of two correction points vertically adjacent to each other from the nonvolatile memory 20, and calculates the difference value of the data. When this calculation is performed in the calculation section between the correction points in all the vertical directions, the difference value of the data in each calculation section is known as shown in FIG. The arithmetic circuit 4 compares the difference values and assigns numbers in order from the largest difference value to the smallest difference value as shown in FIG. If there is the same one,
Give priority to the address in the calculation section. The arithmetic circuit 4 rearranges the addresses shown in FIG. 5 in the order of the numbers shown in FIG. The result is the table shown in FIG. 6, and the addresses are stored in the nonvolatile memory 20 of the memory 2 according to the order. When the power is turned on or when the horizontal deflection frequency is changed, the arithmetic circuit 4 follows the order of the addresses stored in the non-volatile memory 20 of the memory 2 and stores the four vertical vertical directions stored in the non-volatile memory 20 of the memory 2. Read the correction data for correction point 10. Then, the arithmetic circuit 4 calculates the correction data of each scanning line between the two correction points 10 from the correction data and stores it in the buffer memory 21 of the memory 2. The digital-analog converter (DAC) 5 converts the correction data stored in the buffer memory 21 of the memory 2 into an analog signal. The low-pass filter 6 interpolates the analog signal from the digital-analog converter 5 in the time direction, that is, the horizontal direction. The low-pass filter 6 outputs the correction waveform shown by the solid line in FIG. 7 and is applied to the output circuit 7. The output circuit 7 is a low-pass filter 6
The correction coil 8 provided on the sub-deflection yoke or the like is driven in accordance with the correction waveform from.

As described above, since the arithmetic circuit 4 calculates the correction data of each scanning line between the two correction points 10 in the order of priority from the one having the larger difference value, the image changes. The scan line correction data obtained after
Not noticeable on the image.

Next, as a second embodiment, as shown in FIG. 3, after calculating the difference value between the correction data of two vertically adjacent correction points 10, the calculation circuit 4 sets the difference value to 15,
With 30 and 45 as boundaries, each calculation interval is 0, as shown in FIG.
Divide into 1, 2, and 3 ranks. Then, the arithmetic circuit 4
The addresses shown in FIG. 5 are rearranged in order from the largest rank to the smallest rank. It should be noted that within the same rank, priority is given to addresses in the calculation section. The result is the table shown in FIG. 9, and the addresses are stored in the nonvolatile memory 20 of the memory 2 according to the order. When the power is turned on or when the horizontal deflection frequency changes, the arithmetic circuit 4 follows the order of the addresses stored in the nonvolatile memory 20 of the memory 2 in the memory 2
4 in the vertical direction stored in the nonvolatile memory 20 of
Read the correction data of one correction point 10. Then, the arithmetic circuit 4 calculates the correction data of each scanning line between the two correction points 10 from the correction data and stores it in the buffer memory 21 of the memory 2. The subsequent operation is the same as that of the first embodiment. Also in the second embodiment, the arithmetic circuit 4
Indicates that the correction data for each scanning line between the two correction points 10 is calculated in order of priority from the rank having the largest difference value, so the correction data for the scanning line obtained after the image has changed is small, Not noticeable on the image.

Next, detailed operation of the first and second embodiments will be described with reference to the flowcharts of FIGS. First, assume that the power is turned on or the horizontal deflection frequency is changed (100). Next, the respective calculation sections are arranged in the order of addresses and designated as A. A starts from 1 (101). The correction data of the two adjacent correction points 10 corresponding to 1 are read from the non-volatile memory 20 of the memory 2 (102). The read correction data are stored in the buffer memory 21 of the memory 2 (103). Next, 1 is added to A, that is, the operation section moves to the (A + 1) th operation section (104). While the number of calculation sections is smaller than N, the processes of steps 102 and 103 are repeated (105). In the first and second embodiments, N is 28. After the 28th arithmetic section is reached, the process moves to (a) of FIG.

At the stage (a), the correction data of the correction point 10 stored in the non-volatile memory 20 of the memory 2 is changed for the convergence correction when the power is turned on or the horizontal deflection frequency changes. (106). Further, the correction data of the correction point 10 stored in the non-volatile memory 20 of the memory 2 is also changed by the screen amplitude and the screen change by the user's selection (107). Next, let K be the order shown in the table of FIG. 6 or 9. K starts at 1 (108). At this time,
An address, for example 36, stored in the non-volatile memory 20 of the memory 2 is read (109). The correction data of the four vertical correction points 10 corresponding to the read address are read (110).

Next, based on the correction data of the above four correction points 10, the correction data of each scanning line between the correction points 10 is calculated (111). The calculation method will be described with reference to FIG. The correction data of the four correction points 10 in the vertical and vertical directions are given by d ₁ ,
Let d ₂ , d ₃ , and d ₄ . The correction data of the scanning line between the second correction point 10 from the top and the second correction point 10 from the bottom is generally obtained by (Equation 1).

[0018]

[Equation 1] The point of the correction data to be obtained is m (0 ≦ m ≦ 1 in this case) from the second correction point from the top. At this time, correction data can be obtained by substituting m for x in (Equation 1).
When the correction point 10 is the highest, three correction points on the opposite side may be taken (in this case, −1 ≦ m ≦ 0). Even when the correction point 10 is at the bottom, it is sufficient to take three correction points on the opposite side (in this case, 1 ≦ m ≦ 2).

A plurality of correction data obtained in (Equation 1) are stored in the buffer memory 21 of the memory 2 (112). next,
One is added to K, that is, the operation section moves to the (A + 1) th calculation section (113). While the number of calculation sections is smaller than N, the processing from step 109 to step 112 is repeated again (114).
In the first and second embodiments, N is 28. After the 28th arithmetic section is reached, the process moves to (b) of FIG.

Next, let K be the order shown in the table of FIG. 6 or 9. K starts at 1 (115). A plurality of correction data f (x) corresponding to the first calculation section are read from the buffer memory (21) of the memory 2 (116). Next, the difference values between the plurality of correction data f (x) are sequentially calculated, and the sums thereof are taken to generate the difference value of the calculation section (117). Note that step 116 and step 117 may be the arithmetic processing described below. The correction data of two vertically adjacent correction points 10 corresponding to the first calculation section are stored in the nonvolatile memory 20 of the memory 2.
Read out and calculate the difference value between them. Next, 1 is added to K, that is, the operation section moves to the (A + 1) th calculation section (118
). While the number of calculation sections is smaller than N, the processes of steps 116 and 117 are repeated again (119). In the first and second embodiments, N is 28. The table shown in FIG. 3 shows the difference values obtained for all the calculation sections in this way.

In the next step, the numbers are assigned in descending order of difference value (120). The order thus obtained is the drawing of FIG. 4 or FIG. Then, the addresses are rearranged in the order and the chart shown in FIG. 6 or 9 is created (121). Next, from the non-volatile memory 20 of the memory 2,
The previous order and addresses shown in FIG. 6 or 9 are read (123). Then, it is compared with the data obtained in step 121 and step 122 (123). If they are the same, the process returns to (a) of FIG. If they are different, the order and address shown in FIG. 6 or 9 obtained in step 121 are stored in the nonvolatile memory 20 of the memory 2 (124). Then, it returns to (a) of FIG. If there is no change in the horizontal deflection frequency, screen amplitude, position change, or change in the correction data of the correction point 10, the result is the same even if returning to (a) of FIG.
You may end here.

Further, what is stored in the non-volatile memory 20 of the memory 2 may be not the address of each operation section but the difference value or the data when the rank is divided.

Next, as a third embodiment, as shown in FIG. 3, after calculating the difference value of the correction data of two vertically adjacent correction points 10, the calculation circuit 4 sets the difference value to 20.
14, each calculation section is divided into ranks 0 and 1 and stored in the nonvolatile memory 20 of the memory 2 as shown in FIG. 1 when the power is turned on or the horizontal deflection frequency changes
If there are two correction points 10 corresponding to the rank, the arithmetic circuit 4
Reads out the correction data of four correction points 10 vertically above and below stored in the nonvolatile memory 20 of the memory 2. Then, the arithmetic circuit 4 calculates the correction data of each scanning line between the two correction points 10 from the correction data and stores it in the buffer memory 21 of the memory 2. Further, in the case of two correction points 10 corresponding to the rank of 0, the arithmetic circuit 4 inserts a simple arithmetic operation, for example, a straight line into the arithmetic section, and stores this data in the buffer memory 21 of the memory 2. The subsequent operation is the same as that of the first embodiment. In the third embodiment, the total calculation time of the calculation circuit 4 can be shortened, and all the calculations can be completed before the image changes.

FIG. 11 shows a correction waveform generated in the third embodiment. The waveform shown by the solid line corresponds to the third embodiment. Generally, in the case of a parabolic wave used as a correction waveform, the change in the waveform is small near the center, so that part is linearly interpolated. As can be seen from this waveform, between the two correction points 10 having a small data difference value, the error is small even by a calculation such as a simple linear interpolation, and is inconspicuous on the screen.

The detailed operation of the third embodiment will be described below with reference to the flowcharts of FIGS. First, assume that the power is turned on or the horizontal deflection frequency is changed (200).
Next, the respective calculation sections are arranged in the order of addresses and designated as A. A starts from 1 (201). For the operation corresponding to 1, the rank D corresponding to FIG. 14 is calculated from the nonvolatile memory 20 of the memory 2.
The ATA is read (202).

When DATA is 1, the correction data of the four vertical correction points 10 are stored in the nonvolatile memory of the memory 2.
Read from 20 (204). Then, in the above (Equation 1),
Correction data f of a plurality of scanning lines included in the corresponding rank
Find (x) (205). The plurality of correction data obtained by this (Equation 1) is stored in the buffer memory 21 of the memory 2.

When DATA is not 1, the correction data of the two correction points 10 above and below in the vertical direction are read from the non-volatile memory 20 of the memory 2 (206). If the correction data of the two correction points 10 vertically above and below are d ₂ and d ₃ as shown in FIG. 13, the correction data of the scanning line between the correction points 10 can be obtained by (Equation 2).

[0028]

[Equation 2] The point of the correction data to be obtained is the point m from the above correction point 10. At this time, correction data can be obtained by substituting m for x in (Equation 2). A plurality of correction data obtained by this (Equation 2) is stored in the buffer memory 21 of the memory 2 (208).

Next, 1 is added to A, that is, the process moves to the A + 1th rank (209). While this rank is smaller than the Nth, the processing from steps 202 to 208 is repeated again (210). Incidentally, N is 28 in the third embodiment. After reaching the 28th rank, the process moves to (c) of FIG.

In step 211, B is a value for setting the portion for performing the normal operation of (Equation 1), and 0 indicates only the simple operation target range of (Equation 2). On the other hand, the rank (DATA) of the address from step 233 of FIG.
Is supplied. At this stage (e), the convergence is corrected when the power is turned on or when the horizontal deflection frequency changes.
Correction points 10 stored in the non-volatile memory 20 of the memory 2
Change the correction data of (212). Further, the correction data of the correction point 10 stored in the non-volatile memory 20 of the memory 2 is also changed by the screen amplitude and the screen change by the user's selection (213). Next, B is set to 1 so that the normal calculation of (Equation 1) is performed over the entire range (214).

Next, the ranks are arranged in the order of addresses to be A. A starts at 1 (215). The nonvolatile memory 20 of the memory 2 reads the rank DATA shown in FIG. 14 (216
). Next, it is compared whether the rank DATA is equal to B or less than B (217). The route obtained by the simple calculation in steps 206 and 207 and the route from the starting point (e) are YES, and the process proceeds to the next step 218. The correction data of the four correction points 10 above and below in the vertical direction are read from the nonvolatile memory 20 of the memory 2 (218). Then, the correction data f (x) of a plurality of scanning lines included in the corresponding rank is obtained by the above-mentioned (Equation 1) (219). The plurality of correction data obtained by this (Equation 1) is used as the buffer memory of the memory 2.
Remember in 21. For the route normally calculated in steps 204 and 205, the comparison in step 217 is NO, and the process directly proceeds to the next stage of step 220. Next, 1 is added to A, that is, the rank moves to the A + 1th rank (221). While this rank is smaller than the Nth, the processing from steps 216 to 220 is repeated again (222). Incidentally, N is 28 in the third embodiment. After reaching the 28th rank, the process moves to (d) of FIG.

Next, the ranks are arranged in the order of addresses to be A. A starts at 1 (223). Complementary correction data f (x) corresponding to the first calculation section is read (224). Next, the difference values among the plurality of correction data f (x) are sequentially calculated, and the sums are calculated to generate the difference value in the calculation section (225). Incidentally, step 224 and step 225 may be the arithmetic processing described below. The correction data of two vertically adjacent correction points 10 corresponding to the first calculation section are read from the non-volatile memory 20 of the memory 2 and the difference value between them is calculated.

Next, it is compared whether or not the difference value obtained in step 225 is larger than R (226). If YES, the rank of the calculation section is 1 (227). If NO,
The calculation section has a rank of 0 (228). Incidentally, R is 20 in the third embodiment. Next, the previous rank DATA is read from the nonvolatile memory 20 of the memory 2 (229
). Rank DA obtained in steps 227, 228 and 229
If it is the same as TA, go to the next step 232. If they are different, the rank DATA of step 227 and step 228 are recorded in the nonvolatile memory 20 of the memory 2.

Next, 1 is added to A, that is, the operation section moves to the (A + 1) th operation section (232). While this operation section is smaller than the Nth, the processing from steps 224 to 231 is repeated again (233). Incidentally, N is 28 in the third embodiment. After the 28th calculation section is reached, the process returns to (e) of FIG. However, if there is no change in the horizontal deflection frequency, screen amplitude, position change, or change in the correction data of the correction point 10, the result is the same even if returning to (e) of FIG. 17, so end here. Good.

In the third embodiment, the difference value of the correction data is obtained from the correction points which are vertically adjacent to each other. However, two correction points 10 which are not adjacent and are apart from each other are selected and the difference values are utilized. Good. In addition, the maximum value of the change in the calculation data may be calculated according to the formal interpolation calculation, and a simple calculation may be performed at the same time and the two may be compared and ranked according to the size of the difference. . Further, in order to improve the correction waveform between the correction points in the horizontal direction, the difference value of the data of the two correction points 10 in the horizontal direction is calculated, the difference value is divided into ranks, and the two corrections with the smaller ranks are calculated. The point 10 may use a simple calculation, for example, correction data inserted in a straight line.

[0036]

According to the first and second embodiments, the calculation of the correction data of each scanning line after the change of the image is performed in the section where the difference value between the data of the two correction points is small. , There is little influence on the correction of screen distortion and convergence deviation, and it is not noticeable on the image.

According to the third embodiment, since the correction data is calculated by inserting the straight line in the section where the difference value between the data of the two correction points is small, the total calculation time can be shortened and before the image changes. The calculation can be finished.

[Brief description of drawings]

FIG. 1 is a block diagram showing a general configuration of a conventional digital correction circuit and a digital correction circuit of the present invention.

FIG. 2 is a diagram showing that a plurality of correction points, which are grid-like intersections, are set inside and outside the screen.

FIG. 3 is a diagram showing a difference value between correction data of two correction points adjacent to each other in the vertical direction.

FIG. 4 is a diagram showing the order from the larger difference value to the smaller difference value of the correction data shown in FIG.

FIG. 5 is a diagram showing addresses between two correction points that are vertically adjacent to each other.

6 is a diagram showing that the addresses in FIG. 5 are rearranged in the order shown in FIG.

FIG. 7 is a diagram showing correction waveforms generated in the first and second embodiments of the present invention.

FIG. 8 is a diagram showing that the difference value of the correction data shown in FIG. 3 is divided into a plurality of ranks according to size.

9 is a diagram showing that the addresses shown in FIG. 5 are rearranged in the rank division shown in FIG.

FIG. 10 is a flowchart showing detailed operations of the first and second embodiments of the present invention.

FIG. 11 is a flowchart showing detailed operations of the first and second embodiments of the present invention.

FIG. 12 is a flowchart showing detailed operations of the first and second embodiments of the present invention.

FIG. 13 is a diagram for explaining calculation of correction data between two correction points.

FIG. 14 is a diagram showing that the difference values of the correction data shown in FIG. 3 are divided into ranks with a certain size.

FIG. 15 is a diagram showing a correction waveform generated in the third embodiment of the present invention.

FIG. 16 is a flowchart showing detailed operation of the third exemplary embodiment of the present invention.

FIG. 17 is a flowchart showing detailed operations of the third exemplary embodiment of the present invention.

FIG. 18 is a flow chart showing detailed operation of the third exemplary embodiment of the present invention.

[Explanation of symbols]

1 ... Timing control circuit, 2 ... Memory, 20 ... Non-volatile memory, 21 ... Buffer memory, 3 ... Data creation circuit, 4
... arithmetic circuit, 5 ... digital-analog converter, 6 ... low-pass filter, 7 ... output circuit, 8 ... correction coil.

Claims (5)

[Claims] 1. A data creation circuit that creates a plurality of correction points inside and outside a screen of a receiver that receives different deflection frequencies, and creates correction data for each correction point, and stores the correction data created by the data creation circuit. And the correction data of the two correction points are read from the first memory, the difference value between the data of the two points is calculated, and the result is calculated as the second value.
Of the difference values stored in the first memory in a predetermined order of the difference values stored in the second memory when the power is turned on or the deflection frequency changes. The correction data for the points is read, the correction data between the two correction points is calculated from the correction data for the two points, and the calculation circuit for storing the correction data in the third memory and the correction data stored in the third memory are provided. A digital-analog converter for reading and converting into an analog signal, an interpolation circuit for interpolating the output of the digital-analog converter in the time direction, an output circuit to which an output correction waveform of the interpolation circuit is input, and the output A digital correction circuit comprising a correction coil driven by the circuit. 2. The arithmetic circuit reads the correction data of the two correction points from the first memory, calculates the difference value of the data of the two points, and stores the result in the second memory. Correction of at least two of the correction points stored in the memory in the descending order of the difference value stored in the second memory when the power is turned on or when the deflection frequency changes. Read the data, those 2
2. The digital correction circuit according to claim 1, wherein the correction data between both correction points is calculated from the correction data of the points and stored in the third memory. 3. A data creation circuit that creates a plurality of correction points inside and outside a screen of a receiver that receives different deflection frequencies, and creates correction data for each correction point, and stores the correction data created by the data creation circuit. And the correction data of the two correction points are read from the first memory, the difference value between the data of the two points is calculated, and the data difference value is divided into at least two ranks. At least 2 stored in the first memory in a predetermined order of the ranks stored in the second memory when the power is turned on or when the deflection frequency changes.
Read the correction data of the correction points of the points, calculate the correction data between the two correction points from the correction data of the two points,
An arithmetic circuit stored in a third memory, a digital-analog converter that reads the correction data stored in the third memory and converts it into an analog signal, and an output of the digital-analog converter is interpolated in the time direction. And a correction coil driven by the output circuit. 4. The arithmetic circuit reads the correction data of the two correction points from the first memory, calculates the data difference value of the two points, and sets the data difference value to at least two ranks. The difference values are separately stored in the second memory, and when the power is turned on or when the deflection frequency changes, the difference values stored in the second memory are stored in the order from the rank having the larger difference value to the rank having the smaller difference value. The correction data of at least two of the correction points stored in one memory is read, the correction data between the two correction points is calculated from the correction data of the two points, and the correction data is stored in the third memory. The digital correction circuit according to claim 3. 5. A data creation circuit that creates a plurality of correction points inside and outside a screen of a receiver that receives different deflection frequencies, and creates correction data for each correction point, and stores the correction data created by the data creation circuit. The first memory and the correction data of the two correction points are read from the first memory, the data difference value of the two points is calculated, and the data difference value is divided into at least two ranks. 2 memory, and at the time of power-on or when the deflection frequency changes, at least the portion of the rank equal to or more than the certain difference value stored in the second memory is stored in the first memory. The correction data of the two correction points is read, the correction data between the two correction points is calculated from the correction data of the two points, and the calculated correction data is stored in the third memory and stored in the second memory. For a portion having a rank equal to or less than a certain difference value, an arithmetic circuit which stores the correction data for linear interpolation in the third memory, and the correction data stored in the third memory are read out and converted into an analog signal. Digital-analog converter, an interpolation circuit for interpolating the output of the digital-analog converter in the time direction, an output circuit to which the output correction waveform of the interpolation circuit is input, and a correction coil driven by the output circuit A digital correction circuit comprising: