JPH0727880A - High resolution time measuring device - Google Patents

Abstract

PURPOSE:To enable more finely calibrating T/V conversion circuit by generating a plurality of calibration clock with different frequency and at every input of each clock generating single pulses with the same time width as the period of the clock as calibration pulses. CONSTITUTION:In synchronizing with a reference clock from a reference clock generation circuit 1, n pieces clocks with different frequency from the reference clock are generated in turn from a synthesized sweeper 6. A calibration pulse generation circuit 2 at reception of each clock, produces a single pulse having a pulse width equal to one period of the clock as the calibration pulse and gives to a T/V conversion circuit 3. In accordance with this, voltage data are obtained from the circuit 3 and stored in a memory 4. A processing circuit 5 calculates the T/V conversion coefficient based on the calibration data and stores in a memory 4. For actual time measurement at later time, by using the conversion coefficient stored in the memory 4, time width is conversely calculated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in resolution of a time measuring device, and more particularly to an improvement in resolution for highly accurate measurement of a minute time of one cycle or less of a reference clock. .

[0002]

2. Description of the Related Art Conventionally, time measuring devices for measuring elapsed time have been well known. One of the high resolution time measuring methods adopted by this type of time measuring apparatus is a time / voltage converting method (T / V converting method). In this system, for example, when measuring the time width (pulse width) from the rising edge to the falling edge of the signal under measurement, the reference clock is counted within the time width and the measured signal is calculated from the number of clocks counted. However, for the minute time width that cannot be counted by the reference clock (this is also called a fractional pulse), this is once converted into a voltage value and the voltage value is measured with high accuracy to obtain an accurate time. This is a method of calculating the width.

In the T / V conversion method, calibration is usually performed to obtain a conversion coefficient (a coefficient when converting from time to voltage) prior to measurement. This calibration is performed by the configuration shown in FIG. In FIG. 4, the reference clock generation circuit 1
The reference clock (clock that serves as a time reference for both the measurement system and the calibration system) from is input to the calibration pulse generation circuit 2. Here, single-shot pulses for one cycle and two cycles of the reference clock are generated, respectively. T / V conversion circuit 3
Converts the time width of each pulse into a voltage and outputs it as a digital signal. Each converted value is temporarily stored in the memory 4,
The processing circuit 5 reads this and calculates the time-voltage conversion coefficient related to the fractional pulse in the T / V conversion circuit 3 based on the two converted values.

In the actual time measurement of the signal under measurement, T / V
The conversion circuit 3 counts the reference clock, performs time-voltage conversion for the fractional pulse, and stores the respective results (clock number and voltage value) in the memory 4. The processing circuit 5 obtains the time width from the counted number of clocks, and uses the conversion coefficient obtained in the above calibration to inversely calculate the fraction time width from the voltage value corresponding to the fraction pulse. The time width of the signal under measurement can be calculated by adding the data of the two time widths thus obtained.

[0005]

However, in the actual measurement, the fractional pulse input to the T / V conversion circuit has a width of any value between the above-mentioned calibration pulses, that is, the fractional pulse is equal to that of the reference clock. Although it takes any value of 1 cycle or less, in the conventional calibration as described above, the calibration is performed only with two pulses for one cycle and two cycles of the reference clock, in other words, the minimum and maximum fractional pulses. Absent. Therefore, the linearity between the minimum and the maximum is not calibrated at all, and there is a problem that a conversion error occurs.

In view of such a point, the purpose of the present invention is to
The present invention is intended to realize a high-resolution time measuring device in which the fractional pulse of the / V conversion circuit can be finely calibrated and the time measurement resolution and accuracy are improved.

[0007]

In order to achieve such an object, according to the present invention, a time width of an input pulse is obtained by counting a reference clock, and a fractional pulse which cannot be counted by the reference clock is converted into a voltage. The T / V conversion circuit is provided, and the time width of the input pulse is calculated by calculating the time width from the count value of the reference clock and calculating the time width of the fraction pulse from the relationship between the converted voltage and the time width. In the time measuring device configured to know,
Means for generating a plurality of calibration clocks having a frequency different from that of the reference clock, and calibration pulse generation for generating as a calibration pulse a single pulse having a time width equal to one cycle of each clock for each calibration clock input. Circuit,
The calibration pulse is applied to the T / V conversion circuit to calibrate the time conversion coefficient for the fractional pulse.

[0008]

The present invention is such that the conversion coefficient of a fractional pulse can be calibrated. A plurality of calibration clocks having different frequencies are generated from a reference clock, and the calibration pulse generation circuit generates a single-shot pulse having a time width of one cycle when each calibration clock is input. These calibration pulses are given to the T / V conversion circuit, and the conversion output at that time is obtained. The fractional pulse conversion coefficient of the T / V conversion circuit is calibrated from the relationship between the time width of the calibration pulse thus obtained and the conversion output.

[0009]

The present invention will be described in detail below with reference to the drawings.
FIG. 1 is a block diagram showing an embodiment of a high resolution time measuring device according to the present invention. 1, the same parts as those in FIG. 4 are designated by the same reference numerals, and the description thereof will be omitted. In particular, the part different from FIG. 4 is that the synthesized sweeper 6 is used. The synthesized sweeper 6 is configured to receive a reference clock from the reference clock generation circuit 1 and sequentially generate a plurality of frequencies f ₁ , f ₂ , f ₃ , ..., F _n synchronized with this clock. It is a thing. Note that f ₂ ,
The frequencies of f ₃ , ..., F _n-1 are frequencies when f ₁ and f _n are equally divided into n.

The operation in such a configuration will be described below. From the synthesized sweeper 6, n clocks having different frequencies as described above are sequentially output. Each time the calibration pulse generating circuit 2 receives each clock, it generates a single-shot pulse having a pulse width of one cycle of the clock as a calibration pulse and gives it to the T / V conversion circuit. FIG. 2 is a waveform diagram showing the relationship between the input signal and the output signal of the calibration pulse generating circuit 2 (pulses. When a clock of frequency f ₁ is input, pulse P ₁ (pulse width is T) is output,
When the clock of the frequency f ₂ is input, the pulse P ₂ is output, and in the same manner, the pulse P _n (the pulse width is 2T) is output in the case of the frequency f _n .

Such calibration pulses P ₁ , P ₂ , ...
.., P _n is given to the T / V conversion circuit 3 for calibration, and voltage data V ₁ , V ₂ , V ₃ , ..., V _n are respectively supplied from the T / V conversion circuit 3 for each calibration pulse. It is assumed that it is obtained. These calibration data are stored in the memory 4. The processing circuit 5 obtains the time-voltage conversion coefficient based on these calibration data and stores it in the memory 4. In the subsequent actual time measurement, the processing circuit 5 uses the conversion coefficient obtained as described above to back-calculate the time width from the fractional pulse measurement data. Thus, by generating a plurality of pulses for fractional pulse calibration and calibrating the conversion coefficient for the fractional pulse, it is possible to reduce the linearity error in the fractional pulse conversion and enable time measurement with high resolution. .

The frequencies of the clocks f ₂ , f ₃ , ..., F _n-1 output from the synthesized sweeper 6 are
In the embodiment, the frequency between f ₁ and f _n is equally divided into n, but the present invention is not limited to this, and the frequency may be divided into n.

Further, in the above embodiment, n calibration clocks are generated by the synthesized sweeper, but the reference clock generating circuit itself may generate a plurality of calibration clocks. FIG. 3 is a block diagram showing an embodiment of a reference clock generating circuit for achieving such an object. As is clear from the figure, this configuration is a so-called PLL.
(Phase Locked Loop) circuit. A brief description will be given below. A reference clock serving as a clock reference and an output of a voltage controlled oscillator (VCO) 9 divided by a programmable counter 10 are input to the phase comparator 7. The output of the phase comparator 7 removes a high-frequency component through a low-pass filter 8 and outputs a voltage which is almost DC like VC.
Give to O9. According to such a closed loop control circuit,
When the reference and the output of the programmable counter 10 are controlled to have the same frequency, and the programmable counter 10 divides by 1 / N, the output reference clock has a frequency N times the input reference signal. .

Here, the frequency division is performed by a programmable counter as follows: 1 / N, 1 / (N-1), 1 / (N-2) ,. ． ． , 1
/ (N-n) is changed in n ways to generate n kinds of calibration clocks. In this way, by generating a plurality of calibration clocks in the reference clock generation circuit itself, FIG.
The object of the present invention can be achieved in the same manner as the configuration shown in FIG. A reference clock, for example, is used as the reference clock given to the T / V conversion circuit in this case.

[0015]

As described above, according to the present invention, a plurality of calibration clocks can be generated by using a frequency synthesizer or a programmable PLL, and the T / V conversion circuit can be more finely calibrated. Therefore, the linearity error of conversion can be reduced and high resolution time measurement becomes possible.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an embodiment of a high resolution time measuring device according to the present invention.

FIG. 2 is a diagram showing a relationship between a calibration clock and a calibration pulse.

FIG. 3 is a configuration diagram showing an embodiment of a reference clock generation circuit in another embodiment of the present invention.

FIG. 4 is a configuration diagram showing an example of a conventional time measuring device.

[Explanation of symbols]

 1 Reference clock generation circuit 2 Calibration pulse generation circuit 3 T / V conversion circuit 4 Memory 5 Processing circuit 6 Synthesized sweeper

Claims (1)

[Claims] 1. A time width of an input pulse is calculated by counting a reference clock, and a T / V conversion circuit for converting a fractional pulse that cannot be counted by the reference clock into a voltage is provided, and the time width is calculated from a count value of the reference clock. In addition to obtaining the fractional pulse, the time width of the fractional pulse is calculated from the relationship between the converted voltage and the fractional width. Means for generating a calibration clock, a calibration pulse generation circuit for generating a single pulse having a time width equal to one cycle of the clock as a calibration pulse each time each of the calibration clocks is input, and each calibration pulse Is applied to the T / V conversion circuit to calibrate the time conversion coefficient for the fractional pulse. Measuring device.